9.6 Bibliographic notes9.7 Suggested experiments9.7.1 Keyboard control circuit9.7.2 Enhanced mouse interface9.7.3 Mouse-controlled seven-segment LED display10 External SRAM10.1 Introduction10.2 Specification of the IS61LV25616AL SRAM10.2.1 Block diagram and 110 signals10.2.2 Timing parameters10.3.1 Block diagram10.3.2 Timing requirement10.3.3 Register file versus SRAM10.4.1 ASMD chart10.4.2 Timing analysis10.4.3 HDL implementation10.4.4 Basic testing circuit10.4.5 Comprehensive SRAM testing circuit10.5.1 Timing issues10.5.2 Alternative design I10.5.3 Alternative design I110.5.4 Alternative design I1110.5.5 Advanced FPGA featuresxizinx specific10.3 Basic memory controller10.4 A safe design10.5 More aggressive design10.6 Bibliographic notes10.7 Suggested experiments