Aizyc-Presentation.pdf

Aizyc Technology Confidential

Product Engineering Solutions

- Concept to Commercial Success-

2010 Aizyc Technology

Solutions in a BOX

From Concept till Commercial Success ASIC -Architecture, Design, Verification, Synthesis, PD & FAB

interface BOARD - Design, Analysis, Prototypes, Volume Manufacturing

& Certifications FPGA - Product Design, Validation, Commercialization Embedded Software Drivers (Win,Linux), UI, Firmware

*All Trademarks and Logos belong to their respective owners


Geography & Alliance

Clientele spread across Europe, USA & Asia

Proven Team with Track record of 14+ projects/products

Multi location Engineering Team USA, India & Germany

*All Trademarks and Logos belong to their respective owners


About Aizyc

Proven Competence in ASIC, FPGA, Board, Firmware / Software solutions for various markets

Concept to Customer Product Development Capability

More than 12 first-pass successful silicon experience

ASIC devices brought to market range from USB bridges, PCI(e)

adapters and SoCs of varying degrees of complexity.

Domain experience spans Consumer Electronics, Industrial

solutions, Enterprise Networking, Personal Computer products, Digital Imaging and allied fields.

Core Team has shipped several products in million+ volumes and worked in name brand companies developing cutting edge, revolutionary technologies.

Top Notch Engineering Team with strategic spread, across geographies to enable 24/7 development cycle and cost effective project budgets.


End-End Engineering Services


Design Services -ASIC Engineering

Pre silicon Design & RTL Behavioral Model Test bench and Scripts Verification - simulation of

silicon's RTL. Pre-silicon validation

Targeted to FPGAs Synthesis & Timing Closure H/w & S/w co-simulation on

FPGA platforms

Post silicon Design silicon wake-up boards Silicon validation (physically

on the bring-up board) Customer Reference boards Develop software for Silicon

Wake-up & validation BSP, diagnostics, device

drivers, APIs Develop FPGAs for Proof Of

Concept Support your customers by

designing h/w, s/w and/or End to End Products


Technology Exposure

Communications Networking: Ethernet (10/100,1G &10G, IPv4/IPv6 Broadband: VoIP, Media Gateway, Virtual USB Interface : PCIe, USB, IrDA, OTG Audio & Video Streaming, Jpeg 2000, HDMI Wireless (WiFi & WiMax)

Computing Single Board Computers Host Processor Modules

Storage Systems SSD SATA

Consumer Electronics SoHo Printers Hand-held Devices

Medical / Health Care Temperature control, Patient Monitoring


ASIC / IP experience overview

ASIC - PCI to PCI Bridge Controller

ASIC - PCI to UART / ISA / Parallel port

ASIC - USB2.0 to Ethernet, IrDA, UART, Parallel Port

SoC - ARM 9, Ethernet to USB & PCI Host

SoC 500mhz ARM 9, Gigabit to USB2.0 Host, PCIe, Dual

LCD Controllers

IP SATA Controller, USB2.0, OTG, SDIO

Technology 90nm, 20 Million gate designs

FAB Relations UMC, Tower


SoC IPs

SDXC Host Controller Our SD 3.0 Host IP provides supports for various system interfaces VCI, AHB

and OCP. Number of slots[1/2] available is also configurable. It provides UHS-I modes of operation - DS, HS, SDR12, SDR25, SDR50, SDR104 and DDR50.

SDIO2.0 Host Controller

SDIO2.0 Device Controller

USB2.0 Device / Host & OTG

USB2.0 device controller IP core is fully synthesizable core suitable for different process. Generic application interface for easy integration. It supports different endpoint configurations for varied applications. Supports Control, Bulk and Interrupt transactions

10/100 Ethernet MAC

UART, I2C, SPI


ASIC Design Samples

PCIe to Uart USB to IrDA USB over Ethernet

USB2.0 to Ethenet PCIe to USB2.0 Single Chip SoC for Point

of Sale


USB to Ethernet Case Study

Concept to Market in 3 months

Replaced competitor part with a device having more features, more performance and less cost.

Several hundred thousands shipped Integrated USB 2.0 PHY

Features USB Specification 2.0

Compliant 10/100 Mbps Ethernet

Controller


ARM SoC Case Study

Network Appliance Co Processor

Complex first time right SoC for SoHo

market

Project led by Aizyc CoFounder, silicon

realization in 15 months Features

32-bit, 500 MHz ARM9 CPU

Two USB2.0 host ports with on-chip

PHY

OTG feature supported

10/100/1000 Ethernet MAC

250 MHz DDR2 SDRAM interface

PCIe Root Complex and Peripheral

interface

VGA controller with FPD interface

TSO, LRO hardware functions

0.13 um UMC process

292 BGA


Feasibility Study

Technical Feasibility

Time to market NRE Cost Rough BOM cost Requirement

Freeze

Concept

RTL Design FPGA Design Board Design Simulation Testing

Hardware Design

Drivers OS & Protocols Diagnostic tools Test platforms

Software Design

Prototyping

Competition Analysis BOM Analysis BOM Procurement Board Fabrication Component Assembly Sample Production Volume Production Handover

Compliance & Certifications

Compliance submission Certifications

Industrial Design

Mechanical Design (Assistance) Thermal Analysis User Interface Design Field Feedback Clinical Trials (Medical)

Certified Product

Product Engineering Process


Products Engineered

Power Monitor with WiFi

GSM to Ethernet Mobile Office

Temperature control for Cryogen

Location Based advertisement system for Public Transport

OMAP Based Android Phone


Temperature Controller - Case Study

Architected, designed and developed a platform for Liquid Nitrogen Temperature control.

Solution involves precision A/D and D/A blocks, custom designed central microcontroller board, battery backup and switchover, touch screen LCD panel.

Specification to Prototype in 6 months.

Key aspects of design

Micro controller interface RTD Sensor interface Display interface Power Management GUI Application


Power Monitor Case Study

Design to track, monitor and control power consumption

Transmit data wirelessly to a central logger

Design Features

Based on energy measurement ASIC Input Current up to 20 A

Key Challenge Lowest power consumption needed for the device itself

(


Power Monitor Case Study continued


Intelligent Bus Signage case Study

GSM, GPS location based advertisement & tracking system

Remote monitoring and public broadcasting

Hardware

ARM9 based prototypes Embedded processor capable of running interfaces like RS-232, USB VGA splitter to drive 4 VGA or SVGA by single PC LCD display available with RS232/USB/Ethernet or RS 422 interface Multiple boards and assemblies in hardware platform


Board Design Services

High Speed Circuit Cards

Power Distribution / Experience in power supply designs

DC-DC power - both linear and switched mode regulators

Regulatory Compliance - FCC, UL, IEC, CE

Design For Manufacturability

RF Design Capability

Packaging and Technology Selection

Blind/Buried via, Aspect ratios, SMT, Dielectric, etc.

Tools supported

Allegro, Expedition, Pads, PCAD, OrCAD, Protel, etc.

Experience with various Embedded Processors

Member of India Design House Program (IDHP)

Member of the Microchip Design Partner Program

Partner with DDI Global (Leader in PCB Manufacturing Technology)


Design Services -Board Design

Reference Boards

Silicon Wake-up Boards

Interface Boards

Single Board Computers

(SBC)

Complexity - 4 to 32 layers

Density 2-3K Nets, high

ball count BGAs

I/O technologies DDR2/3,

PCIe, XAUI, USB

High-speed serial Upto 10

Gbps

Analog - Audio, Video, & RF

Verification - SI & Crosstalk

Design for DFM, DFT


Silicon Wake-up Platform Case Study

Design, development and deployment of ASIC post silicon validation platform

Complexity: Trace width 3.5 mil BGA pitch .65 mm Voltage Domains 7 Size 30 X 12 Layers 16 Total Current 20 A Number of nets 2400 Total connections 8000 Total parts 2000

High speed interfaces: 576 Mhz Custom Differential interface 64-bit 667 Mhz DDR3 interface 6.25 Gbps XAUI interface


Audio Amplifier Design Case Study

Design implementation of custom audio amplifier board for the consumer electronics space.

Audio Amplifier Board Design Based on TI chip- TAS57014 Array of 16 speakers

Power dissipation by one chip - 20 watts

Handling 80 watts of power dissipation without a heat sink was the major design challenge

Design performance qualified by TI Engineering Team

Master Reset

TAS 5704 -1

TAS 5704 -2

TAS 5704 -3

TAS 5704 -4

OP CON

1

OP CON

2

OP CON

3

OP CON

4

.

.

.

.

Power

CFG Gain

Format

Array of 16

Speakers

LRCLK SCLK SDIN1

SDIN2


PSOC Board Design Case Study

Cypress PSOC based demonstration board

Stringent board size requirement

Blind and Buried Micro bias

Complexity:

Size 22mm X 55mm Total connections 250 Total parts 83 Trace width 3 mil BGA Pitch .5 mm

Responsible for not only design and verification of the board, but also for the manufacture and timely delivery across the globe for final demonstration

CYPRESS PSOC MLC NAND

USB Connector

I2C EEPROM

1.8 V Power

3.3 V Power CRYSTAL


MP3 Player Case Study

Design based on processor IC J24750

Multiple interfaces support

Wifi SD Storage Ethernet USB UART

Responsible for schematic, layout and board design.

Key challenge - Iphone form

factor.


USB to Ethernet Dongle Case Study

Design highlight Based on MosChip 7830 10/100 Base-T Ethernet devices USB 2.0 Device Controller

Key design challenge Small dongle form factor Stringent board size requirement

Complexity Size 26mm X 63mm Total nets 45 Total connections 169 Total parts 64

Minimal BOM cost possible

Responsible for complete design, layout and testing of

the board

MCS 7830 USB Ethernet

Clock Power


Design Services - FPGA

Proof of Concept Designs/ Demo Systems

FPGA Prototyping

Retarget Services

FPGA-to-FPGA FPGA-to-ASIC ASIC-to-FPGA

Design with Xilinx/Altera

Six FPGA-ASIC design

experience

Experience with Virtex and Stratix Families

Rocket IO and SERDES Complete SoC porting on

FPGA Design partition across

multiple FPGAs


COSMOS FPGA Emulation Platform Feature List

PCI Express based ASIC Emulation Platform

Virtex 5 series FPGA

TI XIO1100GGB PCI Express PHY (x2)

for PCIe interface

DP83865 10/100/1000 Ethernet PHY

with RGMII

FPGA IO configurable as single ended

or LVDS on IO Header

Single SODIMM connector for DDR2

(Or DDR3)

Low skew global clocks

Powered by single ATX power supply in

standalone mode. Option to draw power from PCIe slot for low power designs

MICTOR connectors on select banks for logic analyzer debugging

Customizable with additional interfaces using IO header. Daughter cards can be designed based on request

ARM926EJ-S Core tile interface (Provided by ARM)

Status LEDs and DIP switches on some IOs

FPGA configurable using CF card

RS232 port for debugging CPU

Parallel NOR Flash interface with

8MB ST Flash

SD/SDIO/MMC interface

High Speed SPI Flash (ST, 8 MB)

USB3.0 PHY interface (Optional)

ISP1504 based USB2.0/OTG interface

Optional XAUI interface for high speed

connectivity


COSMOS Block Diagram


20M gate FPGA Validation Case Study

SOC validated on FPGA for digital still and moving picture cameras

Hardware Two 32 bits embedded CPUs Interfaces

Gigabit Ethernet High speed XAUI DDR3 Memory Controller Second Generation PCIe SD host & Device SATA Host Controller HDMI, HD-SDI display interface

Complete design CUSTOM partitioned and ported on to 16 Virtex-5 LX330 FPGAs

All interfaces brought up and validated on FPGA emulation board

All interface worked first pass on silicon

Arbiter

Memory Controller

AHB Interconnect

HDMI

SDIO host/device

HD-SDI XAUI

Gen2 PCIe

DDR3 Memory

Controller

Other Chip

Interfaces

SATA

Two 32-bit CPUs

OMAP Slave


FPGA Validation- Case Study

Real time encoding and decoding of images

System configured and controlled by 32bit RISC CPU

Encoding/Decoding of both RAW and RGB code streams

Completed RTL integration Stand alone and top level RTL

verification Complete encoder/decoder engine

porting on FPGA Custom design partitioning onto six

Virtex-5 FPGAs FPGA validation

Design worked on silicon in first attempt

Encode Decode Engine

DDR IF

RAW / RGB Data

AHB IF


FPGA Product Design Case Study

Scope To design and implement a bridge

controller between a given single lane multi-function PCIe controller and a given 4 ports USB host controller, and port this complete design on FPGA platform to verify full functionality of PCIe to 4 ports USB controller.

High Level Requirements:

The FPGA prototype should be able to

Work with the standard Windows and Linux drivers Work with Windows XP, Windows Vista and Linux Interface with all types and classes of USB devices

Only functional verification and no performance criterion

Must pass the USB-IF certification tests from USB.org

Aizyc Deliverables

Design and implement the bridge controller in Verilog HDL

Develop top level RTL verification environment with test

plan, test bench and test cases

Choose appropriate FPGA part for porting complete design

Design, layout, manufacturing, assembly of FPGA prototype

platform

Functional testing of FPGA prototype

Design document

Verification document

System design document

Functional test report

USB-IF test report

Verilog source code

Synthesis constraints and scripts

Two working FPGA prototypes


Design Services -Embedded

Device Drivers and Diagnostics

Board Support Package (BSP) development, RTOS bring-up

Download/Flashing/Image signing solutions

Protocol stacks porting/Integration

Linux test automation for silicon validation

Test automation Integration and Regression testing


Embedded Software Capabilities

Capabilities Details

Processors ARM (OMAP 5910, 16xx, 17xx, 24xx, 1230, 2230, 3430, 3530, DM6466, Strong ARM SA110) , PowerPC (IBM405, IBM440, MPC860, MPC8240, MPC8260), MIPS (R-52xx), x86 (386, 486), Pentium, Celeron, Core2Duo, i960, xScale (PXA 255), Micro-controllers

Operating Systems

Embedded Linux, VxWorks, WinCE, Nucleus, NetBSD, FreeBSD and proprietary kernels

Diagnostics POST, Prototype debugging & production diagnostics

Applications MFC based application for diagnostics/downloading, Image signing etc.

Languages C, C++, C#, Java, HTML, XML, Tcl/Tk, PHP, Perl Script, Python, Shell Script, Expect


Android Porting on OMAP Case Study

Required to port Linux on a custom platform with OMAP353x

Ported the following Low level drivers Bootloader (U-Boot) USB2.0, sound and SD Card drivers Linux kernel

Currently involved in porting Android for the same platform for mobile application development


UI / Firmware for Cryogen Control Case Study

Architecture development for the FW and UI of an automated temperature controller

Product designed for medical diagnostics

Developed the complete UI framework

Developed drivers for:

USB2.0 interface for mass storage based data download SD Card for data logging Serial flash for local storage

Tools: C language Microchip IDE/MPLAB


Networking Domain expertise

Designed and developed Layer2 EVC based MAC address table management support based on EVC specifications.

Developed next generation chassis and line-card firmware support for Catalyst 4500 series switches, This solution provides up to 24Gbps data rates per slot. The cards include 10/100/1000BaseT with POE, X2 based 10GE and SFP ports.

Designed and developed firmware support for a non-blocking stub ASIC to provide MAC level link management on Catalyst 4948

Designed and developed management support for 48 port Catalyst 4000 series modular switches that are capable of providing 6Gbps per slot.


Device Drivers

Design / Development of Ethernet driver on Windows 95 / 98 / NT / 2K / Linux / MAC.

Virtual Serial Port driver on Windows/Windows Vista for Serial port server device.

Design and implementation of Bus driver and related software for PCI Express Root Complex verification.

Design and implementation of USB Ethernet driver for Linux/Windows/Windows CE.

Design and implementation of Apple MAC/Linux IrDA driver.


PC Communication

Developed PCMicrocontroller interface via USB All the interface functions on the microcontroller touch

screen GUI were duplicated on the PC interface Full control of the embedded unit remotely from PC Ability to download process data, programmable recipe Data Analysis on the process data Input process data into database Firmware upgradability via USB


Team Size - overview

Product Engineering- 29

ASIC 10

Software-2 Firmware-3

Systems-10

Analytics & BOM - 4

*Median experience of engineering 6+ years


Clientele


Engagement Models

Need Based Consulting Model (NBCM)

Project Based Consulting Model (PBCM)

Shared Risk Model (SRM)

Dedicated Development

Team Model (DDTM)

Aizyc Technology Confidential

Questions, Discussions [email protected]

Aizyc-Presentation.pdf

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