Adi Maual Service Tableta Motion-LE1600-Tablet-PC
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Transcript of Adi Maual Service Tableta Motion-LE1600-Tablet-PC
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Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5
COVER SHEET
Compal Electronics, Inc.
1 48Tuesday, February 22, 2005
2005-02-22REV: 0.5
EDX20 Schematics Document
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PROPRIETARY NOTE
MODEL NAME : EDX20PCB NO : LA-2481
COMPAL CONFIDENTIAL
PVT
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Size Document Number Rev
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EDX20 LA-2481 0.5Block Diagram
2 48Tuesday, February 22, 2005
Compal Electronics, Inc.
SO-DIMM X 1
Dothan-LV
GMCH-M
Transformer
Fan Control X1
uFCBGA CPU
IDSEL:AD20(PIRQA/B#,GNT#2,REQ#2)
Keyboard Controller
LCD 12.1" XGA
3.3V 24.576MHz
VCORE
HA#(3..31)
Intel 915 GMS (Alviso)
Clock Generator
HD#(0..63)
Compal confidential
IDT CV140
5V/3.3V/15V
BANK 0
CHARGER
ICH6-M
3.3V 33MHz
ENE CB712
CRT CONN.
System Bus
609 BGACardBus Controller
Block Diagram
400MHz
1.8V 400MHz
1.5V100MHz
FC-BGA840
AC-LINK
48MHz / 480Mb
& RJ45
MINI PCI
Memory BUS(DDR2)
BATT IN/+2.5V
Slot 0
STAC9758AC97 CODEC
AMP & Phone
1.8V / 0.9V
1.05V(+VCCP)
SIOLPC47N217D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CardReader
Digitizer
Channel A
3.3V 33MHz
SW LED BD
On Board 512MB (8-Cell)
Hydias/Toshiba
ENE KB910
ATA100 HDD 1.8"
DVI ControllerSiL1362/CH7307HDMI CONN.
RTL8110SBLGigabit Lan
PCI BUS
LPC BUS
XBUS
USB 2.0
SDVO
DMI
LVDSpage 5,6
page 17
page 18
page 16page 16
page 26
page 24
page 25 page 25 page 28
page 27page 19,20,21,22
page 35 page 35
page 32,33
page 29
MIC page 30
page 23
page 14
page 12,13
page 8,9,10,11
page 15
page 5
page 42
page 44
page 41
page 42,43
page 45
page 39
IDSEL:AD17(PIRQF#,GNT#3,REQ#3)
page 34BIOS CONN.
Pecos USB port0
Pecos USB port1
LLANO USB port2
Bluetooth USB port6
Finger Printer USB port7
LLANO USB port3
Travel Dock USB port5
LLANO USB port4
TPMSLD9630TT
TPM CONN.
SST39VF0801MB ROM BIOS
page 31
page 31
page 36
page 36
page 36
page 36
page 36
page 36
Docking/CRT
DockingPhone/Mic
DockingRJ45
FPR brd
Mic 1/2/3
BT Module
LVDS TransmitterCH7308LCD 12.1" SXGA
page 17 page 17
FIR
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Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5
NOTE&Revision
Compal Electronics, Inc.
3 48Tuesday, February 22, 2005
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PROPRIETARY NOTE
PORT FUNCTION
USB PORT TABLE
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PORT 5
PORT 6
PORT 7
PECOS PORT 0
PECOS PORT 1
BLUETOOTH
LLANO PORT 0
LLANO PORT 1
LLANO PORT 2
FINGER PRINTER
TRAVEL DOCKING
Voltage Rails
B+
1.5V switched power rail for PCI-E interface
1.8V switched power rail+1.8VS ON
VIN
+3VS 3.3V switched power rail3.3V always on power rail
ON5V always on power rail
2.5V switched power rail for MCH video PLL
ON
+1.5VS+0.9VS
+CPU_COREAC or battery power rail for power circuit
ON
N/A
Power Plane
+VCCP
ON
N/A
12V always on power rail
+1.8V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.ONRTC power
ON
+5VS
RTCVCC
+2.5VS
5V switched power rail
ON
+3VALW
ON
ON
S0-S1
0.9V switched power rail for DDRII VttON
Description
1.05V power rail for Processor I/O and MCH core power
ON
ON
Adapter power supply (19V)
1.8V power rail for DDRII
+5VALW
+12VALW
Core voltage for CPU
OFF
ON*OFF
ON
OFF
OFF
ON
OFFON
ON
OFF
ON ON*
ON ON*OFF
OFF OFF
OFF
N/A
S3
OFFOFFN/A
N/A
OFF
N/A
OFFOFF
OFFOFF
S5
+VCCP
+3VS
OFFOFF
S1
ON
+5VS
+1.5VS
+CPU_COREONONS0
OFF
S3
+12VALWPower Management table
S5 S4/AC don't exist
ON
State
OFF
ON ON
+5VALW
ON ON
S5 S4/AC
+3VALW
+0.9VS
+2.5VS
+1.8V
OFF
Signal +1.8VS
ON
OFF
Address
DDR2 On BoardClock Generator
DEVICEICH6M SM Bus Address
1101 001Xb
DDR2 DIMM11010 000Xb1010 001Xb
TPM
AddressDEVICEEC SM Bus1 Address
Address
ALS TSL2550T
DEVICE
ADM1032
EC SM Bus2 Address
Smart Battery 1
LAN AD17 3 F
G,H
IDSEL #
12 A BCARD BUS
Mini-PCI
DEVICEExternal PCI Devices
REQ/GNT #
AD20
PIRQ
AD18
Smart Battery 2
0001 011Xb
0001 011Xb
1001 100XbTC74A1-5.0VCT(U34) 1001 001XbTC74A2-5.0VCT(U43) 1001 010Xb
AT24C16AN-10SI-2.7(U24) 1011 XXX R/W#b
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Title
Size Document Number R ev
Date: Sheet o f
EDX20 LA-2481 0.5
POWER Tree
4 48Tuesday, February 22, 2005
VinDetector
ISL6227
+1.8VPDC-DC
+VCCPP
LDO+2.5VSP
REF
P3 Batt selectorMAX1538Charger
A Battery
A or B
G965
+1.8VPGD
+VCCP_PWRGD
LDO+0.9VSPAPL5331
B+
FAN5234DC-DC
+5VALW
+1.5VALWP
LM358
+1.2VP
Bridgebattery
+12VALW
VSB
Input Current Sense
IREF FSTCHG
MAX1908SWITCH
RTCCharger
OVERTEMP.PROTECT
BATSELB_A#
FSTCHG
B Battery
+VS
BATT_A+ PIN1
DC-DCMAX1907
P2
+CPU_CORE
CHG_B+
ID PIN2B/I PIN3TS PIN4
RTCVREF
+5VALWP
BATT+
VL
B+VIN SMD PIN5
SMC PIN6
VS
BATT-OVP
BATT_A+ PIN1ID PIN2B/I PIN3TS PIN4SMD PIN5SMC PIN6
VR_ON
OVPProtector
PM_DPRSLPVRH_DPSLP#
SYSPOK
ACOFF
VIN
SUSP#
SUSP
+3VALW
MAINPWRONVGATE
CLKEN#
SPOK
SYSON SYSON#
SUSP#
Output Current Sense
VMB Feedback
PAC
IN
AC
OFF#
MAINPWRON
PACINACIN
SPOKSUSP# DC-DC
MAX1902
2.5VREF
PACIN
+3VALWP
+12VPALWP
VS +5VALWP
VIN
VL
EC_ON#
VIN
VSB
SWITCH
BATT_A
BATT_B
CPU_B+
B+++
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H_SMI#H_STPCLK#
TEST1
H_THERMDAH_THERMDC
H_THERMTRIP#
H_IERR#
ITP_BPM#0
ITP_BPM#2ITP_BPM#3
ITP_BPM#1
ITP_TCK
ITP_TRST#ITP_TMS
H_CPUSLP#
ITP_TDOITP_TDI
ITP_BPM#5
H_DPWR#ITP_BPM#4
H_PROCHOT#
H_DSTBN#2
H_D#48
H_D#46
H_D#27
H_D#25
H_D#4
H_D#52
H_DSTBP#2
H_D#56
H_D#10
H_D#14
H_D#37
H_D#31
H_D#35
H_INTR
H_D#59
H_D#63
H_D#20
H_D#41
H_D#47
H_D#45
H_D#24
H_D#51
H_DSTBN#1
H_DSTBP#1
H_D#55
H_D#3
H_D#34
H_D#9
H_D#30
H_INIT#
H_D#58
H_D#62
H_D#13
H_D#40
H_D#19
H_D#44
H_D#23
H_DSTBP#0
H_DSTBN#0
H_D#54
H_D#2
H_D#29
H_D#50
H_D#8
H_D#6
H_D#57
H_IGNNE#
H_A20M#
H_D#39
H_D#12
H_D#33
H_D#18
H_D#16
H_D#61
H_D#1
H_D#22
H_D#43
H_DSTBN#3
H_D#53
H_D#5
H_D#49
H_D#28
H_D#7
H_D#26
H_D#32
H_FERR#
H_DSTBP#3
H_NMI
H_D#11
H_D#38
H_D#36
H_D#17
H_D#15
H_D#60
H_D#0
H_D#42
H_D#21
H_RS#1
H_A#30
H_A#27
H_A#18
H_A#3
H_A#10
H_BNR#
H_HITM#
H_BR0#
H_LOCK#
H_A#11
H_DEFER#
ITP_DBRESET#
H_A#21
H_A#17
H_A#26
H_A#13
H_A#9
H_ADS#
H_A#7
CLK_CPU_BCLK#
H_ADSTB#0
H_A#25
H_DPSLP#
H_A#20
H_A#16
H_A#8
H_A#6
H_A#12
H_TRDY#
H_HIT#
H_A#28H_A#29
H_ADSTB#1
H_A#23
H_REQ#0
H_RS#0
H_BPRI#
H_DBSY#
H_A#19
H_REQ#2
H_REQ#4
H_A#15
H_A#24
H_A#5
H_DRDY#
H_RS#2
CLK_CPU_BCLK
H_A#14
H_A#31
H_REQ#1
H_A#4
H_A#22
H_RESET#
H_REQ#3
H_DPRSTP#
H_PWRGOOD
TEST2
H_PWRGOOD
TEST2TEST1
THERM#
H_THERMDA
H_THERMDC
SMB_EC_CK2
SMB_EC_DA2
H_PROCHOT#
PROCHOT#
ITP_TDI
ITP_TRST#
H_RESET# ITP_TDO
ITP_TMS
ITP_TCK
CPU_CK_ITPCPU_CK_ITP#CK_ITP#
CK_ITP
H_REQ#[0..4]
H_DPWR#
H_DBSY#H_DPSLP#
H_DPRSTP#
H_PWRGOODH_CPUSLP#
CLK_CPU_BCLK#
H_ADS#H_BNR#
H_THERMTRIP#
H_D#[0..63]
H_A20M#
H_ADSTB#0H_ADSTB#1
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#[0..3]
H_DSTBP#[0..3]
H_HIT#H_DRDY#
H_BR0#
H_HITM#
H_LOCK#H_RESET#
H_FERR# H_IGNNE# H_INIT# H_INTR H_NMI
H_STPCLK# H_SMI#
CLK_CPU_BCLK
H_A#[3..31]
H_BPRI#
H_DEFER#
H_RS#[0..2]
H_TRDY#
SMB_EC_DA2
SMB_EC_CK2
CK_ITP#CK_ITP
ITP_DBRESET#
PROCHOT#
FAN_SPEED1
EC_PWM4
+VCCP
+VCCP
+3VS
+VCCP
+3VS
+5VS
+5VS
+VCCP +VCCP
+VCCP
+3VS
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5Dothan Processor in mFCPGA479
Custom
5 48Tuesday, February 22, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
PWM Fan Control circuit
Thermal Sensor
R21 39.2_0603_1%1 2
R106100_0402_1%
1 2
C83
10U_0805_10V4Z
1
2
R153
56_0402_5%
1 2
C920.1U_0402_16V4Z
1
2
C452
2200P_0402_50V7K
1
2
R39410K_0402_5%@
1
2
R24 680_0402_5%1 2
R154 200_0402_1%1 2
C451
0.1U_0402_16V4Z
1
2
R23 27.4_0402_1%1 2
D2
CH355_SC76
2
1
R73 8.2K_0402_5%1 2
ADDR GROUP
CONTROL GROUP
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
DothanU1A
FOX_PZ47803-2749-01
A3#P4A4#U4A5#V3A6#R3A7#V2A8#W1A9#T4A10#W2A11#Y4A12#Y1A13#U1A14#AA3A15#Y3A16#AA2A17#AF4A18#AC4A19#AC7A20#AC3A21#AD3A22#AE4A23#AD2A24#AB4A25#AC6A26#AD5A27#AE2A28#AD6A29#AF3A30#AE1A31#AF1
REQ0#R2REQ1#P3REQ2#T2REQ3#P1REQ4#T1
ADSTB0#U3ADSTB1#AE5
BCLK0B15BCLK1B14
ITP_CLK0A16ITP_CLK1A15
ADS#N2BNR#L1BPRI#J3BR0#N4DEFER#L4DRDY#H2HIT#K3HITM#K4IERR#A4LOCK#J2RESET#B11
RS0#H1RS1#K1RS2#L2TRDY#M3
BPM0#C8BPM1#B8BPM2#A9BPM3#C9
DBR#A7DBSY#M2DPSLP#B7
DPWR#C19PRDY#A10PREQ#B10PROCHOT#B17
PWRGOODE4SLP#A6TCKA13TDIC12TDOA12TEST1C5TEST2F23TMSC11TRST#B13
THERMDAB18THERMDCA18THERMTRIP#C17
D0# A19D1# A25D2# A22D3# B21D4# A24D5# B26D6# A21D7# B20D8# C20D9# B24
D10# D24D11# E24D12# C26D13# B23D14# E23D15# C25D16# H23D17# G25D18# L23D19# M26D20# H24D21# F25D22# G24D23# J23D24# M23D25# J25D26# L26D27# N24D28# M25D29# H26D30# N25D31# K25D32# Y26D33# AA24D34# T25D35# U23D36# V23D37# R24D38# R26D39# R23D40# AA23D41# U26D42# V24D43# U25D44# V26D45# Y23D46# AA26D47# Y25D48# AB25D49# AC23D50# AB24D51# AC20D52# AC22D53# AC25D54# AD23D55# AE22D56# AF23D57# AD24D58# AF20D59# AE21D60# AD21D61# AF25D62# AF22D63# AF26
DINV0# D25DINV1# J26DINV2# T24DINV3# AD20
DSTBN0# C23DSTBN1# K24DSTBN2# W25DSTBN3# AE24DSTBP0# C22DSTBP1# L24DSTBP2# W24DSTBP3# AE25
A20M# C2FERR# D3
IGNNE# A3INIT# B5
LINT0 D1LINT1 D4
STPCLK# C6SMI# B4
DPRSTP#G1
G
D
S
Q9FDN359AN_SOT23
2
1
3
R22 150_0402_5%1 2
R3961K_0402_5%
1
2
R398 0_0402_5%@1 2
R26
54.9_0402_1%
1
2
R93 10K_0402_5%@1 2
R27
54.9_0402_1%
1
2
R1571K_0402_5%@ 12
C86 1000P_0402_50V7K1 2
R40056_0402_5%
1
2
JP5
MOLEX_53780-0310
112233
C
BE
Q372SC2411K_SC59
1
2
3
R399 0_0402_5%@1 2
R1871K_0402_5%@ 12
U36
G781_SOP8
VDD1 1
ALERT# 6
THERM# 4
GND 5
D+2
D-3
SCLK8
SDATA7
R39756_0402_5%
1
2
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3
2
2
1
1
D D
C C
B B
A A
VCCSENSEVSSSENSE
CPU_BSEL0CPU_BSEL1
+CPU_GTLREF
COMP3
COMP0COMP1COMP2
CPU_BSEL0CPU_BSEL1
CPU_VID0CPU_VID1CPU_VID2CPU_VID3CPU_VID4CPU_VID5
+VCCP
+VCC_CORE
+1.8VS
+VCCP
+VCC_CORE
+1.5VS
+CPU_VCCA
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5Dothan Processor in mFCPGA479
Custom
6 48Tuesday, February 22, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.
Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.
+1.8VS FOR NON-LV/ULV PROCESSOR+1.5VS FOR LV/ULV PROCESSOR
C248220P_0402_50V7K@
1
2
R27954.9_0402_1%@
1 2
C
1
5
3
0
.
0
1
U
_
0
4
0
2
_
1
6
V
7
K
1
2
C2421U_0603_10V4Z@
1
2
T8 PAD
Dothan
P
O
W
E
R
,
G
R
O
U
N
G
,
R
E
S
E
R
V
E
D
S
I
G
N
A
L
S
A
N
D
N
C
U1B
FOX_PZ47803-2749-01
PSI#E1
GTLREFAD26
VCCQ0P23VCCQ1W4
VCCSENSEAE7VSSSENSEAF6
BSEL0C16BSEL1C14
VCCA0F26VCCA1B1VCCA2N1VCCA3AC26
VCCPD10VCCPD12VCCPD14VCCPD16VCCPE11VCCPE13VCCPE15VCCPF10VCCPF12VCCPF14VCCPF16VCCPK6VCCPL5VCCPL21VCCPM6VCCPM22VCCPN5VCCPN21VCCPP6VCCPP22VCCPR5VCCPR21VCCPT6VCCPT22VCCPU21
VCCD6VCCD8VCCD18VCCD20VCCD22VCCE5VCCE7VCCE9VCCE17VCCE19VCCE21VCCF6VCCF8VCCF18
VID0E2VID1F2VID2F3VID3G3VID4G4VID5H4
COMP0P25COMP1P26COMP2AB2COMP3AB1
RSVDAF7
RSVDC3RSVDE26
VSS A2VSS A5VSS A8VSS A11VSS A14VSS A17VSS A20VSS A23VSS A26VSS B3VSS B6VSS B9VSS B12VSS B16VSS B19VSS B22VSS B25VSS C1VSS C4VSS C7VSS C10VSS C13VSS C15VSS C18VSS C21VSS C24VSS D2VSS D5VSS D7VSS D9VSS D11VSS D13VSS D15VSS D17VSS D19VSS D21VSS D23VSS D26VSS E3VSS E6VSS E8VSS E10VSS E12VSS E14VSS E16VSS E18VSS E20VSS E22VSS E25VSS F1VSS F4VSS F5VSS F7VSS F9VSS F11VSS F13VSS F15VSS F17VSS F19VSS F21VSS F24VSS G2VSS G6VSS G22VSS G23VSS G26VSS H3VSS H5VSS H21VSS H25VSS J1VSS J4VSS J6VSS J22VSS J24VSS K2VSS K5VSS K21VSS K23VSS K26VSS L3VSS L6VSS L22VSS L25VSS M1
RSVDAC1R2
2
0
2
7
.
4
_
0
4
0
2
_
1
%
1
2
C
1
5
1
1
0
U
_
1
2
0
6
_
6
.
3
V
6
M
1
2
R2492K_0402_1%
1
2
R
2
6
7
5
4
.
9
_
0
4
0
2
_
1
%
1
2
R247
1K_0402_1%
1
2
R193 0_0805_5%@1 2
T18 PADT17 PAD
R27854.9_0402_1%@
1 2
R188 0_0805_5%1 2
R
2
2
4
5
4
.
9
_
0
4
0
2
_
1
%
1
2
Dothan
POWER, GROUND
U1C
FOX_PZ47803-2749-01
VCCF20VCCF22VCCG5VCCG21VCCH6VCCH22VCCJ5VCCJ21VCCK22VCCU5VCCV6VCCV22VCCW5VCCW21VCCY6VCCY22VCCAA5VCCAA7VCCAA9VCCAA11VCCAA13VCCAA15VCCAA17VCCAA19VCCAA21VCCAB6VCCAB8VCCAB10VCCAB12VCCAB14VCCAB16VCCAB18VCCAB20VCCAB22VCCAC9VCCAC11VCCAC13VCCAC15VCCAC17VCCAC19VCCAD8VCCAD10VCCAD12VCCAD14VCCAD16VCCAD18VCCAE9VCCAE11VCCAE13VCCAE15VCCAE17VCCAE19VCCAF8VCCAF10VCCAF12VCCAF14VCCAF16VCCAF18
VSSM4VSSM5VSSM21VSSM24VSSN3VSSN6VSSN22VSSN23VSSN26VSSP2VSSP5VSSP21VSSP24VSSR1VSSR4VSSR6VSSR22VSSR25VSST3VSST5VSST21VSST23
VSS T26VSS U2VSS U6VSS U22VSS U24VSS V1VSS V4VSS V5VSS V21VSS V25VSS W3VSS W6VSS W22VSS W23VSS W26VSS Y2VSS Y5VSS Y21VSS Y24VSS AA1VSS AA4VSS AA6VSS AA8VSS AA10VSS AA12VSS AA14VSS AA16VSS AA18VSS AA20VSS AA22VSS AA25VSS AB3VSS AB5VSS AB7VSS AB9VSS AB11VSS AB13VSS AB15VSS AB17VSS AB19VSS AB21VSS AB23VSS AB26VSS AC2VSS AC5VSS AC8VSS AC10VSS AC12VSS AC14VSS AC16VSS AC18VSS AC21VSS AC24VSS AD1VSS AD4VSS AD7VSS AD9VSS AD11VSS AD13VSS AD15VSS AD17VSS AD19VSS AD22VSS AD25VSS AE3VSS AE6VSS AE8VSS AE10VSS AE12VSS AE14VSS AE16VSS AE18VSS AE20VSS AE23VSS AE26VSS AF2VSS AF5VSS AF9VSS AF11VSS AF13VSS AF15VSS AF17VSS AF19VSS AF21VSS AF24
R
2
7
4
2
7
.
4
_
0
4
0
2
_
1
%
1
2
T5 PAD
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCCP
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5
CPU BypassCustom
7 48Tuesday, February 22, 2005
Compal Electronics, Inc.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
9 mOhm7343PS CAP
9 mOhm7343PS CAP
9 mOhm7343PS CAP
9 mOhm7343PS CAP
Near VCORE regulator.
C23110U_1206_6.3V6M
1
2
H2HOLEA
1
C16910U_1206_6.3V6M
1
2
H10HOLED
1
FD51
H16HOLEA
1
H50HOLEE
1
+C187
150U_D2_4VM
1
2
C24410U_1206_6.3V6M
1
2
C21210U_1206_6.3V6M
1
2
FD31
C21010U_1206_6.3V6M
1
2
C27510U_1206_6.3V6M@
1
2
C1500.1U_0402_16V4Z
1
2
C1480.1U_0402_16V4Z
1
2
H18HOLEA
1
H5HOLEA
1
C28110U_1206_6.3V6M@
1
2
C16110U_1206_6.3V6M
1
2
C27810U_1206_6.3V6M@
1
2
C17010U_1206_6.3V6M
1
2
C24710U_1206_6.3V6M
1
2
C1750.1U_0402_16V4Z
1
2
C1390.1U_0402_16V4Z
1
2
H23HOLEB
1
C22710U_1206_6.3V6M
1
2
CF21
CF41
CF11
CF81
C18410U_1206_6.3V6M
1
2
C16010U_1206_6.3V6M
1
2
H29HOLEE
1
H27HOLEA
1
+
C
2
5
2
3
3
0
U
_
D
2
E
_
2
.
5
V
M
_
R
9
@
1
2
H25HOLEC
1
C23210U_1206_6.3V6M
1
2
H28HOLEA
1
C27410U_1206_6.3V6M@
1
2
+
C
2
3
8
3
3
0
U
_
D
2
E
_
2
.
5
V
M
_
R
9
1
2
H7HOLEB
1
H3HOLED
1
C24310U_1206_6.3V6M
1
2
C23710U_1206_6.3V6M
1
2
FD11
H9HOLEA
1
C27610U_1206_6.3V6M@
1
2
C1490.1U_0402_16V4Z
1
2
H6HOLEA
1
CF31
C2020.1U_0402_16V4Z
1
2
C19510U_1206_6.3V6M
1
2
H20HOLEA
1
CF101
+
C
2
6
0
3
3
0
U
_
D
2
E
_
2
.
5
V
M
_
R
9
1
2
C28010U_1206_6.3V6M@
1
2
H19HOLED
1
H26HOLEA
1
C24610U_1206_6.3V6M
1
2
C17810U_1206_6.3V6M
1
2
CF71
H4HOLEA
1
C24510U_1206_6.3V6M
1
2
C27710U_1206_6.3V6M@
1
2
C2340.1U_0402_16V4Z
1
2
H1HOLEE
1
C27910U_1206_6.3V6M@
1
2
H8HOLEA
1
C2150.1U_0402_16V4Z
1
2
C19610U_1206_6.3V6M
1
2
H17HOLEA
1
C1880.1U_0402_16V4Z
1
2
C15610U_1206_6.3V6M
1
2
C2250.1U_0402_16V4Z
1
2
FD41
C21110U_1206_6.3V6M
1
2
H24HOLEB
1
FD61
H12HOLEA
1
H21HOLEA
1
H13HOLEB
1
CF61
CL2HOLED
1
CF51
H11HOLEB
1
CF111
C17910U_1206_6.3V6M
1
2
H15HOLEB
1
C23610U_1206_6.3V6M
1
2
CF91
C27310U_1206_6.3V6M@
1
2
CF121
FD21
CL3HOLED
1
C15510U_1206_6.3V6M
1
2
H14HOLEA
1
H22HOLED
1
C16210U_1206_6.3V6M
1
2
C18310U_1206_6.3V6M
1
2
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWNG1
H_A#6
H_A#31
H_A#28
H_A#14
H_A#24
H_A#4
H_A#22
H_A#8H_A#9
H_A#18
H_A#27
H_A#19
H_A#16
H_A#21
H_A#25
H_A#7
H_A#17
H_A#30
H_A#5
H_A#10
H_A#3
H_A#26
H_A#15
H_A#20
H_A#23
H_A#11
H_A#13
H_A#29
H_A#12
H_D#11
H_D#23
H_D#46
H_D#21
H_D#2
H_D#50
H_D#31
H_D#37
H_D#58
H_D#35
H_D#39
H_D#27
H_D#5
H_D#52
H_D#30
H_D#8
H_D#10
H_D#51
H_D#44
H_D#60
H_D#18
H_D#4
H_D#43
H_D#56
H_D#59
H_D#14
H_D#63
H_D#28
H_D#48
H_D#3
H_D#62
H_D#34
H_D#36
H_D#24
H_D#13
H_D#55
H_D#57
H_D#22
H_D#20
H_D#16
H_D#29
H_D#9
H_D#1H_D#0
H_D#53
H_D#17
H_D#26
H_D#45
H_D#33
H_D#40
H_D#7
H_D#47
H_D#41
H_D#25
H_D#38
H_D#15
H_D#54
H_D#61
H_D#49
H_D#42
H_D#6
H_D#32
H_D#12
H_D#19
PM_BMBUSY#
VGATEH_THERMTRIP#
H_REQ#4
H_REQ#0
H_REQ#2H_REQ#1
H_REQ#3
H_ADSTB#1H_ADSTB#0
H_DSTBN#3
H_DSTBN#1H_DSTBN#0
H_DSTBP#0
H_DSTBN#2
H_DSTBP#3H_DSTBP#2H_DSTBP#1
CLK_MCH_BCLK#CLK_MCH_BCLK
H_R_CPUSLP#
H_DRDY#
H_TRDY#
H_BR0#
H_ADS#
H_HIT#H_HITM#
H_LOCK#
H_BPRI#H_BNR#
H_DEFER#
H_DBSY#
H_DPWR#
H_RESET#
H_RS#2
H_RS#0H_RS#1
H_XSCOMP
H_YSCOMPH_YRCOMP
H_XRCOMP
H_SWNG0H_SWNG1
H_SWNG0
EC_EXTTS#0
H_VREF
MCH_CLKSEL0
CFG6CFG5
MCH_CLKSEL1
DDR_ODT2DDR_ODT3
DDR_CS2#
DDR_CS0#DDR_CS1#
DDR_CKE3
DDR_CKE1DDR_CKE2
DDR_CKE0
DDR_CLK0#DDR_CLK1#
DDR_CLK3#DDR_CLK4#
DDR_CLK0DDR_CLK1
DDR_CLK3
DMI_RXP1DMI_RXP0
DMI_RXN0DMI_RXN1
DMI_TXP0DMI_TXP1
DMI_TXN0DMI_TXN1
DDR_VREFSMRCOMPPSMRCOMPN
H_CPUSLP# H_R_CPUSLP#
CFG0
M_OCDOCMP0M_OCDOCMP1
DREFCLKDREFCLK#
DDR_CS3#
DREF_SSCLKDREF_SSCLK#
DDR_CLK4
CFG0
CFG5
CFG6
DDR_VREF
DDR_ODT0DDR_ODT1
PLT_RST#
EC_EXTTS#0
H_A#[3..31] H_D#[0..63]
H_REQ#[0..4]
H_ADSTB#0H_ADSTB#1
CLK_MCH_BCLK#CLK_MCH_BCLK
H_DSTBN#[0..3]
H_DSTBP#[0..3]
H_DINV#0H_DINV#1H_DINV#2H_DINV#3
H_RESET#
H_ADS#H_TRDY#H_DPWR#H_DRDY#H_DEFER#
H_HITM#H_HIT#H_LOCK#
DMI_TXN0DMI_TXN1
DMI_TXP0DMI_TXP1
DMI_RXP1
DMI_RXN0DMI_RXN1
DMI_RXP0
DDR_CLK0DDR_CLK1
DDR_CLK3
DDR_CLK0#DDR_CLK1#
DDR_CLK3#DDR_CLK4#
DDR_CKE0DDR_CKE1DDR_CKE2DDR_CKE3
DDR_CS2#
DDR_CS0#DDR_CS1#
DDR_CS3#
DDR_ODT0DDR_ODT1DDR_ODT2DDR_ODT3
MCH_CLKSEL1 MCH_CLKSEL0
PM_BMBUSY#
H_BPRI#H_BNR#H_BR0#
H_DBSY#
H_RS#[0..2]
H_CPUSLP#
H_THERMTRIP# VGATE
DDR_VREF
DREFCLK# DREFCLK DREF_SSCLK DREF_SSCLK#
DDR_CLK4
PLT_RST#
EC_EXTTS#0
+VCCP
+VCCP
+VCCP
+VCCP
+2.5VS
+1.8VS
+1.8V
+VCCP
DDR_VREF
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5Alviso(1 of 4)
Custom
8 48Tuesday, February 22, 2005
Compal Electronics, Inc.
Note:Not install MCH-R for Dothan-A,Install MCH-R for Dothan-B"
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout Note:Route as shortas possible
MCH-R
High = DMI x 4Low = DMI x 2 *
*Low = DDR-II
Refer to page15 for FSBfrequency select
High = DDR-I
CFG[2:0]
CFG6
CFG5
C
5
2
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R470_0402_5%1 2
R
3
9
1
0
0
_
0
4
0
2
_
1
%
1
2
R
7
5
1
0
0
_
0
4
0
2
_
1
%
1
2
D
M
I
D
D
R
M
U
X
I
N
G
C
F
G
/
R
S
V
D
P
M
C
L
K
U31B
ALVISO_BGA840
DMI_RXN0V24DMI_RXN1W29
DMI_RXP0U24DMI_RXP1V29
DMI_TXN0V26DMI_TXN1W31
DMI_TXP0U26DMI_TXP1V31
SM_CK0AE31SM_CK1AF5
SM_CK3AJ29SM_CK4AH5
SM_CK0#AF31SM_CK1#AE5
SM_CK3#AJ28SM_CK4#AJ5
SM_CKE0AC23SM_CKE1AC25SM_CKE2AH21SM_CKE3AJ21
SM_CS0#AD11SM_CS1#AG13SM_CS2#AL14SM_CS3#AH12
SMOCDCOMP0AB27SMOCDCOMP1AE9SM_ODT0AF12SM_ODT1AG12SM_ODT2AK13SM_ODT3AJ12
SMRCOMPNAD7SMRCOMPPAE7SMVREF0Y30SMVREF1AE1SMXSLEWINY24SMXSLEWOUTAA25SMYSLEWINAC10SMYSLEWOUTAD10
CFG0 D15CFG1 E17CFG2 F15CFG5 G17CFG6 H17
RSVD23 H19RSVD24 F29RSVD25 E27
BM_BUSY# J26EXT_TS0# J27
THRMTRIP# J18PWROK W27RSTIN# W25
DREF_CLKN A22DREF_CLKP A21
DREF_SSCLKN H31DREF_SSCLKP J31
RSVD1 W2
R41 2.2K_0402_5%1 2
C
5
9
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C
7
1
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R
5
0
1
0
0
_
0
4
0
2
_
1
%
1
2
R92 80.6_0402_1%1 2
H
O
S
T
AlvisoU31A
ALVISO_BGA840
HD0# F5HD1# F2HD2# E2HD3# J5HD4# F3HD5# G3HD6# F4HD7# E3HD8# J9HD9# F6
HD10# J7HD11# J8HD12# J1HD13# F1HD14# K9HD15# G7HD16# K3HD17# K4HD18# P1HD19# R2HD20# K5HD21# J3HD22# J2HD23# L5HD24# U8HD25# K7HD26# U9HD27# V9HD28# R1HD29# K6HD30# U3HD31# R9HD32# V3HD33# V4HD34# R6HD35# P5HD36# P3HD37# R8HD38# P7HD39# P9HD40# W3HD41# R4HD42# R3HD43# R5HD44# U6HD45# U5HD46# V5HD47# V6HD48# W7HD49# W8HD50# W1HD51# V2HD52# W4HD53# Y2HD54# Y5HD55# AA9HD56# AA8HD57# AA1HD58# V7HD59# AA6HD60# Y6HD61# Y8HD62# W9HD63# Y7
HA3#C6HA4#G11HA5#E12HA6#B8HA7#C11HA8#B11HA9#C9HA10#A11HA11#D12HA12#F13HA13#E11HA14#A13HA15#C12HA16#G12HA17#G14HA18#J14HA19#G13HA20#H14HA21#B13HA22#A14HA23#C13HA24#J15HA25#H12HA26#E13HA27#C14HA28#F14HA29#E14HA30#D13HA31#B14
HREQ0#A8HREQ1#B7HREQ2#A9HREQ3#A7HREQ4#J12HADSTB0#F11HADSTB1#H15
HCLKNAA3HCLKPY3
HVREF J11HXRCOMP K1HXSCOMP E6HYRCOMP L1HYSCOMP K2
HYSWING L3HXSWING J13
HDSTBN0#G5HDSTBN1#K8HDSTBN2#U1HDSTBN3#AA4HDSTBP0#G4HDSTBP1#L9HDSTBP2#U2HDSTBP3#AA5HDINV0#J6HDINV1#L7HDINV2#R7HDINV3#W5
HCPURST#F7
HADS#G9HTRDY#E9HDPWR#G1HDRDY#A4HDEFER#E5
HHITM#C3HHIT#B2HLOCK#C4HBREQ0#F9HBNR#E8HBPRI#B3HDBSY#F8HCPUSLP#C5HRS0#A5HRS1#B5HRS2#C7
R
4
5
5
4
.
9
_
0
4
0
2
_
1
%
1
2
C
5
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C
6
2
2
2
0
P
_
0
4
0
2
_
5
0
V
7
K
1
2
R34
1K_0402_1%
1
2
R
4
4
4
0
.
2
_
0
4
0
2
_
1
%
@
1
2
R12 10K_0402_5%12
R
7
4
2
4
.
9
_
0
4
0
2
_
1
%
1
2
R
3
5
2
2
1
_
0
6
0
3
_
1
%
1
2
R31 10K_0402_5%12
R
7
8
2
2
1
_
0
6
0
3
_
1
%
1
2
R
4
8
2
0
0
_
0
4
0
2
_
1
%
1
2
R
9
4
4
0
.
2
_
0
4
0
2
_
1
%
@
1
2
R
5
8
2
4
.
9
_
0
4
0
2
_
1
%
1
2
R38 2.2K_0402_5%1 2
R96 80.6_0402_1%1 2
R37
1K_0402_1%
1
2
R
5
7
5
4
.
9
_
0
4
0
2
_
1
%
1
2
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_DQ5
DDR_DQ3
DDR_DQ10
DDR_DQ4
DDR_DQ1
DDR_DQ11
DDR_DQ2
DDR_DQ8
DDR_DQ6
DDR_DQ9
DDR_DQ7
DDR_DM5
DDR_ABA0DDR_ABA1
DDR_DQ17
DDR_DQ12DDR_DQ13
DDR_DQ16
DDR_DQ22
DDR_DQ15
DDR_DQ23
DDR_DQ20
DDR_DQ14
DDR_DQ21
DDR_DQ18DDR_DQ19
DDR_DQ29
DDR_DQ24
DDR_DQ28
DDR_DQ34
DDR_DQ27
DDR_DQ35
DDR_DQ32
DDR_DQ26
DDR_DQ33
DDR_DQ30
DDR_DQ44
DDR_DQ47DDR_DQ46
DDR_DQ40
DDR_DQ37DDR_DQ36
DDR_DQ41
DDR_DQ43DDR_DQ42
DDR_DQ45
DDR_DQ38
DDR_DQ53
DDR_DQ48DDR_DQ49
DDR_DQ52
DDR_DQ58
DDR_DQ51
DDR_DQ59
DDR_DQ56
DDR_DQ50
DDR_DQ57
DDR_DQ54DDR_DQ55
DDR_DQ63
DDR_DQ61DDR_DQ60
DDR_DQ62
DDR_AA1DDR_AA2DDR_AA3DDR_AA4DDR_AA5DDR_AA6
DDR_AA8
DDR_AA10DDR_AA11
DDR_ABA2
DDR_DM0DDR_DM1
DDR_DM3DDR_DM4
DDR_DM2
DDR_DM7DDR_DM6
DDR_DQS1DDR_DQS2DDR_DQS3DDR_DQS4DDR_DQS5DDR_DQS6DDR_DQS7
DDR_ACAS#DDR_ARAS#
DDR_AWE#
DDR_DQS#0DDR_DQS#1DDR_DQS#2DDR_DQS#3DDR_DQS#4DDR_DQS#5DDR_DQS#6DDR_DQS#7
TP_MA_RCVENIN#TP_MA_RCVENOUT#
DDR_DQS0
DDR_AA9
DDR_AA12
DDR_DQ25
DDR_DQ31
DDR_DQ0
DDR_DQ39
DDR_AA0
DDR_AA7
DDR_BCAS#
DDR_BWE#DDR_BRAS#
DDR_BA7
DDR_BA2DDR_BA3
DDR_BA5
DDR_BA0DDR_BA1
DDR_BA9
DDR_BA12
DDR_BA4
DDR_BA6
DDR_BA8
DDR_BA13
DDR_BA11DDR_BA10
DDR_BBA0DDR_BBA1DDR_BBA2
DDR_AA13
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_AA[0..12]
DDR_ACAS#DDR_ARAS#
DDR_AWE#
DDR_DM[0..7]
DDR_ABA0DDR_ABA1
DDR_DQ[0..63]
DDR_BCAS#DDR_BRAS#DDR_BWE#
DDR_BA[0..13]
DDR_BBA0DDR_BBA1DDR_BBA2
+2.5VS
Title
Size Document Number Rev
Date: Sheet o fEDX20 LA-2481 0.5
Alviso(2 of 4)Custom
9 48Tuesday, February 22, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Sonoma_Platform_MOW_04WW25
T3 PADT1 PAD
VSS
U31G
ALVISO_BGA840
VSSA15VSSA18VSSA20VSSA25VSSA27VSSAA2VSSAA23VSSAA26VSSAA27VSSAA7VSSAB28VSSAB30VSSAC24VSSAC28VSSAC9VSSAD12VSSAD15VSSAD19VSSAD2VSSAD21VSSAD5VSSAD9VSSAE10VSSAE11VSSAE13VSSAE26VSSAE30VSSAF11VSSAF15VSSAF19VSSAF23VSSAF28VSSAF30VSSAF7VSSAG2VSSAG21VSSAG25VSSAG3VSSAH10VSSAH13VSSAH15VSSAH19VSSAH6VSSAJ27VSSAJ3VSSAK12VSSAK15VSSAK19VSSAK21VSSAK23VSSAK26VSSAK29VSSAK5VSSAK9VSSB12VSSB15
VSSB27VSSB4VSSB6VSSB9VSSC15VSSC17VSSC19VSSC2VSSC25
VSSALVDS B30
VSSC30VSSC8VSSD11VSSD14
VSS D18VSS D19VSS D25VSS E15VSS E21VSS E23VSS E26VSS E29VSS E30VSS E4VSS E7VSS F12VSS F17VSS F23VSS F27VSS G15VSS G2VSS G21VSS G22VSS G25VSS G29VSS G31VSS G6VSS G8VSS H11VSS H13VSS H18VSS H20VSS H23VSS H26VSS H30VSS J17VSS J20VSS J22VSS J4VSS L2VSS L25VSS L27VSS L29VSS L4VSS L6VSS L8VSS M23VSS M25VSS M27VSS M29VSS N25VSS N27VSS N29VSS N31VSS P2VSS P23VSS P25VSS P27VSS P29VSS P4VSS P6VSS P8VSS R16VSS R24VSS R25VSS R26VSS R27VSS R29VSS U15VSS U17
VSSB22
VSSU23VSSU25VSSU27
V
S
S
U
2
9
V
S
S
U
3
1
V
S
S
U
4
VSS U7
V
S
S
W
2
4
V
S
S
W
2
6
V
S
S
W
2
8
V
S
S
W
3
0
V
S
S
W
6
V
S
S
Y
2
3
V
S
S
Y
2
5
V
S
S
Y
2
6
V
S
S
Y
2
9
V
S
S
Y
3
1
V
S
S
Y
4
V
S
S
Y
9
V
S
S
V
2
7
VSS V30
VSS V1VSS V25
VSSV28 VSS V8
T2 PAD
R1610K_0402_5%
1
2
T4 PAD
U31F
ALVISO_BGA840
NCM13NCM14NCM15NCM16NCM17NCM18NCM19NCM20NCM21NCM22NCN10NCN11NCN12NCN13NCN14NCN15NCN16NCN17NCN18NCN19NCN20NCN21NCN22NCP10NCP11NCP12NCP13NCP14NCP15NCP16NCP17NCP18NCP19NCP20NCP21NCP22NCR10NCR11NCR12NCR13NCR14NCR18NCR19NCR20NCR21NCR22NCT11NCT12NCT13NCT14
NC A10NC A2NC A29NC A3
NC A31NC AA10NC AA11NC AA12NC AA13NC AA14NC AA15NC AA16NC AA17NC AA18NC AA19NC AA20NC AA21NC AA22NC AB1NC AB10NC AB11NC AB12NC AB13NC AB14NC AB15NC AB17NC AB19NC AB2NC AB20NC AB21NC AB22NC AB3NC AB5NC AB6NC AB7NC AB9NC AC22NC AE22NC AF22NC AG22NC AJ1NC AJ22NC AJ31NC AK1NC AK22NC AK31NC AL1NC AL2NC AL22NC AL29NC AL3NC AL30NC AL31NC B1NC B10NC B31NC C1NC C10NC C31NC E10NC F10NC G10NC J10NC K10NC K11NC K12NC K13NC K14NC K15NC K17NC K18NC K19NC K20NC K21NC K22NC K23NC K25NC K26NC K27NC K29NC K30NC K31NC L10NC L11NC L12NC L13NC L14NC L15NC L16NC L17NC L18NC L19NC L20NC L21NC L22NC M10NC M11NC M12
NCT18NCT19NCT20NCT21NCU10NCU11NCU12NCU13NCU14NCU18NCU19NCU20NCU21NCU22NCV10NCV11NCV12NCV13NCV14NCV15NCV16NCV17NCV18NCV19NCV20NCV21NCV22NCW10NCW11NCW12NCW13NCW14NCW15NCW16NCW17NCW18NCW19NCW20NCW21NCW22NCY10NCY11NCY12NCY13NCY14NCY15NCY16NCY17NCY18NCY19 NC Y20
NC Y21NC Y22
NC A30
NCAB18
D
D
R
2
_
D
A
T
A
D
D
R
2
_
A
D
D
R
_
B
D
D
R
2
_
A
D
D
R
_
A
D
D
R
2
_
D
Q
S
D
D
R
2
_
A
D
D
R
_
A
U31C
ALVISO_BGA840
SA_DQ0 Y27SA_DQ1 Y28SA_DQ2 AC29SA_DQ3 AE29SA_DQ4 AA28SA_DQ5 AA29SA_DQ6 AB31SA_DQ7 AC30SA_DQ8 AG29SA_DQ9 AG28
SA_DQ10 AJ26SA_DQ11 AL26SA_DQ12 AG30SA_DQ13 AG31SA_DQ14 AL27SA_DQ15 AK27SA_DQ16 AF29SA_DQ17 AE28SA_DQ18 AE25SA_DQ19 AE24SA_DQ20 AE27SA_DQ21 AF27SA_DQ22 AE23SA_DQ23 AC26SA_DQ24 AL25SA_DQ25 AJ25SA_DQ26 AG27SA_DQ27 AG26SA_DQ28 AK25SA_DQ29 AL24SA_DQ30 AG23SA_DQ31 AG24SA_DQ32 AK11SA_DQ33 AL11SA_DQ34 AJ7SA_DQ35 AL9SA_DQ36 AL12SA_DQ37 AJ11SA_DQ38 AH9SA_DQ39 AJ9SA_DQ40 AG10SA_DQ41 AF10SA_DQ42 AH7SA_DQ43 AF6SA_DQ44 AH11SA_DQ45 AG11SA_DQ46 AG6SA_DQ47 AE6SA_DQ48 AL7SA_DQ49 AK7SA_DQ50 AK2SA_DQ51 AJ2SA_DQ52 AK6SA_DQ53 AJ6SA_DQ54 AK3SA_DQ55 AH2SA_DQ56 AH1SA_DQ57 AG1SA_DQ58 AC6SA_DQ59 AC7SA_DQ60 AF3SA_DQ61 AE3SA_DQ62 AD3SA_DQ63 AC2
SA_DM0AA31SA_DM1AJ30SA_DM2AF24SA_DM3AK24SA_DM4AJ10SA_DM5AG7SA_DM6AL5SA_DM7AD6
SA_DQS0AB29SA_DQS1AL28SA_DQS2AF25SA_DQS3AJ23SA_DQS4AK10SA_DQS5AG9SA_DQS6AH3SA_DQS7AE2
SA_DQS0#AA30SA_DQS1#AK28SA_DQS2#AF26SA_DQS3#AJ24SA_DQS4#AL10SA_DQS5#AF9SA_DQS6#AG5SA_DQS7#AF2
SA_MA0AC21SA_MA1AC20SA_MA2AC19SA_MA3AD20SA_MA4AE19SA_MA5AE20SA_MA6AF20SA_MA7AF21SA_MA8AE21SA_MA9AA24SA_MA10AC11SA_MA11AB23SA_MA12AB24SA_MA13AF13
SA_CAS#AE12SA_RAS#AG15SA_RCVENIN#AC27SA_RCVENOUT#AB26SA_WE#AJ15
SB_MA0AC12SB_MA1AE14SB_MA2AC15SB_MA3AD14SB_MA4AG19SB_MA5AJ19SB_MA6AJ20SB_MA7AK20SB_MA8AL19SB_MA9AH20SB_MA10AF14SB_MA11AL20SB_MA12AG20SB_MA13AL13
SB_BS0AJ14SB_BS1AG14SB_BS2AL21
SB_CAS#AJ13SB_RAS#AH14SB_WE#AK14
SA_BS0AE15SA_BS1AD13SA_BS2AB25
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TXA1+
ENVDD
TXA2+
TXA0-
TXACLK-
LDDC_DATA
TXA1-
TXACLK+
TXA2-
TXA0+
LIBG
SDVO_INT+
SDVO_INT-
SDVO_R+
SDVO_B+SDVO_G+
SDVO_CLK+
SDVO_CLK-
SDVO_R-SDVO_G-SDVO_B-
ENABLT_R
ENABLT_R
LDDC_CLK
LDDC_CLK
LDDC_DATA LCD_DDCDATA
LCD_DDCCLK
SDVO_CLK-
SDVO_R-SDVO_G-SDVO_B-
SDVO_R+
SDVO_B+SDVO_G+
SDVO_CLK+
CRT_DDCDACRT_DDCCL
CRT_DDCCL
CRT_DDCDA 3VDDCDA
3VDDCCL
GM_PWM_L
TXACLK-TXACLK+
TXA0+
TXA2+TXA1+
TXA2-TXA1-TXA0-
ENVDD
SDVO_SDATSDVO_SCLK
CLK_MCH_3GPLL#CLK_MCH_3GPLL
SDVOB_INT-
SDVOB_INT+
SDVOB_CLK- SDVOB_B-
SDVOB_G+
SDVOB_G-
SDVOB_R+
SDVOB_B+
SDVOB_R-
SDVOB_CLK+
ENABKL
CRT_B
CRT_G
CRT_R
LCD_DDCCLK
LCD_DDCDATA
2CH_SDVOB_CLK- 2CH_SDVOB_B- 2CH_SDVOB_G- 2CH_SDVOB_R-
2CH_SDVOB_G+ 2CH_SDVOB_R+
2CH_SDVOB_B+ 2CH_SDVOB_CLK+
CRT_VSYNCCRT_HSYNC
3VDDCDA
3VDDCCL
GM_PWM_L
+1.5VS_PCIE
+2.5VS +5VS
+2.5VS
+2.5VS
+3VS +2.5VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5Alviso(3 of 4)
Custom
10 48Tuesday, February 22, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
G
DS
Q542N7002_SOT23
2
13
R
3
8
8
4
.
9
9
K
_
0
6
0
3
_
1
%
1
2
R28
150_0402_5%
12
C37 0.1U_0402_16V4Z
C34 0.1U_0402_16V4ZC12 0.1U_0402_16V4Z
R
1
1
5
4
2
.
2
K
_
0
4
0
2
_
5
%
1
2
R8 1.5K_0402_1%1 2
C40
0.1U_0402_16V4Z
R25
150_0402_5%
12
R
1
1
5
5
2
.
2
K
_
0
4
0
2
_
5
%
1
2
R4
2.2K_0402_5%
1
2C404 0.1U_0402_16V4Z
@2CH
C49 0.1U_0402_16V4Z
C31 0.1U_0402_16V4Z
C402 0.1U_0402_16V4Z@2CH
C406 0.1U_0402_16V4Z@2CH
G
DSQ552N7002_SOT23
2
13
C16 0.1U_0402_16V4Z
G
DSQ32N7002_SOT23
2
13
G
DS
Q22N7002_SOT23
2
13
R
1
2
.
2
K
_
0
4
0
2
_
5
%
1
2
R1152
39_0402_5%
12
R
2
2
.
2
K
_
0
4
0
2
_
5
%
1
2
R1153
39_0402_5%
12
C405 0.1U_0402_16V4Z@2CH
C43
0.1U_0402_16V4Z
R5
100K_0402_5%
1
2
C399 0.1U_0402_16V4Z@2CH
M
I
S
C
T
V
V
G
A
L
V
D
S
P
C
I
-
E
X
P
R
E
S
S
G
R
A
P
H
I
C
S
U31E
ALVISO_BGA840
SDVOCTRL_DATAH27SDVOCTRL_CLKG27GCLKNV23GCLKPW23
TVDAC_AA17TVDAC_BC18TVDAC_CA19TV_REFSETJ19TV_IRTNAB17TV_IRTNBB18TV_IRTNCB19
GREEN#D22
HSYNCH22
DDCCLKJ23DDCDATAJ25BLUED23BLUE#C23GREENE22
REDF21RED#F22VSYNCG23
REFSETJ21
LDDC_CLKE25
LBKLT_CRTLG26LBKLT_ENF26LCTLA_CLKD26LCTLB_DATAC26
LDDC_DATAF25LVDD_ENH25LIBGF30LVBGG30LVREFHJ29LVREFLH29
LACLKND27LACLKPC27
LADATAN0F31LADATAN1D31LADATAN2D29
LADATAP0E31LADATAP1D30LADATAP2C29
EXP_COMPI P26EXP_ICOMPO L26
SDVO_TVCLKIN# M28SDVO_INT# P28
SDVO_FLDSTALL# U28
SDVO_TVCLKIN L28SDVO_INT N28
SDVO_FLDSTALL R28
SDVOB_RED# M30SDVOB_GREEN# N26
SDVOB_BLUE# P30SDVOB_BLKN U30
SDVOB_RED L30SDVOB_GREEN M26
SDVOB_BLUE N30SDVOB_BLKP R30
R3224.9_0402_1%
1 2
G
DS
Q1
BSS138_SOT23
2
13C403 0.1U_0402_16V4Z
@2CH
C46 0.1U_0402_16V4Z
R36220_0402_1%
12
C21 0.1U_0402_16V4Z
R
1
9
2
.
2
K
_
0
4
0
2
_
5
%
1
2
R
2
0
2
.
2
K
_
0
4
0
2
_
5
%
1
2
R30 0_0402_5%12
R33
150_0402_5%
12
C400 0.1U_0402_16V4Z@2CH
C401 0.1U_0402_16V4Z@2CH
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+2.5VS_CRT
3GRLL_R
+VCCP_CRTDAC_D
+1.5VS_DDRDLL
+1.5VS_PCIE
+1.5VS+1.5VS_3GPLL
+2.5VS+2.5VS_3GBG
+2.5VS
+2.5VS_CRTDAC
+1.5VS_MPLL+1.5VS_HPLL
+1.5VS_DPLLB+1.5VS_DPLLA
+2.5VS
+1.5VS
+1.5VS
+2.5VS
+2.5VS_CRTDAC
+2.5VS
+VCCP
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+2.5VS
+VCCP +2.5VS_CRTDAC
+2.5VS_CRTDAC
+1.8V
+VCCP
+1.5VS_DPLLA+1.5VS_DPLLB
+1.5VS_MPLL+1.5VS_HPLL
+1.5VS+1.5VS +1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet o fEDX20 LA-2481 0.5
Alviso(4 of 4)Custom
11 48Tuesday, February 22, 2005
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Route VSSA3GBG gnd from GMCH todecoupling cap ground lead andthen connect to the gnd plane.
Note : All VCCSM pinshorted internally.
CRTDAC: Route caps within250mil of Alviso. Route FBwithin 3" of Alviso.
Route VSSACRTDAC gnd from GMCH todecoupling cap ground lead and thenconnect to the gnd plane.
Route VSSATVBG gnd from GMCH todecoupling cap ground lead andthen connect to the gnd plane.
C
7
6
0
.
4
7
U
_
0
4
0
2
_
6
.
3
V
4
Z1
2
+
C
4
2
3
2
2
0
U
_
D
2
_
4
V
M
@
1
2
C80.1U_0402_16V4Z
1
2
L3BLM18PG600SN1_0603
1 2
C
6
9
0
.
4
7
U
_
0
4
0
2
_
6
.
3
V
4
Z1
2
C
9
0
0
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1
U
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0
4
0
2
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1
6
V
4
Z
1
2 C2
0
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0
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7
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1
2
C
3
3
0
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1
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0
4
0
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V
4
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1
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1
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0
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6
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8
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4
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4
1
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0
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U
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0
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1
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L4BLM18PG600SN1_0603
12
C
7
8
0
.
1
U
_
0
4
0
2
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1
6
V
4
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2
L34BLM18PG600SN1_0603
12
C
7
2
1
0
U
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1
2
0
6
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6
.
3
V
6
M
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1
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4
7
4
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1
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V
4
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1
2
C
2
6
0
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1
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0
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0
2
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1
6
V
4
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1
2
D14
RB751V_SOD323
2 1
C
7
3
0
.
4
7
U
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0
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6
.
3
V
4
Z1
2
C
7
5
0
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4
7
U
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0
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0
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6
.
3
V
4
Z1
2
C
5
0
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1
U
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0
4
0
2
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1
6
V
4
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1
2
C
1
3
1
0
U
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1
2
0
6
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6
.
3
V
6
M
1
2
L7BLM18PG600SN1_0603
1 2
R51 0.5_0805_1%1 2
C
3
5
2
2
U
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1
2
0
6
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1
6
V
4
Z
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V
1
1
2
C
4
8
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1
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V
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1
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C
5
7
0
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6
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V
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1
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C
8
7
0
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4
7
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6
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V
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K
1
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C
6
4
0
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2
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U
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6
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3
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1
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V
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1
2C
4
3
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1
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6
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1
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C
1
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C
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6
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C
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6
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1
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C
3
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C
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2 POWER
U31D
ALVISO_BGA840
VCCL23VCCL24VCCM24VCCN23VCCN24VCCP24VCCR15VCCR17VCCT15VCCT16VCCT17VCCU16
VCCD_HMPLL1AC3VCCD_HMPLL2AC5VCCA_DPLLAB21VCCA_DPLLBJ30VCCA_HPLLAD1VCCA_MPLLAC1
VCCA_TVDACA F18VCCA_TVDACA G18VCCA_TVDACB F19VCCA_TVDACB G19VCCA_TVDACC F20VCCA_TVDACC G20
VCCA_TVBG E19VSSA_TVBG E20
VCCD_TVDAC E18VCCDQ_TVDAC D17
VCCD_LVDS A23VCCD_LVDS B23VCCD_LVDS B25
VCCA_LVDS B29
VCCHV B20VCCHV C21VCCHV C22
VCCTX_LVDS A26VCCTX_LVDS B26
VCCA_SM AC13VCCA_SM AC14VCCA_SM AL15
VCC3G P31VCC3G R31
VCCA_3GPLL R23
VCCA_3GBG M31VSSA_3GBG L31
VCC_SYNC H21
VCCA_CRTDAC C20VCCA_CRTDAC D21VSSA_CRTDAC D20
VTTA6VTTA12VTTE1VTTM1VTTM2VTTM3VTTM4VTTM5VTTM6VTTM7VTTM8VTTM9VTTN1VTTN2VTTN3VTTN4VTTN5VTTN6VTTN7VTTN8VTTN9VTTY1
VCCSMAD18VCCSMAE17VCCSMAE18VCCSMAF1VCCSMAF17VCCSMAF18VCCSMAH17VCCSMAH18VCCSMAJ17VCCSMAJ18VCCSMAK17VCCSMAK18VCCSMAK30VCCSMAL17VCCSMAL18VCCSMAL23VCCSMAL6VCCSMAG17VCCSMAG18VCCSMAC17VCCSMAC18VCCSMAC31VCCSMAD17
C
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L33BLM18PG600SN1_0603
12
C
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U
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1
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C380.1U_0402_16V4Z
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12
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http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_SDQS0
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS0#
DDR_SCKE0
DDR_SODT0
DDR_DQS4DDR_DM4
DDR_DQS0DDR_DM0
DDR_DQS1DDR_DM1
DDR_DQS5 DDR_DM5
DDR_DQS6DDR_DM6
DDR_DQS#2
DDR_DM2
DDR_DQS#3
DDR_DM3
DDR_DQS#1
DDR_DQS#0
DDR_DQS3
DDR_DQS2
DDR_DQS#5
DDR_DQS#6
DDR_DQS#4
DDR_DQ8DDR_DQ9
DDR_DQ10
DDR_DQ12DDR_DQ13
DDR_DQ14
DDR_DQ16DDR_DQ17
DDR_DQ19DDR_DQ23
DDR_DQ24
DDR_DQ25DDR_DQ26DDR_DQ27
DDR_DQ28
DDR_DQ29 DDR_DQ30DDR_DQ31
DDR_DQ32DDR_DQ33
DDR_DQ34DDR_DQ35
DDR_DQ36 DDR_DQ37
DDR_DQ40DDR_DQ41
DDR_DQ42DDR_DQ43
DDR_DQ44DDR_DQ45
DDR_DQ46DDR_DQ47
DDR_DQ52DDR_DQ53
DDR_DQ55
DDR_DQ57
DDR_DQ59
DDR_DQ61
DDR_DQ62
DDR_SDQ16DDR_SDQ17
DDR_SDQ19DDR_SDQ23
DDR_SDQ24
DDR_SDQ25DDR_SDQ26DDR_SDQ27
DDR_SDQ28
DDR_SDQ29 DDR_SDQ30DDR_SDQ31
DDR_SDQ32DDR_SDQ33
DDR_SDQ34DDR_SDQ35
DDR_SDQ36 DDR_SDQ37
DDR_SDQ40DDR_SDQ41
DDR_SDQ42DDR_SDQ43
DDR_SDQ44DDR_SDQ45
DDR_SDQ46DDR_SDQ47
DDR_SDQ52DDR_SDQ53
DDR_SDQ54DDR_SDQ55
DDR_SDQ57
DDR_SDQ59
DDR_SDQ61
DDR_SDQ62
DDR_SDQ0DDR_SDQ1DDR_SDQ2DDR_SDQ3DDR_SDQ4DDR_SDQ5DDR_SDQ6DDR_SDQ7
DDR_SDQ8DDR_SDQ9DDR_SDQ10DDR_SDQ11DDR_SDQ12DDR_SDQ13DDR_SDQ14DDR_SDQ15
DDR_SDQ16DDR_SDQ17DDR_SDQ18DDR_SDQ19DDR_SDQ20DDR_SDQ21DDR_SDQ22DDR_SDQ23
DDR_SDQ24DDR_SDQ25DDR_SDQ26DDR_SDQ27DDR_SDQ28DDR_SDQ29DDR_SDQ30DDR_SDQ31
DDR_SDQ32DDR_SDQ33DDR_SDQ34DDR_SDQ35DDR_SDQ36DDR_SDQ37DDR_SDQ38DDR_SDQ39
DDR_SDQ40DDR_SDQ41DDR_SDQ42DDR_SDQ43DDR_SDQ44DDR_SDQ45DDR_SDQ46DDR_SDQ47
DDR_SDQ50DDR_SDQ49DDR_SDQ52DDR_SDQ48DDR_SDQ51DDR_SDQ53DDR_SDQ54DDR_SDQ55
DDR_SDQ56DDR_SDQ57DDR_SDQ58DDR_SDQ59DDR_SDQ60DDR_SDQ61DDR_SDQ62DDR_SDQ63
DDR_SDQ49 DDR_DQ48DDR_DQ49
DDR_SDQ51DDR_SDQ50
DDR_SDQ48
DDR_DQ51DDR_DQ50
DDR_SDQS#0DDR_SDM0
DDR_SDQS1DDR_SDQS#1DDR_SDM1
DDR_SDQS2DDR_SDQS#2DDR_SDM2
DDR_SDQS3DDR_SDQS#3DDR_SDM3
DDR_SDQS4DDR_SDQS#4DDR_SDM4
DDR_SDQS5DDR_SDQS#5DDR_SDM5
DDR_SDQS6DDR_SDQS#6DDR_SDM6
DDR_SDQS7DDR_SDQS#7DDR_SDM7
DDR_SDQS#0
DDR_SDM0 DDR_SDQS0
DDR_SDQS1
DDR_SDQS#1
DDR_SDM1
DDR_SDQS2
DDR_SDQS#2
DDR_SDM2
DDR_SDQS3
DDR_SDQS#3
DDR_SDM3
DDR_SDQS4
DDR_SDQS#4
DDR_SDM4
DDR_SDQS5
DDR_SDQS#5
DDR_SDM5
DDR_SDQS6
DDR_SDQS#6
DDR_SDM6
DDR_SDQS7
DDR_SDQS#7
DDR_SDM7
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS0#
DDR_SCKE0
DDR_SODT0
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS0#
DDR_SCKE0
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS0#
DDR_SCKE0
DDR_SODT0
DDR_DQ54
DDR_CLK0DDR_CLK0#
DDR_CLK0DDR_CLK0#
DDR_CLK1DDR_CLK1#
DDR_VREF
DDR_VREF DDR_VREF
DDR_VREF
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_DQS#7
DDR_DQS7 DDR_DM7
DDR_DQ0DDR_DQ6
DDR_DQ2DDR_DQ3
DDR_SDQ0
DDR_SDQ2DDR_SDQ3
DDR_SDQ6
DDR_SDQ8DDR_SDQ9
DDR_SDQ10DDR_SDQ11
DDR_SDQ12DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_DQ21
DDR_DQ18
DDR_SDQ20DDR_DQ20
DDR_SDQ18DDR_SDQ22DDR_DQ22
DDR_SDQ21
DDR_DQ38DDR_SDQ39DDR_SDQ38
DDR_DQ39
DDR_DQ60 DDR_SDQ60DDR_SDQ56
DDR_DQ58DDR_DQ63
DDR_DQ56
DDR_SDQ58DDR_SDQ63
DDR_SDQ7DDR_DQ7
DDR_DQ5DDR_DQ1 DDR_SDQ1
DDR_DQ4
DDR_SDQ5
DDR_SDQ4
DDR_VREF
DDR_DQ15DDR_DQ11
DDR_SODT0DDR_CLK1DDR_CLK1#
DDR_CLK0
DDR_CLK0#
DDR_DQS#[0..7]
DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_DM[0..7]
DDR_SAA[0..13]
DDR_VREF
DDR_SODT0 DDR_CLK0
DDR_CLK0# DDR_SCKE0
DDR_SCS0# DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SBA0 DDR_SBA1
DDR_SDQS#[0..7]
DDR_SDQS[0..7]
DDR_SDM[0..7]
DDR_SDQ[0..63]
DDR_SODT0 DDR_CLK0
DDR_CLK0# DDR_SCKE0
DDR_SCS0# DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SBA0 DDR_SBA1
DDR_SCKE0
DDR_SCS0# DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SBA0 DDR_SBA1
DDR_SODT0 DDR_CLK1
DDR_CLK1# DDR_SCKE0
DDR_SCS0# DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SBA0 DDR_SBA1
DDR_SODT0 DDR_CLK1
DDR_CLK1#
+1.8V +1.8V
+1.8V+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet o fEDX20 LA-2481 0.5
12 48Tuesday, February 22, 2005
Compal Electronics, Inc.DDRII-SODIMM SLOT1
CustomDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C287
2.2U_0805_16V4Z
1
2 C532
0.1U_0402_16V4Z
1
2
R227 10_0402_5%1 2
R283100_0402_5%
1
2
R230 10_0402_5%1 2
R263 10_0402_5%1 2
R229 10_0402_5%1 2
R233 10_0402_5%1 2
R231 10_0402_5%1 2
R238 10_0402_5%1 2
C535
2.2U_0805_16V4Z
1
2
RP10
22_0404_4P2R_5%
1 42 3
C302
2.2U_0805_16V4Z
1
2
C295
0.1U_0402_16V4Z
1
2
R262 10_0402_5%1 2
RP31
22_0404_4P2R_5%
1 42 3
RP6
22_0404_4P2R_5%
1 42 3
C289
0.1U_0402_16V4Z
1
2
R226 10_0402_5%1 2
RP14
22_0404_4P2R_5%
1 42 3
R258 10_0402_5%1 2
C531
0.1U_0402_16V4Z
1
2
R232 10_0402_5%1 2
C288
0.1U_0402_16V4Z
1
2
RP13
22_0404_4P2R_5%
1 42 3
RP16
22_0404_4P2R_5%
1 42 3
RP37
22_0804_8P4R_5%
1 82 73 64 5
R235 10_0402_5%1 2
RP30
22_0804_8P4R_5%
1 82 73 64 5
RP34
22_0404_4P2R_5%
1 42 3
U17
K4T51163QB-GCCC_FBGA84
VSS P9VSS N1
VDD J9VDD M9
VDD E1
VSS J3
A0M8A1M3A2M7A3N2A4N8A5N3A6N7A7P2A8P8A9P3A10M2A11P7A12R2
VDD R1VDDL J1
VSSQ F8VSSQ H2VSSQ H8
VSS A3VSS E3
LDQS#E8LDMF3LDQ0G8LDQ1G2LDQ2H7LDQ3H3LDQ4H1LDQ5H9LDQ6F1LDQ7F9
CS# L8RAS# K7CAS# L7WE# K3
UDQSB7
UDMB3UDQ0C8UDQ1C2UDQ2D7UDQ3D3UDQ4D1UDQ5D9UDQ6B1UDQ7B9
VREFJ2
BA0 L2BA1 L3
CK J8CK# K8CKE K2
UDQS#A8
LDQSF7
NCA2NCE2 VSSDL J7
VSSQ D8VSSQ E7VSSQ F2
VSSQ B2VSSQ B8VSSQ D2
VSSQ A7
VDDQ C1VDDQ C3VDDQ C7VDDQ C9VDDQ E9VDDQ G1VDDQ G3VDDQ G7VDDQ G9VDDQ A9
ODT K9
VDD A1
NCR8NCR3NCR7
NCL1
RP12
22_0804_8P4R_5%
1 82 73 64 5
R237 10_0402_5%1 2
R259 10_0402_5%1 2
RP9
22_0804_8P4R_5%
1 82 73 64 5
U16
K4T51163QB-GCCC_FBGA84
VSS P9VSS N1
VDD J9VDD M9
VDD E1
VSS J3
A0M8A1M3A2M7A3N2A4N8A5N3A6N7A7P2A8P8A9P3A10M2A11P7A12R2
VDD R1VDDL J1
VSSQ F8VSSQ H2VSSQ H8
VSS A3VSS E3
LDQS#E8LDMF3LDQ0G8LDQ1G2LDQ2H7LDQ3H3LDQ4H1LDQ5H9LDQ6F1LDQ7F9
CS# L8RAS# K7CAS# L7WE# K3
UDQSB7
UDMB3UDQ0C8UDQ1C2UDQ2D7UDQ3D3UDQ4D1UDQ5D9UDQ6B1UDQ7B9
VREFJ2
BA0 L2BA1 L3
CK J8CK# K8CKE K2
UDQS#A8
LDQSF7
NCA2NCE2 VSSDL J7
VSSQ D8VSSQ E7VSSQ F2
VSSQ B2VSSQ B8VSSQ D2
VSSQ A7
VDDQ C1VDDQ C3VDDQ C7VDDQ C9VDDQ E9VDDQ G1VDDQ G3VDDQ G7VDDQ G9VDDQ A9
ODT K9
VDD A1
NCR8NCR3NCR7
NCL1
C524
3.3P_0402_50V8C
@
1
2
RP33
22_0404_4P2R_5%
1 42 3
R264 10_0402_5%1 2
R268 10_0402_5%1 2
R225 10_0402_5%1 2
R257 10_0402_5%1 2
R261 10_0402_5%1 2
R265 10_0402_5%1 2
C296
0.1U_0402_16V4Z
1
2
RP29
22_0404_4P2R_5%
1 42 3
U15
K4T51163QB-GCCC_FBGA84
VSS P9VSS N1
VDD J9VDD M9
VDD E1
VSS J3
A0M8A1M3A2M7A3N2A4N8A5N3A6N7A7P2A8P8A9P3A10M2A11P7A12R2
VDD R1VDDL J1
VSSQ F8VSSQ H2VSSQ H8
VSS A3VSS E3
LDQS#E8LDMF3LDQ0G8LDQ1G2LDQ2H7LDQ3H3LDQ4H1LDQ5H9LDQ6F1LDQ7F9
CS# L8RAS# K7CAS# L7WE# K3
UDQSB7
UDMB3UDQ0C8UDQ1C2UDQ2D7UDQ3D3UDQ4D1UDQ5D9UDQ6B1UDQ7B9
VREFJ2
BA0 L2BA1 L3
CK J8CK# K8CKE K2
UDQS#A8
LDQSF7
NCA2NCE2 VSSDL J7
VSSQ D8VSSQ E7VSSQ F2
VSSQ B2VSSQ B8VSSQ D2
VSSQ A7
VDDQ C1VDDQ C3VDDQ C7VDDQ C9VDDQ E9VDDQ G1VDDQ G3VDDQ G7VDDQ G9VDDQ A9
ODT K9
VDD A1
NCR8NCR3NCR7
NCL1
RP15
22_0804_8P4R_5%
1 82 73 64 5
C284
0.1U_0402_16V4Z
1
2
R260 10_0402_5%1 2
RP28
22_0404_4P2R_5%
1 42 3
RP32
22_0804_8P4R_5%
1 82 73 64 5
C291
0.1U_0402_16V4Z
1
2
RP35
22_0804_8P4R_5%
1 82 73 64 5
RP36
22_0804_8P4R_5%
1 82 73 64 5
R266 10_0402_5%1 2
RP7
22_0804_8P4R_5%
1 82 73 64 5
RP27
22_0404_4P2R_5%
1 42 3
C294
0.1U_0402_16V4Z
1
2
R228 10_0402_5%1 2
R236 10_0402_5%1 2
RP8
22_0404_4P2R_5%
1 42 3
U14
K4T51163QB-GCCC_FBGA84
VSS P9VSS N1
VDD J9VDD M9
VDD E1
VSS J3
A0M8A1M3A2M7A3N2A4N8A5N3A6N7A7P2A8P8A9P3A10M2A11P7A12R2
VDD R1VDDL J1
VSSQ F8VSSQ H2VSSQ H8
VSS A3VSS E3
LDQS#E8LDMF3LDQ0G8LDQ1G2LDQ2H7LDQ3H3LDQ4H1LDQ5H9LDQ6F1LDQ7F9
CS# L8RAS# K7CAS# L7WE# K3
UDQSB7
UDMB3UDQ0C8UDQ1C2UDQ2D7UDQ3D3UDQ4D1UDQ5D9UDQ6B1UDQ7B9
VREFJ2
BA0 L2BA1 L3
CK J8CK# K8CKE K2
UDQS#A8
LDQSF7
NCA2NCE2 VSSDL J7
VSSQ D8VSSQ E7VSSQ F2
VSSQ B2VSSQ B8VSSQ D2
VSSQ A7
VDDQ C1VDDQ C3VDDQ C7VDDQ C9VDDQ E9VDDQ G1VDDQ G3VDDQ G7VDDQ G9VDDQ A9
ODT K9
VDD A1
NCR8NCR3NCR7
NCL1
C290
2.2U_0805_16V4Z
1
2 C283
0.1U_0402_16V4Z
1
2
RP11
22_0804_8P4R_5%
1 82 73 64 5
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SDQ0DDR_SDQ1
DDR_SDQ2DDR_SDQ3
DDR_SDQ4DDR_SDQ5
DDR_SDQ6DDR_SDQ7
DDR_SDQ8DDR_SDQ9
DDR_SDQ10DDR_SDQ11
DDR_SDQ12DDR_SDQ13
DDR_SDQ14DDR_SDQ15
DDR_SDQ16DDR_SDQ17
DDR_SDQ18DDR_SDQ19
DDR_SDQ20DDR_SDQ21
DDR_SDQ22DDR_SDQ23
DDR_SDQ24
DDR_VREF
DDR_SDQ25
DDR_SDQ26DDR_SDQ27
DDR_SDQ28DDR_SDQ29
DDR_SDQ30DDR_SDQ31
DDR_SDQ32DDR_SDQ33
DDR_SDQ34DDR_SDQ35
DDR_SDQ36DDR_SDQ37
DDR_SDQ38DDR_SDQ39
DDR_SDQ40DDR_SDQ41
DDR_SDQ42DDR_SDQ43
DDR_SDQ44DDR_SDQ45
DDR_SDQ46DDR_SDQ47
DDR_SDQ56DDR_SDQ57
DDR_SDQ58DDR_SDQ59
DDR_SDQ60DDR_SDQ61
DDR_SDQ62DDR_SDQ63
DDR_VREFDDR_VREF
DDR_SCS1#
DDR_SDQS#0DDR_SDM0
DDR_SDQS1DDR_SDQS#1DDR_SDM1
DDR_SDQS2DDR_SDQS#2DDR_SDM2
DDR_SDQS3DDR_SDQS#3DDR_SDM3
DDR_SDQS4DDR_SDQS#4DDR_SDM4
DDR_SDQS5DDR_SDQS#5DDR_SDM5
DDR_SDQS6DDR_SDQS#6DDR_SDM6
DDR_SDQS7DDR_SDQS#7DDR_SDM7
DDR_VREF
DDR_SDQS0
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS1#
DDR_SCKE1
DDR_SODT1
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS1#
DDR_SCKE1
DDR_SODT1
DDR_SBA1DDR_SBA0
DDR_SCAS#DDR_SRAS#
DDR_SWE#
DDR_SCS1#
DDR_SCKE1
DDR_SODT1DDR_CLK1DDR_CLK1#
DDR_CLK1DDR_CLK1#
ICH_SMBCLKICH_SMBDATA
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_SAA0DDR_SAA1DDR_SAA2DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6DDR_SAA7DDR_SAA8DDR_SAA9DDR_SAA10
DDR_SAA12DDR_SAA11
DDR_AA0DDR_AA1DDR_AA2
DDR_AA3DDR_AA4DDR_AA5DDR_AA6
DDR_AA7DDR_AA8
DDR_AA9
DDR_AA11
DDR_AA12
DDR_AA10
DDR_SAA1
DDR_SAA3DDR_SAA4DDR_SAA5DDR_SAA6
DDR_SAA7DDR_SAA8
DDR_SAA9
DDR_SAA11
DDR_SAA12
DDR_SAA2
DDR_SAA0
DDR_ABA1
DDR_ABA0
DDR_ACAS#
DDR_ARAS#DDR_AWE#
DDR_CKE0
DDR_ODT0
DDR_CS0#
DDR_CKE1 DDR_SCKE1
DDR_CS1#
DDR_SODT1DDR_ODT1
DDR_SCS1#DDR_SBA1
DDR_SBA0
DDR_SCAS#
DDR_SRAS#DDR_SWE#
DDR_SCKE0
DDR_SODT0
DDR_AA7DDR_AA8
DDR_AA12DDR_CKE1
DDR_AA3DDR_AA4DDR_AA5DDR_AA6
DDR_AA0DDR_AA1DDR_AA2
DDR_CKE0
DDR_AA9
DDR_AA11
DDR_AA10
DDR_ABA1
DDR_ABA0
DDR_ACAS#
DDR_ARAS#DDR_AWE#
DDR_ODT0
DDR_CS0#
DDR_CS1#
DDR_ODT1
DDR_SCS0#DDR_SAA10
DDR_CLK0DDR_CLK0#
DDR_CLK0DDR_CLK0#
DDR_SODT1
DDR_SCKE1
DDR_CLK1#
DDR_CLK1
DDR_SDQ50
DDR_SDQ53DDR_SDQ51
DDR_SDQ48DDR_SDQ52
DDR_SDQ49
DDR_SDQ55DDR_SDQ54
DDR_AA[0..13]
DDR_SDQS#[0..7]
DDR_SDQS[0..7]
DDR_SDM[0..7]
DDR_SDQ[0..63]
DDR_SAA[0..13]
ICH_SMBCLKICH_SMBDATA
DDR_SBA0 DDR_SBA1
DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_VREF
DDR_SBA0 DDR_SBA1
DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SBA0 DDR_SBA1
DDR_CLK1 DDR_CLK1#
DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SBA0 DDR_SBA1
DDR_CLK1 DDR_CLK1#
DDR_SRAS# DDR_SCAS# DDR_SWE#
DDR_SCKE0
DDR_SRAS#
DDR_SCAS# DDR_SCS0#
DDR_SWE# DDR_SBA0
DDR_SBA1
DDR_CKE1
DDR_ODT1
DDR_CS1#
DDR_ODT0
DDR_CKE0
DDR_CS0#
DDR_ABA0
DDR_ABA1
DDR_ARAS#
DDR_ACAS#
DDR_AWE#
DDR_SODT0
DDR_CKE1
DDR_CKE0 DDR_ODT1
DDR_CS1#
DDR_ODT0
DDR_CS0#
DDR_ABA0
DDR_ABA1
DDR_ARAS#
DDR_ACAS#
DDR_AWE#
DDR_CLK0 DDR_CLK0#
DDR_CLK0 DDR_CLK0#
+1.8V
+1.8V+1.8V
+1.8V
+1.8V
+0.9VS
+3VS
+0.9VS
+3VS
Title
Size Document Number Rev
Date: Sheet o fEDX20 LA-2481 0.5
13 48Tuesday, February 22, 2005
Compal Electronics, Inc.DDRII-SODIMM SLOT1
CustomDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout Note:Place these resistorclosely JP33,alltrace length
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_CLK3
DDR_CLK3#
DDR_CLK4
DDR_CLK4#
DDR_ODT2
DDR_ODT3
DDR_BCAS#
DDR_DM7
DDR_DM5
DDR_BBA2
DDR_DQS#0
DDR_DQS#2
DDR_DQS#1
DDR_DQS#4
DDR_BA3
DDR_BA10
DDR_BA1
DDR_DQS#6
DDR_BA9
DDR_DQ12
DDR_BWE#
DDR_BA5
DDR_BA12
DDR_VREF
DDR_DQ5
DDR_DQ8
DDR_DQ4DDR_DQ7
DDR_DQ1
DDR_DQ17
DDR_DQ25
DDR_DQ10
DDR_DQ16
DDR_DQ19
DDR_DQ41
DDR_DQ14
DDR_DQ30
DDR_DQ23
DDR_DQ26
DDR_DQ24
DDR_DQ37
DDR_DQ39
DDR_DQ32
DDR_DQ38
DDR_DQ60
DDR_DQ50
DDR_DQ42
DDR_DQ51
DDR_DQ46
DDR_DQ52
DDR_DQ58
DDR_DQ40
DDR_DQ48
DDR_DQS0
DDR_DQS1
DDR_DQ63
DDR_DQS4
DDR_DM3
DDR_DQ56
DDR_DQS2
DDR_DQS6
DDR_BBA0
DDR_BA8
DDR_BA11
DDR_BA2
DDR_DQ2
DDR_BA6
DDR_BA4
DDR_BA0
DDR_DQ3
DDR_BRAS#DDR_BBA1
DDR_DQ15
DDR_DQ9DDR_DQ13
DDR_DQ21
DDR_DQ11
DDR_DQ29DDR_DQ31
DDR_DQ18
DDR_DQ28
DDR_DQ20
DDR_DQ22
DDR_DQ27
DDR_DQ36DDR_DQ33
DDR_DQ34DDR_DQ35
DDR_DQ44
DDR_DQ47
DDR_DQ45
DDR_DQ49
DDR_DQ43
DDR_DQ57
DDR_DQ53
DDR_DQ59
DDR_DQ61
DDR_DQ62
DDR_DQ54DDR_DQ55
DDR_DQS#3DDR_DQS3
DDR_DM4
DDR_DM6
DDR_BA7
DDR_DQS#7
DDR_DQS#5
DDR_DM1
DDR_DQS5
DDR_DQS7
DDR_DM2
DDR_BA13DDR_CS3#
DDR_CLK3
DDR_CLK4DDR_CLK4#
DDR_CLK3#
DDR_DM0
DDR_CKE3
ICH_SMBCLK
DDR_CS2#
ICH_SMBDATA
DDR_CKE2
DDR_BRAS#
DDR_BA6
DDR_BCAS#
DDR_BBA0
DDR_BA2
DDR_BWE#
DDR_BA7
DDR_BA10
DDR_BA3DDR_BBA1
DDR_BA11
DDR_BA0
DDR_BA4 DDR_BA8
DDR_BA12
DDR_BA1
DDR_BA5
DDR_BA13
DDR_BA9
DDR_ODT3DDR_CS3#
DDR_ODT2DDR_CS2#
DDR_DQ6DDR_DQ0
DDR_CKE2DDR_CKE3DDR_BBA2
DDR_DQS#[0..7]
DDR_DQS[0..7]
DDR_DQ[0..63]
DDR_BA[0..13]
DDR_DM[0..7]
DDR_CKE3
DDR_CLK3
DDR_CS2#
DDR_VREF
ICH_SMBCLKICH_SMBDATA
DDR_CLK3#
DDR_BWE#
DDR_CLK4 DDR_CLK4#
DDR_BBA1 DDR_BRAS#
DDR_BCAS#
DDR_ODT3
DDR_CKE2
DDR_CS3#
DDR_BBA2
DDR_BBA0
DDR_ODT2
+1.8V
+0.9VS
+1.8V
+3VS+3VS
+1.8V
+0.9VS
Title
Size Document Number Rev
Date: Sheet o fEDX20 LA-2481 0.5
14 48Tuesday, February 22, 2005
Compal Electronics, Inc.DDRII-SODIMM SLOT2
Custom
Layout Note:Place near JP33
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
SO-DIMM BREVERSE
Layout Note:Place these resistorclosely JP33,alltrace length
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_MCH_BCLK
CK_CPU1#
CK_CPU0
CK_CPU0#
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK#
CLKSEL1
CLKSEL0
DOT96 DREFCLK
DREFCLK#DOT96# DREFCLK
DREFCLK#
CLKIREF
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
PM_STP_CPU#
PM_STP_PCI#
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_48M_ICH
CK_CPU1
ICH_SMBCLK
ICH_SMBDATA
CLK_PCI_PCM
PCICLK3
PCICLK4
CLK_PCI_MINI
CLKSEL1
SCR1 CLK_MCH_3GPLL
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK#
CLK_MCH_BCLK
CK_XTAL_OUT
CK_XTAL_IN
CLK_PCI_EC
PCICLK5
SD_CLKIN
CLK_PCI_SIO PCICLK2
SRC1# CLK_MCH_3GPLL#
CLK_PCIE_ICH
CLK_PCIE_ICH#SRC5#
SRC5
DREF_SSCLK#
DREF_SSCLK
SSCLK#
SSCLKDREF_SSCLK
DREF_SSCLK#
CLK_14M_SIOREFOUT
CLK_EN#
CLK_PCI_ICH
CLK_14M_CODEC
CLK_PCI_TPM CK_CPU2#
CK_CPU2
CK_ITP#
CK_ITPCK_ITP
CK_ITP#
CLK_PCI_LOM
PCICLKF0
96*_100MSEL
CLK_14M_LVDS CLKSEL0
96*_100MSEL
CLK_14M_ICH
CLK_48M_ICH
MCH_CLKSEL0
MCH_CLKSEL1
CPU_BSEL0
CPU_BSEL1DREFCLK
DREFCLK#
PM_STP_PCI#
PM_STP_CPU#
ICH_SMBCLK
ICH_SMBDATA
CLK_PCI_SIO
CLK_PCI_MINI
CLK_PCI_PCM
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_PCI_EC
SD_CLKIN
CLK_PCIE_ICH#
CLK_PCIE_ICH
DREF_SSCLK#
DREF_SSCLK
CLK_14M_SIO
VGATE
CLK_PCI_ICH
CLK_14M_CODEC
CLK_PCI_TPM CK_ITP#
CK_ITP
CLK_PCI_LOM
CLK_14M_LVDS
CLK_14M_ICH
+VCCP
CK_VDD_MAIN
+VCCP
+3VS
CK_VDD_MAIN2
+3VS
+3VS
+3VS
+VCCP
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.515 48Tuesday, February 22, 2005
Compal Electronics, Inc.Clock Generator
Custom
Place crystal within500 mils of CK410M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
CLK-RaCLK-Rc
CLK-Rb
Dothan-A PSB400
CLK-RaCPU Type
Dothan-A PSB533
Dothan-B
0 OhmOPEN
1K Ohm
Width=40mils
Width=40mils
CLK-Rb
CPUMHz
FSA
33.3
FSB
100
FSC
1001
100
CLKSEL1
01 133
PCIMHz
SRCMHz
33.3
Dothan A step
00
CLKSEL2
1
CLKSEL0
Dothan B step
CLKSEL0 CLKSEL2
33.3
33.3
100
100100
0 0
0 11
CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
1331
CLK-Rc
OPEN
OPEN OPEN
0 Ohm OPEN OPEN
SS frequency selection
96*_100MSEL 96_100MSST/C
LOW
HIGH
96 MHZ
100 MHZ
V
V
C4460.047U_0402_16V4Z
1
2
C4260.047U_0402_16V4Z
1
2
R118 33_0402_5%1 2
L37CHB2012U121_0805
1 2
R1131K_0402_5%@
1
2
R131 12_0402_5%1 2
C4250.047U_0402_16V4Z
1
2
R88 10K_0402_5%1 2
R130 475_0402_1%1 2
R76 10K_0402_5%1 2
R69 10K_0402_5%12
R85 33_0402_5%1 2
R91 33_0402_5%12
C11133P_0402_50V8J
12
R13449.9_0402_1%
1 2
R60
1K_0402_5%
1
2
R82 33_0402_5%1 2
R840_0402_5%
1 2
R90 12_0402_5%12
R52 33_0402_5%12
R7 12_0402_5%@12
R120 33_0402_5%1 2
R590_0402_5%@
1
2
R79 33_0402_5%1 2
R70 33_0402_5%12
U8
IDTCV140PAG_TSSOP56
VDDSRC_021VDDSRC_128VDDSRC_234
VDDPCI_01VDDPCI_17
VDD4811
VDDCPU42VDDREF48
FS_A/USB_48MHz12
GND_22
FS_B/TEST_MODE16
XOUT49
XIN50
GND_129
GND_013
GND_345
PCICLK2/SEL_CLKREQ56
FS_C/TEST_SEL/REF153
SDATA47
SCLK46
PCICLK_F0/ITP_EN8
PCICLK_F1/96*_100MSEL9
IREF39
SRCCLKT5 31
CPU_STOP# 54
CPUCLKT1 41
CPUCLKC1 40
CPUCLKT2_ITP/SRCCLKT_7 36
SRCCLKC5 30
PCICLK33
PCICLK44
PCICLK55
CPUCLKC0 43
CPUCLKT0 44
SRCCLKT6/CLKREQA# 33
SRCCLKC6/CLKREQB# 32
PCI/SRC_STOP# 55
GNDA 38
VDDA 37
REF0/FS_D 52
GND_56
GND_451
CPUCLKC2_ITP/SRCCLKC_7 35
SRCCLKT4_SATA 26
SRCCLKC4_SATA 27
SRCCLKT3 24
SRCCLKC3 25
SRCCLKT2 22
SRCCLKC2 23
SRCCLKT1 19
SRCCLKC1 20
96_100MSST/SRCCLKT0 17
96_100MSSC/SRCCLKC0 18
DOTT_96MHz 14DOTC_96MHz 15
VTT_PWRGD#/PD 10
C434
10U_1206_6.3V6M1
2
R1380_0402_5%
1 2
R13949.9_0402_1%
12R119 33_0402_5%
1 2
R117 33_0402_5%1 2
R6349.9_0402_1%
1 2
Y214.31818MHZ_20P_6X1430004201
1
2
R137 12_0402_5%1 2
C4420.047U_0402_16V4Z
1
2
R121 33_0402_5%1 2
R1260_0402_5%@
1
2
G
D
S
Q42N7002_SOT23
2
1
3
C437
10U_1206_6.3V6M1
2
C
4
3
5
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R14249.9_0402_1%
12R122 33_0402_5%
1 2
R14149.9_0402_1%
12
R6449.9_0402_1%
1 2
R6249.9_0402_1%
1 2
R13549.9_0402_1%
1 2
C4430.047U_0402_16V4Z
1
2
C4440.047U_0402_16V4Z
1
2
C4280.047U_0402_16V4Z
1
2
C431
1U_0603_10V4Z
1
2
R14049.9_0402_1%
12
R6149.9_0402_1%
1 2
R87 12_0402_5%12
R81 33_0402_5%1 2
R109 33_0402_5%12
R125 12_0402_5%1 2
C4450.047U_0402_16V4Z
1
2
R6749.9_0402_1%
1 2
R6649.9_0402_1%
1 2
R1321K_0402_5%
1 2
R68 12_0402_5%12
C4270.047U_0402_16V4Z
1
2
R14349.9_0402_1%
12
R71 12_0402_5%12
C11033P_0402_50V8J
12
R123 33_0402_5%1 2
R14449.9_0402_1%
12
R651K_0402_5%
1 2
R72 33_0402_5%12
R124 33_0402_5%1 2
R80 33_0402_5%1 2
R831K_0402_5%@
1
2
L36CHB2012U121_0805
1 2
R8910K_0402_5%@
1
2
C4470.047U_0402_16V4Z
1
2
R86 33_0402_5%1 2
http://hobi-elektronika.net
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AS
DVI_DVDD_1.8VDVI_DVDD_2.5VDVI_V10
DVI_V7
DVI_CLK+
DVI_TX1-
DVI_TX1+
DVI_TX0-
DVI_TX0+
DVI_CLK-
DVI_TX2+
DVI_TX2-
DVI_V2
DVI_AVDD_3V
DVI_DVDD_2.5VDVI_DVDD_1.8V
DVI_V3 DVI_DVDD_1.8V
I2C_ADD
DVI_DVDD_2.5V DVI_V5DVI_DVDD_2.5V
DVI_DETECT
DVI_CLK+DVI_CLK-
DVI_TX2+
DVI_TX1+DVI_TX2-
DVI_TX0+DVI_TX1-
DVI_TX0-
SDVO_SDATSDVO_SCLK
DVI_DDC_CLK
1362_SDA_DDC1362_SCL_DDC
DVI_DDC_DAT1362_SDA_DDC
DVI_DVDD_1.8V
DVI_AVDD_3V
SDVO_SCLK
DVI_AVDD_3V
SDVO_SDAT
DVI_DDC_DAT
DVI_V6
DVI_V1DVI_DVDD_1.8V
DVI_AVDD_3V
DVI_AVDD_3V
DVI_V9 DVI_DVDD_2.5VDVI_AVDD_3V
DVI_V8
DVI_DDC_CLK1362_SCL_DDC
DVI_V4
AS
DVI_DETECT
DVI_CLK+
DVI_CLK-
DVI_TX2+
DVI_TX1+
DVI_TX2-
DVI_TX0+
DVI_TX1-
DVI_TX0-
DVI_DDC_CLK
DVI_DDC_DAT
PLT_RST#
SDVOB_R-SDVOB_R+
SDVOB_G-SDVOB_G+
SDVOB_B-SDVOB_B+
SDVOB_CLK+SDVOB_CLK-
SDVOB_INT+SDVOB_INT-
PLT_RST#
SDVO_SDAT SDVO_SCLK
+2.5VS
+3VS
+2.5VS
+1.8VS
+3VS
+5VS +5VS
+5VS
+2.5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
EDX20 LA-2481 0.5DVI CH7307/SiL1362
Custom
16 48Tuesday, February 22, 2005
Compal Electronics, Inc.THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Note:Install DVI-Ra 1K_0402_5% for SiI1362Install DVI-Ra 0_0402_5% for CH7307
DVI-Ra
W=20 mils
Note: Address = 0x70Install DVI-Rb 0_0402_5% for SiI1362
DVI-Rb
DVI CONTROLLER
Note: Address = 0x72Install DVI-Rb 10K_0402_5% for CH7307
R444
0_0402_5%DVI_1362@
1
2
R445 0_0402_5%DVI_7307@1 2
R4251K_0402_5%DVI_1362@
1
2
R446 0_0402_5%DVI_1362@1 2
C308150P_0402_50V8J
1
2
R416 0_0402_5%DVI_1362@1 2
JP8
JAE_DD2R040HP2
1234567891011121314151617181920
2122232425262728293031323334353637383940
R44110K_0402_5%DVI_7307@
1
2
R421 0_0402_5%DVI_1362@1 2
R443 0_0402_5%DVI_7307@1 2
R427 0_0402_5%DVI_1362@
1 2
R418 0_0402_5%DVI_7307@1 2R419 0_0402_5%DVI_1362@1 2
R438
300_0402_5%DVI_1362@
1 2
C3090.1U_0402_16V4Z@
R291 0_0402_5%DVI_1362@1 2R287 0_0402_5%DVI_1362@1 2
R289 0_0402_5%DVI_7307@1 2
R429 0_0402_5%DVI_7307@1 2
R4261K_0402_5%@
1
2
R288 2.7K_0402_5%1 2
C3110.1U_0402_16V4Z@
R299300_0402_1%@
1
2
R296300_0402_1%@
1
2
R4240_0402_5%DVI_7307@
1
2
R432 0_0402_5%DVI_7307@1 2
R428 0_0402_5%DVI_1362@
1 2
R292 0_0402_5%DVI_7307@1 2
C52510U_0805_10V4ZDVI_1362@
1
2
R4390_0402_5%
DVI_1362@
1
2
R297300_0402_1%@
1
2
C527
0.1U_0402_16V4ZDVI_1362@
R42210K_0402
