Development of front-end electronics for Silicon Photo-Multipliers

F. Corsi, A. Dragone, M. Foresta, C. Marzocca, G. Matarrese, A. Perrotta

INFN DASiPM Collaboration

DEE - Politecnico di Bari and INFN Bari Section, Italy

• Accurate modelling of the SiPM for reliable simulations at circuit level.

• Development of an extraction procedure for the parameters involved in the model.

• Validation of the model accuracy.

• Comparison of different front-end approaches.

• Preliminary results of the first version of front-end based on a current buffer .

Main activities

Electrical model of a SiPM

Rq: quenching resistor (hundreds of k)

Cd: photodiode capacitance (few tens of fF) Cq: parasitic capacitance in parallel to Rq (smaller than Cd)

IAV: current source modelling the total charge delivered by a microcell during the avalanche

Cg : parasitic capacitance due to the routing of the bias voltage to the N microcells, realized with a metal grid.

Example: metal-substrate unit area capacitance 0.03 fF/mm2 metal grid = 35% of the total detector area = 1mm2

Avalanche time constants much faster than those introduced by the circuit:

IAV can be approximated as a short pulse containing the total amount of charge delivered by the firing microcell Q=V(Cd+Cq), with V=VBIAS-VBR

Cg 10pF, without considering the fringe parasitics

Extraction of Rq

Forward characteristic of the SiPM, region in which V/I is almost constant and equal to Rq/N.

_____ Measured characteristic

_____ Least square linear fit

Forward characteristic of a SiPM produced by ITC-irst.

Slope = 1.59 mS

Rq/N = 629

N = 625

Rq = 393 k

Extraction of Vbr and Cd+Cq

Charge associated to a single dark count pulse as a function of the bias voltage: Q=(Cd+Cq)(Vbias-Vbr) Cd+Cq and, by extrapolation, Vbr

Vbias [V]

Q [

C]

* Measured points

__ Least square linear fit

Example of a single dark count pulse for the ITC-irst SiPM (obtained by reading the pulse with a 50 resistor and using a 140

gain, fast voltage amplifier)

Charge contained in a single dark count pulse vs. bias voltage

Extraction of Cd, Cq and Cg

CV plotter measurements near the breakdown voltage: YM and CM

According to the SiPM model, YM and CM are expressed in terms of Cdtot=NCd, Cqtot=NCq, Rqtot=Rq/N and the frequency of the signal used by the CV plotter.

YM CM

Cqtot

Cg

Cdtot

Rqtot

YM [

S]

CM [p

F]

Vbias [V] Vbias [V]

CV plotter measurement results for the same device from ITC-irst. The

signal frequency is 1 MHz.

qtotdtott2tqtot

2

2dtotqtot

2

M CCC CR1

CRY

2t

2qtot

2

dtotqtottgt2qtot

2gdtot

MCR1

)CCCC(CRCCC

Cd,Cq

Cg

Results of the extraction procedure

Extraction procedure applied to two SiPM detectors from different manufacturers.

The table summarizes the main features of the devices and the results obtained.

Good agreement with the expected parameter values estimated on the basis of technological and geometrical parameters.

Model Parameter SiPM ITC-irst

N=625, Vbias=35V

SiPM Photonique

N=516, Vbias=63V

Rq 393 kΩ 774 kΩ

Vbr 31.2 V 61 V

Q 175.5 fC 127.1 fC

Cd 34.6 fF 40.8 fF

Cq 12.2 fF 21.2 fF

Cg 27.8 pF 18.1 pF

Front-end electronics: different approaches

RS

SiPM

Vbias

ISkIS=IOUT

Charge sensitive amplifier Voltage amplifier Current buffer

-

+

SiPM

VbiasCF

VOUT

+-RS

SiPM

Vbias

VOUT

A I-V conversion is realized by means of RS

The value of RS affects the gain and the signal waveform

VOUT must be integrated to extract the charge information: thus a further V-I conversion is needed

RS is the (small) input impedance of the current buffer

The output current can be easily reproduced (by means of current mirrors) and further processed (e.g. integrated)

The circuit is inherently fast

The current mode of operation enhances the dynamic range, since it does not suffer from voltage limitations due to deep submicron implementation

The charge Q delivered by the detector is collected on CF

If the maximum VOUT is 3V and Q is 50pC (about 300 SiPM microcells), CF must be 16.7pF

Perspective limitations in dynamic range and die area with low voltage, deep submicron technologies

SiPM + front-end behaviour

Cq

A) SiPM coupled to an amplifier with input impedance Rs

The load effects, the grid parasitic capacitance and the value of Rs are key factors in the determination of the resulting waveform of VIN and IIN

A qualitative study of the circuit can be carried out with reference to the simplified schematic depicted below. The two circuits give very similar results, provided that Rs is much lower than Rqtot=NRq

IAV

Rq

Cd (N-1)Cd

(N-1)CqRq/(N-1) Cg RS

-

VIN

IIN +

IAV RqCd Cq

Iq

Iq

CgCeq

-

VIN

+IIN

RS

B) Simplified circuit

qdeq C)1N(

1

C)1N(

1

C

1

SiPM + front-end behaviour

Time

0s 20ns 40ns 60ns 80ns 100nsV(Rin:2) V(C1:2,Vbias)

0V

0.5mV

1.0mV

Time

VIN

Responses of the circuits A) and B) to a single dark pulse (160fC) for three different values of Rs and typical parameter values

The simulations show that the peak of VIN is almost independent of Rs.

In fact, a constant fraction QIN of the charge Q delivered during the avalanche (considered very fast with respect to the time constants of the circuit) is instantly collected on Ctot=Cg+Ceq.

The simplified circuit has two time constants:

• IN= Rs Ctot

• r=Rq(Cd+Cq)

Decreasing Rs, the time constant IN decreases, the current in Rs increases and the collection of the charge is slightly faster, as shown by the simulations.

Rs=75

Rs=50

Rs=20

_____ Circuit A)

_____ Circuit B)

qd

qIN CC

CQQ

tot

ININMAX C

QV

)

texp()

texp(

QR)t(V

rr

qr

ININ

INq

INr

SIN

qqq CR

Bandwidth of the amplifier

Amplifier output voltage for a single dark pulse: same gain and different bandwidth

Time

0s 10ns 20ns 30ns 40ns 50ns 60nsV(R2:2)

0V

20.0mV

40.0mV

55.3mV

_____ BW=500MHz

_____ BW=100MHz

Time

VO

UT

Rs=20

Time

0s 10ns 20ns 30ns 40ns 50ns 60nsV(R2:2)

0V

50mV

100mV

_____ BW=500MHz

_____ BW=100MHz

Time

VO

UT

Rs=75

• The simulations show the output of a voltage amplifier for two different Rs and bandwidths.

• The bandwidth of the amplifier directly affects the rise time of the waveform, independently of the value of RS.

• The peak amplitude of the waveform is strongly dependent on the amplifier bandwidth, especially for low values of RS. In fact, in this case IN can be very fast compared to the dominant time constant of the amplifier, which is unable to adequately reproduce the input signal.

• The time needed to collect the charge is just slightly influenced by the amplifier bandwidth.

• The same conclusions are valid also for the waveform of the output current obtained with a current buffer

Experimental validation of the model

Two different amplifiers have been used to read-out the ITC-irst SiPM

a) Transimpedance amplifier

BW=80MHz Rs=110 Gain=2.7k

b) Voltage amplifier

BW=360MHz Rs=50 Gain=140

• The model extracted according to the procedure described above has been used in the SPICE simulations

• The fitting between simulations and measurements is quite good

Current buffer: two alternative solutions

• CMOS 0.35um standard technology

• Feedback applied to reduce input resistance and increase bandwidth

Buffer1

Buffer2

Integrated current buffer: two alternative solutions

Buffer1

• simple structure

• more bandwidth (≈ 300 MHz)

• limited dynamic range

Buffer2

• more complex

• a little slower (BW 250 MHz)

• extended dynamic range

Experimental setup

8ns

V

7V

t4.5ns 4.5ns

Input waveform

BlueLed

SiPM

Vbias

Iout100Ω

50Ω BNCPulse Generator

CurrentBuffer

Voltage Amplifier

Experimental setup

Test board

MeasurePreliminary results: dark count pulses

• The test board is the bottleneck for the BW of the whole system

• The total no. of photons is always the same in all measurements

• The standard deviation of the current peak corresponds to about 1/2 micro-cell

MeasurePreliminary results: output waveforms

0 20 40 60 80 100 120 140 160 180 2000

0.5

1

1.5

2

Time [ns]

Iout

[m

A]

31.532 32.533 33.534

Vbias [V]

0 20 40 60 80 100 120 140 160 180 2000

0.5

1

1.5

2

2.5

3

3.5

4

4.5

Time [ns]

Iout

[m

A]

31.5 32 32.5 33 33.5 34 34.5 35 35.5

Vbias [V]

Buffer1 Buffer2

• The first solution exhibits limited dynamic range and gain, as expected

MeasurePreliminary results: linearity

31.5 32 32.5 33 33.5 34 34.5 35 35.50.5

1

1.5

2

2.5

3

3.5

4

4.5

Vbias [V]

Ipea

k [m

A]

First solution Second solution

• More measurements on the current buffers with known ligth source

• Definition of the architecture (shaper? current peak detector? on chip ADC?)

• 9 channel test chip

• Migration to another technology (for instance 0.18um)

• Final task: 64 channel ASIC

MeasureFuture work