EXPERIMENT NO.1 : ACTIVE LOW PASS FILTER

AIM: To design and set up an first order Butter worth low pass filter for f c

= 1 KHz and to plot the frequency response.

COMPONENTS & EQUIPMENTS REQUIRED : µA 741 op-amp, resistors, capacitors, connecting board, power supply, signal generator and CRO.

THEORY: A filter is a circuit that is designed to pass a specified band of frequencies while attenuating all signals outside this band. Filter network may be either active or passive.

Passive filter networks contain only resistors, inductors and capacitors.

Active filter networks contain transistors or op-amps plus resistors, inductors and capacitors.

There are four types of filters

1. Low Pass Filters2. High Pass Filters3. Band Pass Filters4. Band Stop Filters

Low Pass Filter : A low-pass filter is a circuit that has a constant output voltage from dc to a cutoff frequency f c . As the frequency increases above f c, the output voltage is attenuated (decreases).

Fig. (a) shows a first order low-pass Butterworth filter that uses an RC network for filtering. And the op-amp is used in the non inverting configuration, hence it does not lond down the RC network. Resistors R1 and f F, determine the gain of the filter.

I already said the low – pass filter has a constant A F from 0 Hz to the high cutoff frequency f c, At f c, the gain is 0.707 A f c, and after f c it decreases at a constant fold (one decade), the voltage gain is divided by 10. In other words, the gain decreases 20 dB ( = 20 log 10) each time the frequency is increased by 10. Hence the rate at which the gain rolls off after f c is 20 dB/decade or 6 db/octave, where octave signifies a two fold increase in frequency. The frequency f = f c is called the cut off frequency because the gain of the filter at this frequency is down by 3 dB ( = 20 log 0.707) from 0 Hz. Other equivalent terms for cut off frequency are – 3dB frequency, break frequency, or corner frequency.

Circuit Diagram

Fig. (a)

Design: Let fc=1Khz

fc=1/2П RC Choose proper value for C and find R

A= 1+Rf/R1 choose A=2 find Rf and R1

Tabular Column :

Input Voltage Vin = V P-P

Input frequency, f

in Hz

Output Voltage

Vo

Gain Magnitude

|Vo/Vin|

Magnitude (dB)=

20 log |V0/Vin|10 Hz

100 Khz

Frequency Response :

PROCEDURE :

1. Before wiring the circuit, check all the components using multi meter and IC IC tester.

2. Design the filter for a gain and make the connections as shown in circuit diagram.

3. Set the signal generator (input voltage) amplitude say IV peak to peak and observe the input (Vo) and output (Vo ) signals of the circuit simultaneously on CRO screen.

4. By varying the frequency of the input from Hz range to higher kHz range and note the frequency of signal and corresponding output voltage across pin number 6 of the op-amp with respect to ground. [See that input voltage V in remains constant throughout the frequency range].

5. The output voltage remains constant at lower frequency range.

6. Tabulate the readings in tabular column.

7. Plot the graph with frequency along X-axis and gain of dB along Y-axis.

RESULT :

Experiment No.2 : ACTIVE HIGH PASS FILTERS

AIM : To design and set up an 1st order Butter worth high pass filter for fc = 1 kHz and to plot the frequency response.

COMPONENTS AND EQUIPMENTS REQUIRED : µA 741 op-amp, resistors, capacitors, connecting board, power supply, signal generator and CRO.

THEORY : High pass filters attenuate the output voltage for all frequencies below the cut-off frequency fc , Above fc , the magnitude of the output voltage is constant. The range of frequencies that are transmitted is known as the pass band. The range of frequencies that are attenuated is known as the stop band.

High pass filters are often formed simply by interchanging frequency determining resistors and capacitors in low-pass filters. That is, a first-order high-pass filter is formed from a first order low-pass type by interchanging components R and C.

Fig.(a) shows a first order high pass Butter worth filter with a low cut off frequency of fc. This is the frequency at which the magnitude of the gain is a 0.707 times its pass band value. Obviously, all frequencies higher than fc are pass band frequencies, with the highest frequency determined by the closed-loop bandwidth of the op-amp.

CircuitDiagram

Design : : Let fc=1Khz

fc=1/2П RC Choose proper value for C and find R

A= 1+Rf/R1 choose A=2 find Rf and R1

Tabular Column :

Input voltage Vin=1 V P-P

Input frequency, f

in Hz

Output Voltage

Vo

Gain Magnitude

|Vo/Vin|

Magnitude (dB)=

20 log |V0/Vin|10 Hz

100 Mhz

PROCEDURE :

1. Before wiring the circuit, check all the components using multi meter and IC IC tester.

2. Design the filter for a gain and make the connections as shown in circuit diagram.

3. Set the signal generator (input voltage) amplitude say IV peak-to-peak and observe the input (Vin) an output (Vo) signals of the circuit simultaneously on CRO screen.

4. By varying the frequency of the input from Hz range to higher kHz range and note the frequency of signal and corresponding output voltage across pin no.6 of the op-amp, with respect to ground. [See that input voltage Vin remains constant throughout the frequency range].

5. The output voltage remains constant at higher frequency range.

6. Tabulate the readings in tabular column.

7. Plot the graph with frequency along X-axis and gain dB along y-axis.

RESULT :

Experiment No.3 : ACTIVE BAND REJECT FILTER

AIM : To design and set up an 2nd order butter worth Band Reject filter and to plot the frequency response.

COMPONENTS AND EQUIPMENTS REQUIRED : µA 741 op-amp, resistors, capacitors, connecting board, power supply, signal generator and CRO.

THEORY : Band – Reject filters is also known as Band Elimination filters.

Bond elimination filters perform in an exactly opposite way compared to Band pass filters. That is, band elimination filters reject a specified band of frequencies while passing all frequencies outside the band.

The narrow band-reject filter, often called the notch filter, is commonly used for the rejection of a single frequency such as the 72 Hz power line frequency wm . The most commonly used notch filter is the Twin – T network shown in Fig. (a), made up of two resistors and a capacitor, while the other uses two capacitors and a resistor.

The passive twin – T network has a relativity low figure of merit Q.

The Q of the network can be increased significantly if it is used with the voltage follower as shown in Fig. (b).

The frequency response of the active notch filter is shown in Fig. (c).

The most common use of notch filter is in communications and bio medical instruments for eliminating undesired frequencies.

Circuit Diagram :

Design : fc=1/(2ЛRC)

Choose proper value for C and find out R

Tabular Column :

Input voltage Vin=1 V P.P

Input frequency, f

in Hz

Output Voltage

Vo

Gain Magnitude

|Vo/Vin|

Magnitude (dB)=

20 log |V0/Vin|10 Hz

100 Khz

PROCEDURE

1. Before wiring the circuit, check all the components using multi meter and IC tester.

2. Make connections as shown in the circuit diagram.

3. Set the signal generator (input voltage) amplitude I V peak to peak sine wave and observe the input (V in ) and output (V o ) signals of the circuit simultaneously on dual channel oscilloscope.

4. By varying the frequency of the input from Hz range to 1 kHz range and note the frequency of the signal and corresponding output voltage across pin number 6 of the op-amp with respect to ground. [See that input voltage V in remains constant throughout the frequency range].

5. At some particular designed frequency, the voltage reaches minimum value. Enter it in the tabular column.

6. Plot the graph with frequency along X-axis and Gain in dB along Y-axis.

7. From graph determine bandwidth and Q.

RESULT :

Experiment No.3 : ACTIVE BAND PASS FILTER

AIM : To design and set up an 2nd order Butter worth Band pass filter and too plot the frequency response.

COMPONENTS AND EQUIPMENTS REQUIRED : µA 741 op-amp, resistors, capacitors, connecting board, power supply, signal generator and CRO.

THEORY : Band pass filters pass only a band of frequencies while attenuating all frequencies outside the band.

The narrow band-pass filter using multiple feedback is shown in figure (a). As shown in this figure, the filter uses only one op-amp. This filter is unique in the following respects :

[1] It has two feedback paths, hence the name multiple feedback filter.

[2] The op-amp is used in the inverting mode.

Another advantage of the multiple feedback filter is that the center frequency fc can be changed to a new frequency f’c without changing the gain or bandwidth. This is accomplished simply by changing R to R’2 so that

Circuit Diagram :

Design : Choose C1=C2=0.01μF ,Find R1=Q/(2ПfcCAf)

R2=Q/(2Пfc[2Q2-Af])

R3=Q/ЛfcC where Af=10, Q= fc /(fh-fl) = 3

Tabular Column :

Input voltage V in = 1 V P.P.

Input frequency, f

in Hz

Output Voltage

Vo

Gain Magnitude

|Vo/Vin|

Magnitude (dB)=

20 log |V0/Vin|10 Hz

100 Khz

PROCEDURE :

1. Before wiring the circuit

1. Make connections as shown in the circuit diagram.

2. Set the signal generator (input voltage) amplitude I V peak to peak sine wave and observe the input (Vin) and output (Vo) signals of the circuit simultaneously on dual channel oscilloscope.

3. By varying the frequency of the input from Hz range to higher kHz range and note the frequency of the signal and corresponding output voltage V in remains constant throughout the frequency range].

4. At some particular designed frequency, the voltage reaches maximum value. Enter it in the tabular column.

5. Plot the graph with frequency along X-axis and Gain in dB along Y-axis.

6. From graph determine bandwidth and Q.

RESULT :

Experiment No.3 : ENVELOPE DETECTOR

AIM : Conduct an experiment to demonstrate envelope detector for an input AM signal. Em = Ac (1 + m sin wmt) cos wct) cos wct. Plot the variation of o/p signal amplitude v/s the depth of modulation.

COMPONENTS AND EQUIPMENTS REQUIRED : OA79 diode, resistors, capacitors, function generator, connecting board and CRO.

THEORY : An envelope detector is a simple and highly effective device that is well-suited for the demodulation of narrow-band AM wave (that is the carrier frequency is large compared with the modulating signal bandwidth), for which the percentage modulation is less than 100%. In an envelope detector, the o/p of the detector follows the envelope of the modulated signal, hence the name.

Fig. (a) shows the envelope detector circuit. It consists of a diode and a resistor capacitor filter. This circuit is also known as diode detector. In the positive half cycle of the AM signal diode conducts and current flows though R whereas in the negative half cycle, diode is reverse biased and no current flows through R. As a result only positive half of the AM wave appears across RC.

Let us see how RC filter responses to this positive half of AM wave on the positive half cycle, the diode is forward biased and the capacitor C charges up rapidly to the peak value of the input signal when the input signals falls below this value, the diode becomes reverse biased and the capacitor C discharges slowly through the load resistor RL. The discharging process continues until the next positive half cycle when the input signal becomes greater than the voltage across capacitor, the diode conducts again and the process is repeated..

Circuit Diagram :

Design : 1/fc << RLC << 1/W

W=fm So RLC << 1/fm Choose proper value of C find RL for given carrier and message signal frequencies

PROCEDURE :

1. Before wiring the circuit, check all the components using multi meter.

2. Make the connections as shown in circuit diagram.

3. From function generation apply AM wave to the input.

4. Vary the modulation index knob (that is M1) and note down v max’ , v min simultaneously and also note down the o/p voltage vO in steps.

5. Plot the graph Vo versus modulation index (M1).

RESULT :

Experiment No.4 : COLLECTOR MODULATION

AIM : Conduct an experiment to generate an AM signal using collector modulation for an fc = 455 kHz and fm = 2 kHz. Plot the variations of modulation signal amplitude versus modulation index.

COMPONENTS AND EQUIPMENTS REQUIRED : AFT, IFT, Function generators, CL 100/BF 194 Transistor, Resistors, Capacitors, power supply and CRO.

THEORY : Fig.(a) shows the basic circuit for a BJT modulator. It is high power class C amplifier with high level modulators. The modulator is a linear power amplifier that takes the low level modulating signal and amplifies it to a high power level. The modulating output signal is coupled through modulating transformer T1 to the class C amplifier. The secondary winding of the modulation transformer is connected in series with the collector supply voltage Vcc of the class C amplifier. This means that modulating signal is applied in series with the collector power supply voltage of the class C amplifier applying collector modulation.

In the absence of modulating input signal, there will be zero modulation voltage across the secondary of T1. Therefore, the collector supply voltage will be applied directly to the class C amplifier generating

current pulses of equal amplitude and the output of the tuned circuit will be a steady sine wave.

When the modulating signal occurs, the a.c. voltage across the secondary of the modulating transformer will be added to and subtracted from the collector supply voltage. This varying supply voltage is then applied to the class C amplifier, resulting in variations in the amplitude of the carrier sine wave in accordance with the modulated signal. Due to this amplitude of the current pulses also vary in accordance with the modulating signal. The tuned circuit then converts the current pulses into an amplitude modulated wave as shown in Fig. (b).

Circuit Diagram :

Tabular Column :

Vm signalAmplitude

vm

Vmax Vmin

Modulationindex

µ

PROCEDURE :

1. Check all the components using multi meter.

2. IFT is tuned by connecting in between signal generator and CRO with V1=2V(p-p) vary frequency of signal generator so that maximum o/p is obtained.

3. Biasing circuit is same as in class C operation.

4. Make the connections as shown in circuit diagram (a).

5. Switch off the AFT (modulating input) of modulating signal. For carrier frequency ‘fc’ (from test oscillations) of modulating signal. Adjust the carrier frequency to get maximum O/P. (Here fine tune the signal).

6. Switch on the modulating signal and adjust amplitude about 5 V P-P; Frequency 1 to 2 kHz and obtain an undistorted amplitude modulated o/p.

7. Feed AM output to Y-pates and Modulation signal to X-plates of CRO. Obtain trapezoidal patterns as shown.

8. Keep carrier amplitude constant. Vary modulating voltage (amplitude) in steps and measure Vmax and Vmin and calculate modulation index.

9. Plot the graph modulating signal versus modulation index.

Result :

Experiment No.5 : BALANCED MODULATION IC 1496

AIM : Using IC 1496, rig up a balanced modulator circuit, test its operation and record the waveform.

COMPONENTS AND EQUIPMENTS REQUIRED : IC 1496, Resistors, capacitors, power supply, function generators and CRO.

THEORY : The integrated circuit (IC) balanced mixed is widely used in receiver ICs, as well as being available as a separate integrates circuit. The IC versions are usually described as balanced modulators since the modulation function is basically the same as the mixing functions.

Integrated circuit doubly balanced modulators like the LM 1496 operate as multiplier circuits that produce only side band pairs at the o/o.

Application is simple, requiring only bias and an approximate band pass filter to eliminate side band pairs at harmonics of the carrier very little adjustment is required to obtain good balance.

An important advantage of the integrated circuit balanced modulator is that, when it is operated with a large carrier signal, the o/p signal amplitude is independent of the carrier amplitude. The result is that the o/p amplitude depends only on the amplitude of the input signal (which is he modulating signal when it is used as a modulator or the side band when it is used as a demodulator).

GENERAL DESCRIPTION :

LM 1596/LM 1496 Balanced Modulator – Demodulator : The LM 1596/LM 1496 are double balanced modulators – demodulators which produce an output voltage proportional to the product of an input (signal) voltage and switching (carrier) signal. Typical applications include suppressed carrier modulation, amplitude modulation, synchronous detection. FM or PM detection, broad band frequency doubling and chopping LM 1496 is specified for operation over the 0o C to + 70 oC temperature range.

Features :

1. Excellent carrier suppression.65 dB typical at 0.5 MHz.50 dB typical at 10 MHz.

2. Adjustable gain and signal handling.3. Fully balanced inputs and outputs.4. Low offset and drift.5. Wide frequency response up to 100 MHz.

The equivalent internal circuitry and 14 – pin Dip pin out for the LM1496 are shown in Fig.(b) and (c).

The circuit consists of two differential pairs with cross-occupied open collectors a biasing current source, and a modulation input section signals that are applied to the carrier and modulation inputs are multiplied together, and the product is scaled by the gain of the circuit. The LM1496 is designed to operate with carrier frequencies up to 100 MHz.

PROCEDURE :

1. Before wiring the circuit check all the components using multi meter.

2. Make the connections as shown in circuit diagram.3. Apply positive (+ 12 V) and negative (-12 V) voltage to the IC as

Vcc.4. Set the carrier wave amplitude and frequencies and also the

modulating signal amplitude and frequencies so as to get the DSBSC wave.

5. Check for the positive and negative o/p voltage at pin no.6 and 12 respectively.

6. Observe the phase reversals at the cross points as shown in the Fig.(d).

Circuit Diagram :

Result :

Experiment No.6 : RING MODULATION

AIM : Rig up and test a ring modulator / twisted ring modulator to generate a DSBSC signal and plot the o/p waveform.

COMPONENTS AND EQUIPMENTS REQUIRED : OA79 diodes, Audio transformers, function generators and CRO.

THEORY : A circuit known as the double balanced ring modulator, which is widely used in carrier telephony, is shown in Fig.(a). The name comes from the fact that the circuit is balanced to reject both the carrier and modulating signals using a ring of diodes. The o/p contains only side band pairs about the carrier frequency position and several of its harmonies.

Fig.(a) shows the ring modulator. It consists of a input transformer T1, an output transformer T2 and four diodes connected in a bridge circuit.

Here the carrier signal is applied to the center taps of the input and output transformer and modulating signal is applied to the input transformer T1. The o/p appears across the secondary of the transformer. The diodes connected in the bridge acts like switches, and their switching is controlled by the carrier signal as it is usually higher in frequency and amplitude than the modulating signal.

The doubly balanced diode ring circuit is widely used as a mixer in microwave. Applications where shielded enclosures prevent radiation.

Circuit Diagram :

PROCEDURE :

1. Before wiring the circuit, check all the components using multi meter.

2. Make the connections as shown in circuit diagram.

3. Connect the AF generator M(t) and C(t) as shown.

4. Select amplitude of modulating signal as Vm = 0.5 V(P-P) at a frequency of 450 Hz (fm = 450 Hz) and for carrier signal Vc = 1.4(P-P) at frequency of 10 kHz (fc = 10 kHz).

5. Observe DSBSC waveform on CRO. Observe the phase voltage and study variation by changing AF signal amplitude and frequency and Diodes are [OA79] point contact diodes.

Result :

EXPERIMENT NO.7 : FREQUENCY MODULATION IC 8038

AIM : Design and conduct a suitable experiment to generate an FM wave using IC 8038. Find the modulation index ‘β’ and the bandwidth of operation ‘Br’ and display the waveforms.

COMPONENTS AND EQUIPMENTS REQUIRED : IC 8038, resistors, capacitors, function generators, power supply and CRO.

THEORY: The IC 8038 waveforms generator is a monolithic integrated circuit capable of producing high accuracy sine, square, triangular, sawtooth and pulse waveforms with a minimum of external pulse components.

The frequency of the waveform generator is direct function of the dc voltage at terminal (measured from V+). By altering this voltage, frequency modulation is performed. For small deviations (eg. ± 10%) the modulating signal can be applied directly to pin 8, merely providing dc de-couping with a capacitor. An external resistor between pins 7 and 8 is not necessary but it can be used to increase input impedance from about 8K. (Pins 7 and 8 connected together), to about (R + 8KW).

The sine wave output has a relative high output impedance (1K typical). The circuit may use a simple op-amp follower to provide buffering, gain and amplitude adjustment.

For large FM deviations or for frequency sweeping, the modulating signal is applied between the positive supply voltage and pin 8. In this way the entire bias for the current sources is created by the modulating, and a very large (eg. 1000 : 1) sweep range is created (f = 0 at V sweep = 0). Care must be taken, however, to regulate the supply voltage; in this configuration the charge current is no longer a function of the supply voltage (yet the trigger thresholds still are) and thus the frequency, becomes dependent on the supply voltage. The potential on pin 8 may be swept down from V + by (7/3 V supply – 2 V).

The IC 8038 is fabricated with advanced monolithic technology, using Schottkybarrier biodes and thin film resistors, and the output is stable over a wide range of temperature and supply variations.

Features :

1. Low-frequency drift with temperature.2. Simultaneous sine, square and triangular wave o/ps.3. Low distortion sine wave output.4. High linearity triangle wave output.5. Wide operating frequency range 0.001 Hz to 300 kHz.6. High level outputs – TTL to 28 V.7. Easy to use – just a handful of external components required.

CIRCUIT DIAGRAM :

PROCEDURE :

1. Before wiring the circuit checl all the components using multi meter.

2. Make the connections as shown in circuit diagram

3. Apply + ve (+ 12V) and – ve (-12 V) voltages to the IC as VCC.

4. And observe the waveform at pin no.9, 3 and 2 on CRO that is square, triangular and sine wave respectively.

5. measure sine wave amplitude and frequency. It will be the frequency of carrier wave.

6. Switch on the function generator and apply modulating signal of Vim(p-p) = 2 V (P-P) and frequency in the range of 1 kHz to 10 kHz through RC circuit as shown.

7. Observe FM wave output at pin 2. Draw output waveform and note downf max and f min.

8. Calculate modulation index β and transmission bandwidth Br.

Experiment No.8 : PRE-EMPHASIS AND DE-EMPHASIS

AIM : Design and conduct an experiment to test a pre-emphasis circuit for 75 μ Sec and record the results.

Design and conduct an experiment to test a De-emphasis circuit for 75 μ sec and record the results.

COMPONENTS AND EQUIPMENTS REQUIRED : Resistors, capacitors, μA 741 op-amp, function generator, CRO and Bred Board.

THEORY : The noise triangle showed that noise has a greater effect on the higher modulating frequencies than on the lower ones. Thus, if the higher frequencies were artificially boosted at the transmitter and correspondingly cut at the receiver, an improvement in noise immunity could be excepted, thereby increasing the signal to noise ratio. This boosting of the higher modulating frequencies, in accordance with a pre-arranged curve, is termed pre-emphasis and the compensation at the receiver is called de-emphasis.

The circuit diagram of pre-emphasis and de-emphasis is shown in Fig. (a) and Fig. (b).

Take two modulating signals having the same initial amplitude, with one of them pre-emphasized to twice this amplitude, whereas the other is unaffected (being at a much lower frequency).

The receiver will naturally have to de-emphasis the first signal by a factor of 2, to ensure that both signals have the same amplitude in the output of the receiver. Before demodulation, i.e., while susceptible to noise interference, the emphasized signal had twice the deviation it would have had without pre-emphasis and was thus more immune to noise. When this signal is de-emphasized, any noise sideband voltages are de-emphasized with it and therefore have a correspondingly lower amplitude then they would have had without emphasis. Their effect on the output is reduced.

The amount of pre-emphasis in U.S. FM broadcasting, and in the sound transmission accompanying television, has been standardized as 75- μs, whereas a number of other services, notably European and Australian broadcasting and TV sound transmission, use 50 μs. The usage of microseconds for defining emphasis is standard. A 75-μs de-emphasis corresponds to a frequency response curve that is 3 dB down at the frequency whose time constant RC is 75 μs. This frequency is given by f = 1/2πRC and is therefore 2120 Hz. With 50-…s de-emphasis it would be 3180 Hz. Fig. (c) shows pre-emphasis and de-emphasis curves for a 75-μs emphasis, as used in the United States.

The curves of Fig.(c) show that a 15-kHz signal is pre-emphasized by about 17 dB; with 50 …s this figure would have been 12.6 dB. It must be made certain that when such boosting is applied, the resulting signal cannot over modulate the carrier by exceeding the maximum 75-kHz deviation, since distortion will be introduced. It is seen that a limit for – pre-emphasis exists, and any practical value used is always a compromise between protection for high modulating frequencies on the one hand and risk of over modulation on the other.

If emphasis were applied to amplitude modulation, some improvement would also result, but it is not as great as in FM because the highest modulating frequencies in AM are no more affected by noise than any others. Apart from that, it would be difficult to introduce pre-

emphasis and de-emphasis in existing AM services since extensive modifications would be needed, particularly in view of the huge numbers of receives in use.

CIRCUIT DIAGRAM :

PRE-EMPHASIS

DE-EMPHASIS

PROCEDURE :

1. Before wiring the circuit, check all the components using multi meter.

2. Make the connections as shown in circuit diagram.

3. Set the signal generator (input voltage) amplitude say 1 V P-P sine wave and observe the input and output signals of the circuit simultaneously on CRO screen.

4. By varying the frequency of the input from Hz range to higher kHz range and note the frequency of the signal and measure the output voltage V0.

5. Tabulate the readings in tabular column.

6. Plot the graph with frequency along X-axis and gain dB along Y-axis.

Experiment No.9 : PULSE AMPLITUDE MODULATION

AIM : To conduct an experiment to generate PAM signal and also design a circuit to demodulate the PAM signal and verify sampling theorem. Plot the relevant waveforms.

COMPONENTS AND EQUIPMENTS REQUIRED : Transistor SL100, resistors, capacitor, Diode OA79, connecting board, signal generator and CRO.

THEORY : In pulse Amplitude Modulation (PAM) the amplitude of the pulses are varied in accordance with the modulating signal denoting the modulating signal as m(t), pulse amplitude modulation is achieved simply by multiplying the carrier with the m(f) signal. The balanced mixer / modulators are frequently used as multipliers for this purpose. The o/p is a series of pulses, the amplitudes of which vary in proportion to the modulating signal.

Fig. (a) shows the circuit diagram of PAM.

The particular form of pulse amplitude modulation (shown in Fig. C) is referred to as natural PAM because the tops of the pulses follow the shape of the modulating signal.

As shown in Fig. (c) the samples are taken at regular interval of time. Each sample is a pulse, whose amplitude is determined by the amplitude of the variable at the instant of time at which the sample is taken. If enough samples are taken, a reasonable approximation of the

signal being sampled can be constructed at the receiving end. This is known as “pulse amplitude modulation”.

The sampling theorem states that, if the sampling rate in any pulse modulation system exceeds twice the maximum signal frequency, the original signal can be reconstructed in the receiver with minimal distortion.CIRCUIT DIAGRAM :

PROCEDURE :

1. Before wiring the circuit check all the components using multi meter.

2. Make the connections as shown in circuit diagram.

3. Set the carrier amplitude to around 2V(p-p) and frequency in the range of 5 kHz to 15 kHz.

4. Set the signal amplitude to around 1 V (p-p) and frequency to 2 kHz.

5. Connect the CRO at the emitter of the transistor and observe the PAM waveform.

6. Now to verify sampling theorem, keep the modulating signal frequency to say 2kHz and the carrier frequency to twice that of modulating signal frequency and observe the o/p waveform. Connect this o/p to the demodulator circuit and observe the signal if it matches with the modulating signal then sampling theorem is verified.

7. Check the demodulated o/p for different frequencies of carrier wave.

Experiment No.10 : PULSE WIDTH MODULATION

AIM : Conduct an experiment to generate a PWM signal for the given analog signal of frequency less than 1 kHz.

COMPONENTS AND EQUIPMENTS REQUIRED : μA 741 Op-Amp, resistors, signal generators, power supply and CRO.

THEORY : Pulse width modulation is also known as pulse duration modulation [PDM]. Three variations of pulse width modulation are possible. In one variation, the leading edge of the pulse is held constant and change in pulse width with signal is measured with respect to the leading edge. In other variation, the tall edge is held constant and with respect to its pulse width is measured. In the third variation, centre of the pulse is held constant and pulse width changes on either side of the centre of the pulse. This is illustrated in Fig.b.

Fig. A shows the circuit diagram of PWM. In PWM, the same sampling take is used as that is PAM. However, unlike PAM, noise is not as much problem, since in PWM, amplitude is held constant.

Pulse width modulation has the disadvantage when compared to pulse position modulation [PPM], that its pulses are of varying width and therefore of varying power content, this means that the transmitter must be powerful enough to handle the maximum width pulses, although the average power transmitted is perhaps only half of the peak power. PWM still works if synchronization between transmitter and receiver fails, whereas pulse position does not.

CIRCUIT DIAGRAM:

Experiment No. 11 : PULSE POSITION MODULATION

AIM : To conduct an experiment to generate PPM signal of pulse width (between 100 μs and 200 μs) for a given modulating signal.

COMPONENTS AND EQUIPMENTS REQUIRED : μA 741 op-amp, 555 timer IC resistors, capacitors, diode IN4007, signal generator, power supply and CRO.

THEORY : In this type of modulation, the amplitude and width of the pulses is kept constant, while the position of each pulse, with reference to the position of a reference pulse is changes according to the instantaneous sampled value of the modulating signal.

Pulse position modulation is observed from pulse width modulation. Any pulse has a leading edge and trailing edge.

In this system the leading edge x, is held in fixed position while the trailing edge, varies towards or a way from X in accordance to instantaneous value of sampled signal. The length XY of the pulse is hence width modulated.

PROCEDURE :

1. Before wiring the circuit check all the components using multi meter.

2. Make the connections as shown in circuit diagram.3. Set the carrier amplitude to around 4 V (P-P)4. Set the signal amplitude to around 2 V (P-P) and frequency < 1

kHz.5. Observe the output signal at pin no.6, of second op-amp and also

observe the variation in pulse width by varying the modulating signal amplitude.

6. Draw PWM waveform.

CIRCUIT DIAGRAM:

Experiment No. 12 : TRANSISTOR MIXER

AIM : To design a transmitter mixer circuit and demonstrate the mixing action (up and down) for an IFT of 455 kHz.

COMPONENTS AND EQUIPMENTS REQUIRED : IFT, resistors, capacitors, signal generator, power supply, connecting board and CRO.

THEORY : Transistors mixer is also known as RF amplifier, RF amplifier provides initial gain and selectivity. Fig. (a) shows the RF amplifier circuits. It is a tuned circuit followed by an amplifier. The RF amplifier is usually a simple class A circuit. A typical bipolar circuit is shown in Fig. (a).

The values of resistors R1 and R2 in the bi-polar circuit are adjusted such that the amplifier works as class A amplifier. The RF (input (Antenna) is connected through coupling capacitor [CC1] to base of the transistor. This makes the circuit very broad band as the transistor will amplify virtually any signal picked up by the RF input (Antenna). However the collector is tuned with a parallel resonant circuit to provide the initial selectivity for the mixed input.

And also local oscillator input is connected through coupling capacitor to the emitter of the transmitter.

PROCEDURE :1. Before wiring the circuit check all the components using multi meter.2. Connect the IFT in between signal source and CRO and measure the

tuned frequency that is f IFT = 455 KhZ.3. Rig up the circuit as shown in Fig. (a). Using the same 1FT.4. Switch on the signal source V1 and V2 (use always MHz frequency

range). Adjust V2 amplitude to be 10 times larger than V1.For ex : V1 = 5 V (P-P) and V2 = 0.5 V (P-P)

5. Vary the frequency of RF source V1 and local oscillator source V2

such that we can see undistorted sine wave on CRO.6. Note down V1 and V2 the difference should be equal to IFT frequency

that is 455 kHz.7. Tabulate the readings in the tabular column.8. If f2 – f1 = fIFT up conversion and if f1 – f2 = fIFT down conversion. 9. Plot the waveform.

CIRCUIT DIAGRAM:

EXPERIMENT NO.13 : FREQUENCY DEMODULATION USING PHASE LOCKED LOOP IC

AIM :

Conduct a suitable experiment to determine the locking and capture range and frequency demodulator of IC 565 (PLL).

And also implement a frequency synthesizers circuit using IC 565.

COMPONENTS AND EQUIPMENTS REQUIRED:

IC 565, Breadboard, capacitors, resistors, connecting wires, power supply and CRO.

THEORY: A phase locked loop is basically a closed loop system designed to lock the output frequency and phase to the frequency and phase of an input signal. It is commonly abbreviated as PLL.

It consists of :

Phase detector

Low pass filter

Error amplifier

Voltage controlled Oscillator (VCO)

The phase detector compares the input frequency fi with the feedback frequency f0 and generates an output signal which is a function of the difference between the phase of the two input signals. The output signal of the phase detector is a dc voltage. The output of phase detector is applied to low-pass filter to remove high frequency noise is often from the dc voltage. The output of low pass filter without high frequency noise is often referred to as error voltage or control voltage for VCO. When control voltage is zero, VCO is in free running mode and its output frequency is called as cenre frequency f0.

The error or control voltage applied as an input to the VCO, forces the VCO to change its output frequency in the direction that reduces the difference between the input frequency and output frequency of VCO.

Once the two frequencies are same, the circuit is said to be locked. Thus, a PLL goes through three state : free running, capture and phase lock.

Lock Range : When PLL is in lock, it can track frequency changes in the incoming signal. The range of frequencies over which the PLL can maintain lock with the incoming signal is called the lock range or tracking range of the PLL. It is usually expressed as a percentage of f0, the VCO frequency.

CAPTURE RANGE : The range of frequencies over which the PLL can acquire lock with an input signal called the capture range. It is also expressed as a percentage of f0.

PULL-IN TIME: The capture of an input signal does not take place as soon as the signal is applied, but it takes finite time. The total time taken by the PLL to establish lock is called pull-in-time. This depends on the initial phase and frequency difference between the two signals as well as the overall loop again and the bandwidth of the low pass filter.

Fig. (b) shows the transfer characteristics of PLL. Just see the figure how the PLL is locking and capture the frequency.

IC 565 available in a 14 pin DIP package. Fig. © shows 14-pin configuration for IC 565 and Fig. (d) shows the block diagram for IC 565.

The centre frequency of the PLL is determined by the free-running frequency of the VCO and it is given as , …………

Where R1 and C1 are an external resistor and a capacitor connected to pins 8 and 9, respectively. The values of R1 and C1 are adjusted such that the free running frequency will be at the centre of the input frequency range. The value of R1 is restricted from 2 kΩ to 20 kΩ but a capacitor can have any value. A capacitor C2 connected between pin 7 and the positive supply (pin 10) forms a first order low pass filter with an internal resistance 3.6 kΩ The value of filter capacitor C2

should be large enough to eliminate possible oscillations in the VCO voltage.

The lock range and capture range for IC 565 PLL are given by the following equations : …..

Where f0 = free running frequency of VCO in Hz and V = (+V) – (-V) volts.

Where C2 is in Farads.

CIRCUIT DIAGRAM: