Abstract CPU Modeling and Refinement in Metropolis

Haibo Zeng, Qi Zhu

CS252 Course ProjectMentor: Trevor Meyerowitz

Outline

Overview Metropolis Our model

Advantages Correctness Limitations

Summary

etropolis

Formal Semantics

Our CPU ModelingProof of the Design Methodology based on Metropolis

AdvantagesCorrectness

Mainly cycle time now; more quantities can be added

•Formal•Flexible•Parameterizable

Estimation of cycle time

Construct models by using formal semantics;Easy refinement and Modification;Easily change many Parameters of the CPU models;

Compare

SimpleScalar

Can be a simulator; but not only a simulator

Base

Goal

How

MetropolisFunction

Specification

ArchitecturePlatform

Metropolis Infrastructure•Formal Semantics•Meta model of comp.

Design Constraints

SynthesisRefinement

AnalysisVerification

Abstract description of

ISA functionality

Arch. library blocks•Parameterizable•Extendable

Our work

Prove this design

methodologyProvid

eblocks

Can be a simulator

Our model

Fetch Process

Exec. Process

…

Issue Channel

RS Info.

Result Channels

Out of Order Execution Model (Two Processes)

Execution Trace

Branch Predictor CDB Controller

One inst. in a single issue arch.; a group of inst.s in a multi-issue arch.

…

FU FU FU…

RS RS RS

Our model (cont) Fetch Process:

1. Handles the fetched instructions from execution trace; and issues them to the Exec. Process (single issue or multiple issue).

2. Can integrate branch predictors (so far, we have a 2-bits predictor). Exec. Process:

1. Handles the operand dependencies, execution and commit.

2. First add inst. to RS (reservation stations), then execute the inst., finally write back the inst.

3. Can add CDB controller (we use buffers to store the inst.s which have been executed already but not committed).

Advantages Formal Semantics

Based on a formal semantics provided by Metropolis. Enables a clear design flow. And the model is easy to be implemented in hardware.

Easy refinement and modification Modular Built-in notion of refinement in Metropolis

Advantages (cont) Parameterizable

Since the model is at a high level, there are many parameters can be configured.

e.g. issue width; branch model; number of FUs; misprediction penalty; instruction types, instruction execution time; reservation station size …

Unified Framework in Metropolis Can be integrated with other formal models in

Metropolis.

Correctness Compare with SimpleScalar --- Cycle time

Microarchitecure: Intel Xscale

Number of Inst. SimpleScalar Our model Relative Error

rijndael 15146 21662 20234 -6.6%

fft 15460 21994 20612 -6.3%

tiffdither 22696 30555 30107 -1.5%

ispell 41936 59175 60001 1.4%

madplay 148674 178881 179681 0.4%

search 187422 238402 231819 -2.8%

Average 3.2%

Benchmark: MiBench Version 1.0http://www.eecs.umich.edu/mibench/

Limitations For the design methodology, more formal usually

means the loss of some performance

For our models, some blocks need to be added to make the models more general

Summary Abstract CPU modeling in Metropolis; Prove the

feasibility of constructing CPU model by this formal methodology

Provide several CPU models with different constraints; also provide some library blocks which can be used to construct new models

These abstract models can be configured to simulate different architectures

Future work Model the memory system Model interrupts More branch prediction schemes Combine it with other Metropolis architecture

models Try more applications

Thanks!

Extra --- Parameterizable Different Issue Width

Number of Inst. Width = 1 Width =2 Width = 4

rijndael 15146 22103 20733 20234

fft 15460 22133 20897 20612

tiffdither 22696 33207 30462 30107

ispell 41936 61326 60040 60001

madplay 148674 193016 182319 179681

Search 187422 260022 235742 231819

Benchmark: MiBench Version 1.0http://www.eecs.umich.edu/mibench/