chain with RSSI, and frequency synthesizer is less than 1.2 mW at

1-V supply voltage. The measured power consumption breakdown

of the total receiver IC is provided in Table 1. The implemented re-

ceiver is benchmarked with previously reported low-IF 400 MHz

receivers for biomedical applications in Table 2. The receivers in

Refs. 7 and 8 achieve lower power consumption mainly by avoid-

ing the usage of a frequency synthesizer, and thus do not support

standalone multichannel tuning capabilities. The presented solution

features a robust low-IF architecture with integrated frequency syn-

thesizer for multichannel support, and can be used for implantable/

wearable biomedical wireless sensor applications.

5. CONCLUSIONS

An ultra-low-power low-voltage 401–406 MHz MedRadio re-

ceiver for biomedical telemetry applications is implemented

using 0.18-lm CMOS process. Low-power design techniques

are used throughout the receiver chain to minimize the power

consumption of the overall chip while maintaining the robust-

ness of a complete multichannel wireless receiver. The low-IF

receiver achieves an overall gain of over 80 dB, NF of 14 dB,

image rejection of 32 dB, and phase noise of �106 dBc/Hz at

100-kHz offset while consuming 1.2 mW at 1-V supply voltage.

REFERENCES

1. T.H. Teo, P.K. Gopalakrishnan, Y.S. Hwan, X.B. Qian, K. Haridas,

C.Y. Pang, H.-K. Cha, and M. Je, A 700-lW single-chip IC for

wireless continuous-time health monitoring in 0.18-um CMOS,

IEEE J Solid-State Circuits 45 (2010), 2292–2299.

2. A. Wong, G. Kathiresan, C. Chan, O. Eljamaly, O. Omeni, D.

McDonagh, A. Burdett, and C. Toumazou, A 1V wireless trans-

ceiver for an ultra-low-power SoC for biotelemetry applications,

IEEE J Solid-State Circuits 43 (2008), 1511–1521

3. M. Patel and J. Wang, Applications, challenges, and prospective in

emerging body area networking technologies, IEEE Wirel Commun

17 (2010), 80–88.

4. MICS Band Plan Federal Commun. Comm., Part 95, FCC rules

and regulations, Washington, DC, Jan. 2003.

5. MedRadio Approval, FCC 09–23-A1, Washington, DC, Mar. 2009.

6. J.L. Bohorquez, A.P. Chandrakasan, and J.L. Dawson, A 350uW

CMOS MSK transmitter and 400uW OOK super-regenerative re-

ceiver for medical implant communications, IEEE J Solid-State

Circuits 44 (2009), 1248–1259.

7. J. Bae, N. Cho, and H. Yoo, A 490uW fully MICS compatible

FSK transceiver for implantable devices, In: Proceedings of IEEE

Symposium on VLSI Circuits Conference, 2009, pp. 36–37.

8. J. Pandey, J. Shi, and B.P. Otis, A 120uW MICS/ISM-band FSK re-

ceiver with a 44uW low-power mode based on injection-locking and

9x frequency multiplication, In: Proceedings of IEEE International

Solid-State Circuits Conference, San Francisco, CA, 2011, pp. 460–462.

9. B. Razavi, Design of analog CMOS integrated circuits, McGraw

Hill, 2000.

10. H.-K. Cha, M.K. Raja, X. Yuan, and M. Je, A CMOS MedRadio

receiver RF front-end with complementary current-reuse LNA for

biomedical applications, In: Proceedings of IEEE Asian Solid-State

Circuits Conference, San Francisco, CA, 2010, pp. 53–56.

11. R. Zanbaghi, M. Atarodi, and A. Tajalli, An ultra low power Gm-

C complex bandpass filter for low-IF wireless PAN applications,

In: Proceedings of IEEE TENCON, 2006.

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plex filter for Bluetooth with frequency tuning, IEEE Trans Cir-

cuits Systems II 50 (2003), 742–754.

13. Y.-C. Chen, Y.-C. Wu, and P-C. Huang, A 1.2-V CMOS limiter/

RSSI/demodulator for low-IF FSK receiver, In: Proceedings of

IEEE Custom Integrated Circuits Conference, 2007, pp. 217–220.

14. M. Cha and I. Kwon, A low-power 5-GHz CMOS RF receiver for

WLAN applications, Microwave Opt Technol Lett 54 (2012),

842–847.

15. W. Khalil, S. Shashidharan, T. Copani, S. Chakraborty, S. Kiaei,

and B. Bakkaloglu, A 700-uA 405-MHz all-digital fractional-N fre-

quency-locked loop for ISM band applications, IEEE Trans Micro-

wave Theory Tech 59 (2011), 1319–1326.

16. N. Cho, J. Bae, and H. Yoo, A 10.8 mW body channel communi-

cation/MICS dual-band transceiver for a unified body sensor net-

work controller, IEEE J Solid-State Circuits 44 (2009), 3459–3468.

VC 2012 Wiley Periodicals, Inc.

A DIFFERENTIAL BiCMOS DIVIDE-BY-4INJECTION-LOCKED FREQUENCYDIVIDER

Chia-Wei Chang and Sheng-Lyang JangDepartment of Electronic Engineering, National Taiwan University ofScience and Technology, Taipei, 106 Taiwan, Republic of China;Corresponding author: m9502216@mail.ntust.edu.tw

Received 30 March 2012

ABSTRACT: A low power wide locking range divide-by-4 injection-locked frequency divider (ILFD) is proposed in the letter and was

implemented in the TSMC 0.18 lm SiGe BiCMOS process. The divide-by-4 ILFD uses a cross-coupled voltage-controlled oscillator with anactive inductor and a three-transistor composite consisted of two

nMOSFETs and one pMOSFET to serve as an injection device with thefunction of linear and nonlinear mixers. At the supply voltage of 1.5 Vand at the incident power of 0 dBm, the operation range of the divide-

by-4 is 2.3 GHz, from the incident frequency 14.5 to 16.8 GHz, thepercentage is 14.7%. The locking range of the divide-by-4 is 1.7 GHz,

from the incident frequency from 14.6 to 16.3 GHz, the percentage is11%. The core power consumption is 1.5 mW. The die area is 0.465 �0.317 mm2. VC 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett

54:2825–2828, 2012; View this article online at wileyonlinelibrary.com.

DOI 10.1002/mop.27204

Key words: wide-band; divide-by-4 injection-locked frequency divider;

locking range; SiGe BiCMOS

1. INTRODUCTION

BiCMOS technology has been widely used to design radiofre-

quency-integrated circuits, because bipolar and MOSFET devices

can be used to optimize the circuit performance by using both the

merits of the bipolar and MOSFET simultaneously. Frequency

dividers are key components in many high-speed communication

systems. The figure merits of injection-locked frequency divider

(ILFD) include power consumption, die area, and locking range.

Low power circuit is widely used in portable electronics to

extend the lifetime of battery. Small die area is used to reduce

the product cost and large locking range is desirable for the ILFD

robust to the variations of process, temperature, and supply volt-

age. An ILFD [1] divides down the frequency of injection signal

depending on the designed modulus, and it tracks the phase of

the injection signal, increasing the modulus and the locking range

of ILFD reduces significantly. A high-modulus ILFD is attractive

because it merges many low-modulus ILFDs in one, saves die

area, and lowers power consumption, consequently a lower cost

circuit and system can be designed. Previously, a BiCMOS

dynamic divide-by-4 frequency divider [2] and a BiCMOS emit-

ter-coupled-logic quadrature divide-by-4 ILFD [3] consume large

power. This letter designs a low power differential divide-by-4

ILFD in SiGe BiCMOS process.

One conventional small-die tail-injected BiCMOS differential

divide-by-4 ILFD has been implemented using the third-order

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 54, No. 12, December 2012 2825

harmonic generated by the nonlinearity of HBTs [1]. This

approach relies on large nonlinear harmonic generation which

requires large voltage-controlled oscillator (VCO), voltage

swing, and large power. Using scaled down device is an alter-

native, however, this increases the production cost. The divide-

by-4 ILFD studied in this article uses two linear mixers in se-

ries to emulate a single nonlinear mixer [4]. With this

approach, the locking range of divide-by-4 ILFD might

increase due to the linear mixer. The proposed ILFD comprises

an HBT-VCO core to have low-power consumption and a

CMOS injection composite consisted of two nMOSFETs and

one pMOSFET. Because of easier implementation, CMOS

injection composite is used instead of the HBT counterpart.

This article is organized in the following manner. Section 2

discusses the design of the divide-by-4 ILFD and Section 3

reports the experimental data of the ILFD implemented in 0.18

lm SiGe BiCMOS technology, and finally a conclusion is

drawn in last section.

2. CIRCUIT DESIGN

Figure 1 shows the schematic of the proposed divide-by-4 ILFD

using a pair of cross-coupled HBTs (Q5, Q6), which are used to

generate the negative resistance to balance the resistive LC-tank

loss. HBT have large transconductance gain than the MOS and

can be used to start the oscillation at lower power. The HBTs

(Q1–Q4) and resistors (R1, R2) are used to emulate an active-

indictor, which in conjunction with the parasitic capacitors due

to mainly the base-emitter capacitances Cbe of the HBTs (Q5,

Q6) forms the LC-resonator. The voltage Vbias can be used to

control the oscillation frequency of the ILFD. The equivalent

active inductance is given by

Leq ¼ Cbe

2eg1½gm1 þ 2gm3 � g1�(1)

where g1 ¼ 1/R1, gm1 and gm3 are, respectively, the transconduc-

tances of the HBTs (Q1, Q3), and Cbe is the emitter-base junc-

tion capacitance of the HBT (Q1). Simulation shows that as Vbias

increases from 1.9 to 2.1 V, the ILFD output voltage increases

and Cbec increases from 8.65 to 597.55 fF. This leads to the

decreases in oscillation frequency with Vbias. The transistors

(M1, M2) are the injection nMOSFETs, and the gate bias Vinj is

used to bias the injection MOSFET and is used to optimize the

locking range. The gate of pMOSFET (M3) is wired to the out-

put node of the tail inductor (LS), which is used as the load of

the second harmonic at 2xo, which results from the cross-

coupled transistors (Q5, Q6) and buffers (M4, M5) switching

between linear and saturation regions periodically. The pMOS-

FET (M3) is always on. First, we neglect the effect of feedback

2xo. The pMOSFET (M3) is a channel resistor, and the nMOS-

FETs (M1, M2) can be considered as an injection MOSFET, so

the whole circuit uses a nonlinear MOSFET to form a direct-

injection divide-by-4 ILFD. Next, we consider the effect of

feedback signal at 2xo. The nMOSFETs (M1, M2) are biased in

the on-state, their outputs have the signal at the oscillation fre-

quency xo, the pMOSFET (M3) is used as a linear mixer with

two input signals at xo and 2xo to generate the signal at 3xo

supplied to the inputs of the nMOSFETs (M1, M2), which play

the role of the second linear mixers. The output of the nMOS-

FETs (M1, M2) contain the mixing frequency component at

xRF�3xo, where xRF is the frequency of the injection signal.

The desired outputs of the nMOSFETs (M1, M2) yield the

input-output frequency relation given by xRF �xo�2xo ¼ xo.

This divide-by-4 ILFD uses two linear mixers in series. If the

pMOSFET (M3) is replaced by an nMOSFET, then a gate volt-

age should be used to bias the replacement. Two common-

source amplifiers with gates wired to the ILFD outputs are

used to serve as buffers for the measurement. The ILFD pro-

vides differential outputs while a single-ended injection signal

is applied to the common-gate of the nMOSFETs (M1, M2).

The mathematical operation principle is as follows: A second-

degree Taylor expansion of pMOSFET (M3) drain current can

be written as

ipdis ¼ K2mgsmds þ … (2)

where vgs and vds are the ac components of gate-source voltage

and drain-source voltage, respectively. K2p is the cross-modula-

tion coefficient. Substituting vgs ¼ V2n cos (2xot) and vds ¼ VDS

cos (xot) in (2), we can get the drain current

ipdis ¼ K3 cosð3xotÞ þ … (3)

where K3 is a proportional constant. The mixing output of

pMOSFET (M3) has a high-frequency component at 3xo. Simi-

larly, we can write the nMOSFET (M1) drain current as

indis ¼ K2nmgsmds þ … ¼ Kf cosð3xotÞ þ cosðxRFtÞ (4)

where K2n and Kf are constant. The mixing output contains the

frequency component at xRF �3xo, which is equal to the output

frequency xo.

3. MEASUREMENT RESULTS

The divide-by-4 ILFD was designed and fabricated in the

TSMC 0.18 lm SiGe BiCMOS process. Figure 2 shows the

photo of the fabricated chip. The proposed wide-band divide-by-

4 ILFD occupies a die area of 0.465 � 0.317 mm2 including all

test pads and dummy metal. A standard FR4 material is used to

build the test board for the ILFD measurement. To measure the

locking range and phase noise performance of the divide-by-4

Figure 1 Schematic of the proposed divide-by-4 BiCMOS ILFD. The

bonding wire inductor to the supply voltage is omitted for simplicity

2826 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 54, No. 12, December 2012 DOI 10.1002/mop

ILFD, an Agilent N5183A signal source has been used with the

Agilent E4407B spectrum analyzer. At VDD ¼ 1.5 V, Vbias ¼2.05 V, the current and power consumption of the ILFD without

buffers are 1.0 mA and 1.5 mW, respectively. The spectra-RF is

used to simulate the circuit performance. The free-running fre-

quency of the ILFD shown in Figure 3 is tunable from 4.2 to

3.78 GHz as a tuning voltage Vbias varies from 1.9 to 2.1 V and

when dc bias voltage Vinj is 1 V.

Figure 4 (a) shows the measured locking range of the ILFD

in the divide-by-4 mode under the condition of VDD ¼ 1.5 V,

with a total locking range 2.3 GHz (14.7%) from 14.5 to 16.8

GHz at the injection power of 0 dBm. At the tuning voltage

Vbias ¼ 2.05 V, the divide-by-4 locking range is 1.7 GHz (11%),

from 14.6 to 16.3 GHz. Figure 4(b) shows the measured locking

ranges of the divide-by-4 ILFD with and without the tail induc-

tor LT. At the injection power of 0 dBm and under the condition

of VDD ¼ 1.5 V and Vbias ¼ 2.05 V, a locking range 0.4 GHz

from 15.4 to 15.8 GHz is obtained at the condition of LT ¼ 0

nH, and a locking range 1.7 GHz from 14.6 to 16.3 GHz is

obtained at the condition of LT ¼ 1.5 nH.

Figure 4(c) shows the measured locking ranges of the divide-

by-4 ILFD at two buffer’s drain bias. At the tuning voltage

Vbuffer ¼ 1(1.5) V, the divide-by-4 locking range is from

14.7(14.6) GHz to 16.2(16.3) GHz. Figures 4(b) and (c) support

the concept that the second harmonic and two linear mixers in

series can be used to enhance the locking range. Both the buffer

bias and the tail inductor can be used to increase the strength of

the tail signal at 2xo and the locking range.

Figure 5(a) shows the measured output spectra of the fre-

quency divider before and after the locked conditions in the �4

mode. The locked output spectrum shows a lower phase noise

and the ILFD can track the low-phase noise of injection source.

Figure 5(b) shows the measured phase noises of the injection-

reference and the injection-locked ILFD. When the signal is

injected, at 1 MHz frequency offset, the phase noise of the

ILFD is �127.54 dBc/Hz, whereas the phase noise of the injec-

tion-reference is �125.29 dBc/Hz. At low offset frequency, the

phase noise of the locked ILFD is smaller than the injection sig-

nal by about 12.5 dB. The phase noise of the divide-by-4 ILFD

is due to the output phase noises of the free-running ILFD and

the injection source. The measured phase noise of the ILFD is

dominated by the noise of the injection signal at the offset fre-

quency below 1.8 MHz. Table 1 is the comparison of various

BiCMOS ILFDs.

Figure 4 Measured operation frequency versus input power. In the

divide-by-4 mode, VDD ¼ 1.5 V, Vinj ¼ 1 V, and (a) Vbias ¼ 2.1, 2.05, 2

V (from left to right). (b) Tail inductor effect, Vbias ¼ 2.05 V. (c) Buffer

bias effect. Vbias ¼ 2.05 V and Vbiuffer ¼ 1/1.5 V

Figure 3 Measured tuning range versus Vbias of the ILFD. VDD ¼ 1.5

V and Vinj ¼ 1 V

Figure 2 Chip micrograph for the divide-by-4 ILFD

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 54, No. 12, December 2012 2827

4. CONCLUSION

A low power, wide locking range divide-by-4 injection locked fre-

quency divider has been proposed and fabricated in TSMC 0.18 lm

SiGe BiCMOS technology. The proposed divide-by-4 ILFD uses

the cross-coupled HBT VCO as the core to have a low power and a

two-nMOSFETs and one-pMOSFET composite to emulate a linear

injection mixer, so that a wider locking range divide-by-4 ILFD

can be designed. Increasing the strength of the second harmonic

signal at the tail inductor is an essential approach to enhance lock-

ing range. At the supply voltage of 1.5 V and at the incident power

of 0 dBm, the locking range of the divide-by-4 is 1.4 GHz, from

the incident frequency 14.6 to 16.3 GHz, the percentage is 11%.

ACKNOWLEDGMENT

The authors would like to thank the Staff of the CIC for the chip

fabrication and technical supports.

REFERENCES

1. S.-L. Jang, C.C. Liu, and C.-W. Chung, A tail-injected divide-by-4

SiGe HBT injection locked frequency divider, IEEE Microwave

Wireless Compon Lett 19 (2009), 236–238.

2. S. Trotta et al., A new regenerative divider by four up to 160 GHz

in SiGe bipolar technology, In Proceedings of IEEE International

Microwave Symposium, San Francisco, CA, 2006, pp. 1709–1712.

3. J.-C. Chien, C.-S. Lin, L.-H. Lu, H. Wang, J. Yeh, C.-Y. Lee, and

J. Chern, A harmonic injection-locked frequency divider in 0.18-

lm SiGe BiCMOS, IEEE Microwave Wireless Compon Lett 16

(2006), 561–563.

4. K. Yamamoto and M. Fujishima, 70 GHz CMOS harmonic injection

locked divider, In: IEEE International Solid-State Circuits Conference

Digest, San Francisco, CA, February 2006, pp. 2472–2481.

5. V. Jain, B. Javid, and P. Heydari, A BiCMOS dual-band milli-

meter-wave frequency synthesizer for automotive radars, IEEE J

Solid-State Circuits 44 (2009), 2100–2113.

6. S.-L. Jang, C.-W. Chang, C.-L. Cheng, C.-W. Hsue, and C.-W.

Hsu, A wide-locking range SiGe BiCMOS divide-by-3 injection-

locked oscillators, IEEE International Symposium on VLSI Design,

Automation and Test (VLSI-DAT), 2011, pp. 1–4.

VC 2012 Wiley Periodicals, Inc.

LEFT-HANDED METAMATERIALSTRUCTURE INCORPORATED WITHMICROSTRIP ANTENNA

M. K. A. Rahim, N. Ibrahim, H. A. Majid, and N. A MuradRadio Communication Engineering Department (RaCED), UniversitiTeknologi Malaysia (UTM), 81310 UTM JB, Johor, Malaysia;Corresponding author: mkamal@fke.utm.my

Received 7 March 2012

ABSTRACT: This article presents the design, simulation, andfabrication of a new planar left-handed metamaterial (LHM), which

consist of a combination of a modified square rectangular split ringresonator and strip wire. Both structures are on the same plane. Thestructure is simulated and measured with the microstrip antenna

operating at frequency 5.8 GHz. The LHM has been analyzed usingNicolson–Ross–Weir approach to obtain the negative permeability andpermittivity at 5.8 GHz. The fabrication of the LHM is on FR-4 board

substrate. From the simulation and measurement results, the gain of themicrostrip antenna with LHM has increased by 4.0 dB. The return loss

of the antenna with LHM is improved to 15.7 dB compare without LHMstructure. VC 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett

54:2828–2832, 2012; View this article online at wileyonlinelibrary.com.

DOI 10.1002/mop.27186

Key words: left handed; gain enhancement; negative permeability;negative permittivity; metamaterial

1. INTRODUCTION

Left-handed metamaterial (LHM) is a material with simultane-

ously negative values of dielectric permittivity (e) and magnetic

permeability (l). In 1968, Veselago [1] studied LHM concept

and he made a theoretical speculation of this material that ex-

hibit negative permittivity and permeability. In this medium, the

electric field, the magnetic field, and the propagation vector kform a left-handed triad. This medium is called LHM due to

this relationship. Recently, metamaterials with simultaneously

negative values of dielectric permittivity and magnetic perme-

ability have been discussed in many articles [2–5]. An array of

strip wires (SW) has shown to have plasma frequency in the

microwave regime. When lower than the plasma frequency, this

TABLE 1 Performance Comparison of BiCMOS ILFDs

Ref.

Tech

(um) Mod.

Pin

(dBm)

VDD (V)/

Pdis (mW)

Locking

Range

[1] 0.35 �4 0 3.1/6.6 8.7–8.86 (1.82)

[3] 0.18 �4 0 3.6/50.4 59.77–60.12 (0.6)

[5] 0.18 �3 – 2.5/15 75.67–78.5 (3.67)

[6] 0.35 �4 0 3/4.32 14.6–15 (2.7)

This 0.18 �4 0 1.5/1.5 14.6–16.3 (11)

Figure 5 (a) Measured locked and free-running spectra of the divide-

by-4 ILFD. (b) Measured phase noises of the injection-reference and the

locked divide-by-4 ILFD. VDD ¼ 1.5 V, Vbias ¼ 2.05 V, Vinj ¼ 1 V,

injection signal ¼ 16 GHz, and divider output ¼ 4 GHz

2828 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 54, No. 12, December 2012 DOI 10.1002/mop