8086 OPCODE

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00 ADD Eb Gb

01 ADD Ev Gv

02 ADD Gb Eb

03 ADD Gv Ev

04 ADD AL Ib

05 ADD eAX Iv

06 PUSH ES

07 POP ES

08 OR Eb Gb

09 OR Ev Gv

0A OR Gb Eb

0B OR Gv Ev

0C OR AL Ib

0D OR eAX Iv

0E PUSH CS

0F --

10 ADC Eb Gb

11 ADC Ev Gv

12 ADC Gb Eb

13 ADC Gv Ev

14 ADC AL Ib15 ADC eAX Iv

16 PUSH SS

17 POP SS

18 SBB Eb Gb

19 SBB Ev Gv

1A SBB Gb Eb

1B SBB Gv Ev

1C SBB AL Ib

1D SBB eAX Iv

1E PUSH DS

1F POP DS

20 AND Eb Gb

21 AND Ev Gv

22 AND Gb Eb

23 AND Gv Ev

24 AND AL Ib

25 AND eAX Iv

26 ES:

27 DAA

28 SUB Eb Gb

29 SUB Ev Gv

2A SUB Gb Eb

2B SUB Gv Ev

2C SUB AL Ib

2D SUB eAX Iv

2E CS:

2F DAS30 XOR Eb Gb

31 XOR Ev Gv

32 XOR Gb Eb

33 XOR Gv Ev

34 XOR AL Ib

35 XOR eAX Iv

36 SS:

37 AAA

38 CMP Eb Gb

39 CMP Ev Gv

3A CMP Gb Eb

3B CMP Gv Ev

3C CMP AL Ib

3D CMP eAX Iv

3E DS:

3F AAS

40 INC eAX

41 INC eCX

42 INC eDX

43 INC eBX

44 INC eSP

45 INC eBP

46 INC eSI

47 INC eDI

48 DEC eAX

49 DEC eCX

4A DEC eDX

4B DEC eBX

4C DEC eSP

4D DEC eBP4E DEC eSI

4F DEC eDI

50 PUSH eAX

51 PUSH eCX

52 PUSH eDX

53 PUSH eBX

54 PUSH eSP

55 PUSH eBP

56 PUSH eSI

57 PUSH eDI

58 POP eAX

59 POP eCX

5A POP eDX

5B POP eBX

5C POP eSP

5D POP eBP

5E POP eSI

5F POP eDI

60 --

61 --

62 --

63 --

64 --

65 --

66 --

67 --

68 --69 --

6A --

6B --

6C --

6D --

6E --

6F --

70 JO Jb

71 JNO Jb



72 JB Jb

73 JNB Jb

74 JZ Jb

75 JNZ Jb

76 JBE Jb

77 JA Jb

78 JS Jb

79 JNS Jb

7A JPE Jb

7B JPO Jb

7C JL Jb

7D JGE Jb

7E JLE Jb

7F JG Jb

80 GRP1 Eb Ib

81 GRP1 Ev Iv

82 GRP1 Eb Ib

83 GRP1 Ev Ib

84 TEST Gb Eb

85 TEST Gv Ev

86 XCHG Gb Eb87 XCHG Gv Ev

88 MOV Eb Gb

89 MOV Ev Gv

8A MOV Gb Eb

8B MOV Gv Ev

8C MOV Ew Sw

8D LEA Gv M

8E MOV Sw Ew

8F POP Ev

90 NOP

91 XCHG eCX eAX

92 XCHG eDX eAX

93 XCHG eBX eAX

94 XCHG eSP eAX

95 XCHG eBP eAX

96 XCHG eSI eAX

97 XCHG eDI eAX

98 CBW

99 CWD

9A CALL Ap

9B WAIT

9C PUSHF

9D POPF

9E SAHF

9F LAHF

A0 MOV AL Ob

A1 MOV eAX OvA2 MOV Ob AL

A3 MOV Ov

eAX

A4 MOVSB

A5 MOVSW

A6 CMPSB

A7 CMPSW

A8 TEST AL Ib

A9 TEST eAX Iv

AA STOSB

AB STOSW

AC LODSB

AD LODSW

AE SCASB

AF SCASW

B0 MOV AL Ib

B1 MOV CL Ib

B2 MOV DL Ib

B3 MOV BL Ib

B4 MOV AH Ib

B5 MOV CH Ib

B6 MOV DH Ib

B7 MOV BH Ib

B8 MOV eAX Iv

B9 MOV eCX Iv

BA MOV eDX Iv

BB MOV eBX Iv

BC MOV eSP Iv

BD MOV eBP Iv

BE MOV eSI IvBF MOV eDI Iv

C0 --

C1 --

C2 RET Iw

C3 RET

C4 LES Gv Mp

C5 LDS Gv Mp

C6 MOV Eb Ib

C7 MOV Ev Iv

C8 --

C9 --

CA RETF Iw

CB RETF

CC INT 3

CD INT Ib

CE INTO

CF IRET

D0 GRP2 Eb 1

D1 GRP2 Ev 1

D2 GRP2 Eb CL

D3 GRP2 Ev CL

D4 AAM I0

D5 AAD I0

D6 --

D7 XLAT

D8 --

D9 --DA --

DB --

DC --

DD --

DE --

DF --

E0 LOOPNZ Jb

E1 LOOPZ Jb

E2 LOOP Jb



E3 JCXZ Jb

E4 IN AL Ib

E5 IN eAX Ib

E6 OUT Ib AL

E7 OUT Ib

eAX

E8 CALL Jv

E9 JMP Jv

EA JMP Ap

EB JMP Jb

EC IN AL DX

ED IN eAX DX

EE OUT DX AL

EF OUT DX

eAX

F0 LOCK

F1 --

F2 REPNZ

F3 REPZ

F4 HLT

F5 CMCF6 GRP3a Eb

F7 GRP3b Ev

F8 CLC

F9 STC

FA CLI

FB STI

FC CLD

FD STD

FE GRP4 Eb

FF GRP5 Ev

GRP1/0 ADD

GRP1/1 OR

GRP1/2 ADC

GRP1/3 SBB

GRP1/4 AND

GRP1/5 SUB

GRP1/6 XOR

GRP1/7 CMP

GRP2/0 ROL

GRP2/1 ROR

GRP2/2 RCL

GRP2/3 RCR

GRP2/4 SHL

GRP2/5 SHR

GRP2/6 --

GRP2/7 SAR

GRP3a/0 TEST Eb Ib

GRP3a/1 --

GRP3a/2 NOT

GRP3a/3 NEG

GRP3a/4 MUL

GRP3a/5 IMUL

GRP3a/6 DIV

GRP3a/7 IDIV

GRP3b/0 TEST Ev Iv

GRP3b/1 --

GRP3b/2 NOT

GRP3b/3 NEG

GRP3b/4 MULGRP3b/5 IMUL

GRP3b/6 DIV

GRP3b/7 IDIV

GRP4/0 INC

GRP4/1 DEC

GRP4/2 --

GRP4/3 --

GRP4/4 --

GRP4/5 --

GRP4/6 --

GRP4/7 --

GRP5/0 INC

GRP5/1 DEC

GRP5/2 CALL

GRP5/3 CALL Mp

GRP5/4 JMP

GRP5/5 JMP Mp

GRP5/6 PUSH

GRP5/7 --

Argument Addressing CodesA Direct address. The instruction has no ModR/M byte; the address of

the operand is encoded in the instruction. Applicable, e.g., to far JMP(opcode EA).

E A ModR/M byte follows the opcode and specifies the operand. Theoperand is either a general-purpose register or a memory address. If it is a memory address, the address is computed from a segmentregister and any of the following values: a base register, an indexregister, a displacement.



G The reg field of the ModR/M byte selects a general register.

I Immediate data. The operand value is encoded in subsequent bytes of the instruction.

J The instruction contains a relative offset to be added to the address of

the subsequent instruction. Applicable, e.g., to short JMP (opcodeEB), or LOOP.

M The ModR/M byte may refer only to memory. Applicable, e.g., to LESand LDS.

O The instruction has no ModR/M byte; the offset of the operand isencoded as a WORD in the instruction. Applicable, e.g., to certainMOVs (opcodes A0 through A3).

S The reg field of the ModR/M byte selects a segment register.

Argument Operand Codes

0 Byte argument. Unusual in that arguments of this type are suppressedin ASM output when they have the default value of 10 (0xA).

Applicable, e.g., to AAM and AAD.

b Byte argument.

p 32-bit segment:offset pointer.

w Word argument.

v Word argument. (The 'v' code has a more complex meaning in laterx86 opcode maps, from which this was derived, but here it's just a

synonym for the 'w' code.)

Special Argument Codes

AL 8-bit register: The low byte of AX

CL 8-bit register: The low byte of CX

DL 8-bit register: The low byte of DX

BL 8-bit register: The low byte of BX

AH

8-bit register: The high byte of AXCH 8-bit register: The high byte of CX

DH 8-bit register: The high byte of DX

BH 8-bit register: The high byte of BX

AX 16-bit register: The 'accumulator' register

CX 16-bit register: The 'counter' register



DX 16-bit register: The 'data' register

BX 16-bit register: The 'base' register

SP 16-bit register: The 'stack pointer' register

BP

16-bit register: The 'base pointer' registerSI 16-bit register: The 'source index' register

DI 16-bit register: The 'destination index' register

ES 16-bit register: The 'extra' segment register

CS 16-bit register: The 'code' segment register

SS 16-bit register: The 'stack' segment register

DS 16-bit register: The 'data' segment register

1 A constant argument of 1, implicit in the opcode, and not represented

elsewhere in the instruction. This argument *is* displayed inassembly code.

3 A constant argument of 3, implicit in the opcode, and notrepresented elsewhere in the instruction. This argument *is*displayed in assembly code.

M The ModR/M byte refers to a memory location, however the contentsof that memory location are irrelevant; the address itself is theoperand of the instruction. Applicable, e.g., to LEA.

Instructions and opcodes

oo : Function

• 00 : If mmm = 110, then a displacement follows the operation;

otherwise, no displacement is used

• 01 : An 8-bit signed displacement follows the opcode

• 10 : A 16-bit signed displacement follows the opcode

• 11 : mmm specifies a register, instead of an addressing mode

mmm : Function

• 000 : DS:[BX+SI]

• 001 : DS:[BX+DI]

• 010 : SS:[BP+SI]

• 011 : SS:[BP+DI]

• 100 : DS:[SI]



• 101 : DS:[DI]

• 110 : SS:[BP]

• 111 : DS:[BX]

rrr : W=0 : W=1 : reg32

• 000 : AL : AX : EAX

• 001 : CL : CX : ECX

• 010 : DL : DX : EDX

• 011 : BL : BX : EBX

• 100 : AH : SP : ESP

• 101 : CH : BP : EBP

• 110 : DH : SI : ESI

• 111 : BH : DI : EDI

sss : Segment Register

• 000 : ES

• 001 : CS

• 010 : SS

• 011 : DS

• 100 : FS (Only 386+)

• 101 : GS (Only 386+)

rrr : Index Register

• 000 : EAX

• 001 : ECX

• 010 : EDX

• 011 : EBX

• 100 : No Index

• 101 : EBP

• 110 : ESI

• 111 : EDI

32 bit addressing-mode

oo mmm rrr Description

00 000 DS:[EAX]

00 001 DS:[ECX]

00 010 DS:[EDX]



00 011 DS:[EBX]

00 100 000 DS:[EAX+scaled_index]

00 100 001 DS:[ECX+scaled_index]

00 100 010 DS:[EDX+scaled_index]

00 100 011 DS:[EBX+scaled_index]

00 100 100 SS:[ESP+scaled_index]

00 100 101 DS:[disp32+scaled_index]

00 100 110 DS:[ESI+scaled_index]

00 100 111 DS:[EDI+scaled_index]

00 101 DS:disp32

00 110 DS:[ESI]

00 111 DS:[EDI]01 000 DS:[EAX+disp8]

01 001 DS:[ECX+disp8]

01 010 DS:[EDX+disp8]

01 011 DS:[EBX+disp8]

01 100 000 DS:[EAX+scaled_index+disp8]

01 100 001 DS:[ECX+scaled_index+disp8]

01 100 010 DS:[EDX+scaled_index+disp8]

01 100 011 DS:[EBX+scaled_index+disp8]

01 100 100 SS:[ESP+scaled_index+disp8]

01 100 101 SS:[EBP+scaled_index+disp8]

01 100 110 DS:[ESI+scaled_index+disp8]

01 100 111 DS:[EDI+scaled_index+disp8]

01 101 SS:[EBP+disp8]

01 110 DS:[ESI+disp8]

01 111 DS:[EDI+disp8]

10 000 DS:[EAX+disp32]

10 001 DS:[ECX+disp32]

10 010 DS:[EDX+disp32]

10 011 DS:[EBX+disp32]

10 100 000 DS:[EAX+scaled_index+disp32]



10 100 001 DS:[ECX+scaled_index+disp32]

10 100 010 DS:[EDX+scaled_index+disp32]

10 100 011 DS:[EBX+scaled_index+disp32]

10 100 100 SS:[ESP+scaled_index+disp32]

10 100 101 SS:[EBP+scaled_index+disp32]

10 100 110 DS:[ESI+scaled_index+disp32]

10 100 111 DS:[EDI+scaled_index+disp32]

10 101 SS:[EBP+disp32]

10 110 DS:[ESI+disp32]

10 111 DS:[EDI+disp32]

Name Regs Opcode Description

AAA 00110111ASCII Adjust After

Addition

AAD Imm8 11010101ASCII Adjust Register

AX Before Division

1101010100001010ASCII Adjust Register

AX Before Division

AAM Imm8 11010100ASCII Adjust AXRegister After

Multiplication

1101010000001010

ASCII Adjust AX

Register After Multiplication

AAS 00111111

ASCII Adjust AL

Register After

Subtraction

ADC Reg,Reg 0001001woorrrmmm Add Integers with Carry

Mem,Reg 0001000woorrrmmm Add Integers with Carry

Reg,Mem 0001001woorrrmmm Add Integers with Carry

Acc,Imm 0001010w Add Integers with Carry

Reg,Imm8 1000001woo010mmm Add Integers with Carry

Mem,Imm8 1000001woo010mmm Add Integers with Carry

Reg,Imm 1000000woo010mmm Add Integers with Carry

Mem,Imm 1000000woo010mmm Add Integers with Carry



ADD Reg,Reg 0000001woorrrmmm Add Integers

Mem,Reg 0000000woorrrmmm Add Integers

Reg,Mem 0000001woorrrmmm Add Integers

Acc,Imm 0000010w Add Integers

Reg,Imm8 1000001woo000mmm Add Integers

Mem,Imm8 1000001woo000mmm Add Integers

Reg,Imm 1000000woo000mmm Add Integers

Mem,Imm 1000000woo000mmm Add Integers

AND Reg,Reg 0010001woorrrmmm Logical AND

Mem,Reg 0010000woorrrmmm Logical AND

Reg,Mem 0010001woorrrmmm Logical AND

Acc,Imm 0010010w Logical ANDReg,Imm8 1000001woo100mmm Logical AND

Mem,Imm8 1000001woo100mmm Logical AND

Reg,Imm 1000000woo100mmm Logical AND

Mem,Imm 1000000woo100mmm Logical AND

BSFRegWord,RegW

ord0000111110111100oorrrmmm Bit Scan Forward

RegWord,MemWord

0000111110111100oorrrmmm Bit Scan Forward

BSR RegWord,RegW

ord0000111110111101oorrrmmm Bit Scan Reverse

RegWord,MemWord

0000111110111101oorrrmmm Bit Scan Reverse

BSWAP RegWord 0000111111001rrr Byte swap

BT RegWord,Imm8 0000111110111010oo100mmm Bit Test

MemWord,Imm

80000111110111010oo100mmm Bit Test

RegWord,RegWord

0000111110100011oorrrmmm Bit Test

MemWord,Reg

Word0000111110100011oorrrmmm Bit Test

BTC RegWord,Imm8 0000111110111010oo111mmm Bit Test and Complement

MemWord,Imm

80000111110111010oo111mmm Bit Test and Complement



RegWord,RegW

ord0000111110111011oorrrmmm Bit Test and Complement

MemWord,Reg

Word0000111110111011oorrrmmm Bit Test and Complement

BTR RegWord,Imm8 0000111110111010oo110mmm Bit Test and Reset

MemWord,Imm

80000111110111010oo110mmm Bit Test and Reset

RegWord,RegW

ord0000111110110011oorrrmmm Bit Test and Reset

MemWord,RegWord

0000111110110011oorrrmmm Bit Test and Reset

BTS RegWord,Imm8 0000111110111010oo101mmm Bit Test and Set

MemWord,Imm

80000111110111010oo101mmm Bit Test and Set

RegWord,RegWord

0000111110101011oorrrmmm Bit Test and Set

MemWord,Reg

Word0000111110101011oorrrmmm Bit Test and Set

CBW 10011000 Convert Byte to Word

CDQ 10011001Convert Doubleword to

Quad-Word

CLC 11111000 Clear Carry Flag (CF)

CLD 11111100 Clear Direction Flag (DF)

CLI 11111010 Clear Interrupt Flag (IF)

CLTS 0000111100000110Clear Task-Switched Flag

in Control Register Zero

CMC 11110101Complementer Carry Flag

(CF)

CMOVcc Reg,Reg 000011110100ccccoorrrmmm Conditional Move

Reg,Mem 000011110100ccccoorrrmmm Conditional Move

CMP Reg,Reg 0011101woorrrmmm Compare

Mem,Reg 0011100woorrrmmm Compare

Reg,Mem 0011101woorrrmmm Compare

Acc,Imm 0011110w Compare

Reg,Imm8 1000001woo111mmm Compare

Mem,Imm8 1000001woo111mmm Compare



Reg,Imm 1000000woo111mmm Compare

Mem,Imm 1000000woo111mmm Compare

CMPSB 10100110 Compare String - Byte

CMPSW 10100111 Compare String - Word

CMPSD 10100111Compare String -

Doubleword

CMPXCHG Reg,Reg 000011111011000woorrrmmm Compare and Exchange

Mem,Reg 000011111011000woorrrmmm Compare and Exchange

CMPXCHG

8BMem64 0000111111000111oo001mmm

Compare and Exchange 8

Bytes

CPUID 0000111110100010CPU Identification code

to EAX

CWD 10011001 Convert Word toDoubleword

CWDE 10011000Convert Word to

Extended Doubleword

DAA 00100111Decimal Adjust Register

After Addition

DAS 00101111

Decimal Adjust AL

Register After

Substraction

DEC RegWord 01001rrr Decrement by One

Reg 1111111woo001mmm Decrement by One

Mem 1111111woo001mmm Decrement by One

DIV Reg 1111011woo110mmm Unsigned Integer Divide

Mem 1111011woo110mmm Unsigned Integer Divide

ENTER Imm16,Imm8 11001000Make Stack Frame for

Procedure Parameter

HLT 11110100 Halt

IDIV Reg 1111011woo111mmm Signed Divide

Mem 1111011woo111mmm Signed Divide

IMULRegWord,RegWord,Imm8

01101011oorrrmmm Signed Integer Multiply

RegWord,Mem

Word,Imm801101011oorrrmmm Signed Integer Multiply

RegWord,RegW 01101001oorrrmmm Signed Integer Multiply



ord,Imm

RegWord,Mem

Word,Imm01101001oorrrmmm Signed Integer Multiply

RegWord,Imm8 0110101111rrrqqq Signed Integer Multiply

RegWord,Imm 0110100111rrrqqq Signed Integer Multiply

RegWord,RegWord

0000111110101111oorrrmmm Signed Integer Multiply

RegWord,Mem

Word0000111110101111oorrrmmm Signed Integer Multiply

Reg 1111011woo101mmm Signed Integer Multiply

Mem 1111011woo101mmm Signed Integer Multiply

IN Acc,Imm8 1110010w Input from Port

Acc,DX 1110110w Input from PortINC RegWord 01000rrr Increment by 1

Reg 1111111woo000mmm Increment by 1

Mem 1111111woo000mmm Increment by 1

INSB 01101100 Input Byte

INSW 01101101 Input Word

INSD 01101101 Input DoubleWord

INT 3 11001100Call to Interrupt

Procedure

Imm8 11001101Call to InterruptProcedure

INTO 11001110 Interrupt on Overflow

INVD 0000111100001000 Invalidate data cache

INVLPG Mem 0000111100000001oo111mmm Invalidate TBL entry

IRET 11001111 Return from Interrupt

IRETD 11001111Return from Interrupt -

32-bit Mode

LAHF 10011111Load Flags into AH

Register

LAR RegWord,RegW

ord0000111100000010oorrrmmm Load Access Rights Byte

RegWord,MemWord

0000111100000010oorrrmmm Load Access Rights Byte



LDS Reg16,Mem32 11000101oorrrmmm Load Pointer Using DS

Reg32,Mem64 11000101oorrrmmm Load Pointer Using DS

LES Reg16,Mem32 11000100oorrrmmm Load Pointer Using ES

Reg32,Mem64 11000100oorrrmmm Load Pointer Using ES

LFS Reg16,Mem32 0000111110110100oorrrmmm Load Pointer Using FS

Reg32,Mem64 0000111110110100oorrrmmm Load Pointer Using FS

LGS Reg16,Mem32 0000111110110101oorrrmmm Load Pointer Using GS

Reg32,Mem64 0000111110110101oorrrmmm Load Pointer Using GS

LSS Reg16,Mem32 0000111110110010oorrrmmm Load Pointer Using SS

Reg32,Mem64 0000111110110010oorrrmmm Load Pointer Using SS

LEA RegWord,Mem 10001101oorrrmmm Load Effective Address

LEAVE 11001001 High Level ProcedureExit

LGDT Mem64 0000111100000001oo010mmmLoad Global Descriptor

Table

LIDT Mem64 0000111100000001oo011mmmLoad Interrupt Descriptor Table

LLDT Reg16 0000111100000000oo010mmmLoad Local Descriptor

Table

Mem16 0000111100000000oo010mmmLoad Local Descriptor Table

LMSW Reg16 0000111100000001oo110mmmLoad Machine Status

Word

Mem16 0000111100000001oo110mmmLoad Machine Status

Word

LODSB 10101100 Load Byte

LODSW 10101101 Load Word

LODSD 10101101 Load Doubleword

LSLRegWord,RegW

ord0000111100000011oorrrmmm Load Segment Limit

RegWord,Mem

Word0000111100000011oorrrmmm Load Segment Limit

LTR Reg16 0000111100000000oo011mmm Load Task Register

Mem16 0000111100000000oo011mmm Load Task Register

MOV MemOfs,Acc 1010001w Move Data



Acc,MemOfs 1010000w Move Data

Reg,Imm 1011wrrr Move Data

Mem,Imm 1100011woo000mmm Move Data

Reg,Reg 1000101woorrrmmm Move Data

Reg,Mem 1000101woorrrmmm Move Data

Mem,Reg 1000100woorrrmmm Move Data

Reg16,Seg 10001100oosssmmm Move Data

Seg,Reg16 10001110oosssmmm Move Data

Mem16,Seg 10001100oosssmmm Move Data

Seg,Mem16 10001110oosssmmm Move Data

Reg32,CRn 000011110010000011sssrrr Move Data

CRn,Reg32 000011110010001011sssrrr Move DataReg32,DRn 000011110010000111sssrrr Move Data

DRn,Reg32 000011110010001111sssrrr Move Data

Reg32,TRn 000011110010010011sssrrr Move Data

TRn,Reg32 000011110010011011sssrrr Move Data

MOVSB 10100100 Move Byte

MOVSW 10100101 Move Word

MOVSD 10100101 Move Doubleword

MOVSX RegWord,Reg8 0000111110111110oorrrmmm Move with SignExtension

RegWord,Mem8 0000111110111110oorrrmmmMove with Sign

Extension

RegWord,Reg16 0000111110111111oorrrmmmMove with Sign

Extension

RegWord,Mem1

60000111110111111oorrrmmm

Move with Sign

Extension

MOVZX RegWord,Reg8 0000111110110110oorrrmmmMove with Zero

Extension

RegWord,Mem8 0000111110110110oorrrmmmMove with ZeroExtension

RegWord,Reg16 0000111110110111oorrrmmmMove with Zero

Extension

RegWord,Mem1

60000111110110111oorrrmmm

Move with Zero

Extension



MUL Reg 1111011woo100mmm

Unsigned Integer

Multiply of AL, AX or

EAX

Mem 1111011woo100mmmUnsigned Integer Multiply of AL, AX or

EAX

NEG Reg 1111011woo011mmm Negate(Two's

Complement)

Mem 1111011woo011mmm Negate(Two'sComplement)

NOP 10010000 No Operation

NOT Reg 1111011woo010mmm Negate(One's

Complement)

Mem 1111011woo010mmm Negate(One'sComplement)

OR Reg,Reg 0000101woorrrmmm Logical Inclusive OR

Mem,Reg 0000100woorrrmmm Logical Inclusive OR

Reg,Mem 0000101woorrrmmm Logical Inclusive OR

Acc,Imm 0000110w Logical Inclusive OR

Reg,Imm8 1000001woo001mmm Logical Inclusive OR

Mem,Imm8 1000001woo001mmm Logical Inclusive OR

Reg,Imm 1000000woo001mmm Logical Inclusive OR

Mem,Imm 1000000woo001mmm Logical Inclusive OR

OUT Imm8,Acc 1110011w Output To Port

DX,Acc 1110111w Output To Port

OUTSB 01101110 Output Byte

OUTSW 01101111 Output Word

OUTSD 01101111 Output Doubleword

POP RegWord 01011rrr Pop a Word from the

Stack

MemWord 10001111oo000mmmPop a Word from theStack

SegOld 00sss111Pop a Word from the

Stack

Seg 0000111110sss001Pop a Word from the

Stack



POPA 01100001 POP All Registers

POPAD 01100001POP All Registers - 32-

bit Mode

POPF 10011101 POP Stack into FLAGS

POPFD 10011101 POP Stack into EFLAGS

PUSH RegWord 01010rrr Push Operand onto Stack

MemWord 11111111oo110mmm Push Operand onto Stack

SegOld 00sss110 Push Operand onto Stack

Seg 0000111110sss000 Push Operand onto Stack

Imm8 01101010 Push Operand onto Stack

Imm 01101000 Push Operand onto Stack

PUSHW Imm16 01101000 PUSH Word

PUSHD Imm32 01101000 PUSH Double Word

PUSHA 01100000 PUSH All Registers

PUSHAD 01100000PUSH All Registers - 32-

bit Mode

PUSHF 10011100 PUSH FLAGS

PUSHFD 10011100 PUSH EFLAGS

RCL Reg,1 1101000woo010mmmRotate Left through Carry

- Uses CF for Extension

Mem,1 1101000woo010mmmRotate Left through Carry- Uses CF for Extension

Reg,CL 1101001woo010mmmRotate Left through Carry- Uses CF for Extension

Mem,CL 1101001woo010mmmRotate Left through Carry


Reg,Imm8 1100000woo010mmmRotate Left through Carry- Uses CF for Extension

Mem,Imm8 1100000woo010mmmRotate Left through Carry


RCR Reg,1 1101000woo011mmm

Rotate Right through

Carry - Uses CF for Extension

Mem,1 1101000woo011mmm


Carry - Uses CF for

Extension



Reg,CL 1101001woo011mmm


Carry - Uses CF for

Extension

Mem,CL 1101001woo011mmmRotate Right throughCarry - Uses CF for

Extension

Reg,Imm8 1100000woo011mmm


Carry - Uses CF for Extension

Mem,Imm8 1100000woo011mmm


Carry - Uses CF for

Extension

RDMSR 0000111100110010Read from ModelSpecific Register

RET NEAR 11000011 Return fromsubprocedure

RET imm NEAR 11000010Return fromsubprocedure

RET FAR 11001011Return from

subprocedure

RET imm FAR 11001010Return from

subprocedure

RDPMC 0000111100110011Read Performance

Monitor Counter

ROL Reg,1 1101000woo000mmmRotate Left through Carry

- Wrap bits around

Mem,1 1101000woo000mmmRotate Left through Carry- Wrap bits around

Reg,CL 1101001woo000mmmRotate Left through Carry

- Wrap bits around

Mem,CL 1101001woo000mmmRotate Left through Carry

- Wrap bits around

Reg,Imm8 1100000woo000mmm Rotate Left through Carry- Wrap bits around

Mem,Imm8 1100000woo000mmmRotate Left through Carry

- Wrap bits around

ROR Reg,1 1101000woo001mmmRotate Right through

Carry - Wrap bits around

Mem,1 1101000woo001mmm Rotate Right through




Reg,CL 1101001woo001mmmRotate Right through


Mem,CL 1101001woo001mmmRotate Right through


Reg,Imm8 1100000woo001mmmRotate Right through


Mem,Imm8 1100000woo001mmmRotate Right through


RSM 0000111110101010Return from SystemManagement mode

SALC 11010110 Set AL on Carry

SAHF 10011110Load Flags into AH

Register

SAL Reg,1 1101000woo100mmm Shift Arithmetic Left

Mem,1 1101000woo100mmm Shift Arithmetic Left

Reg,CL 1101001woo100mmm Shift Arithmetic Left

Mem,CL 1101001woo100mmm Shift Arithmetic Left

Reg,Imm8 1100000woo100mmm Shift Arithmetic Left

Mem,Imm8 1100000woo100mmm Shift Arithmetic Left

SAR Reg,1 1101000woo111mmm Shift Arithmetic Right

Mem,1 1101000woo111mmm Shift Arithmetic Right

Reg,CL 1101001woo111mmm Shift Arithmetic Right

Mem,CL 1101001woo111mmm Shift Arithmetic Right

Reg,Imm8 1100000woo111mmm Shift Arithmetic Right

Mem,Imm8 1100000woo111mmm Shift Arithmetic Right

SETcc Reg8 000011111001ccccoo000mmmSet Byte on ConditionCode

Mem8 000011111001ccccoo000mmmSet Byte on Condition

Code

SHL Reg,1 1101000woo100mmm Shift Logic Left

Mem,1 1101000woo100mmm Shift Logic Left

Reg,CL 1101001woo100mmm Shift Logic Left

Mem,CL 1101001woo100mmm Shift Logic Left

Reg,Imm8 1100000woo100mmm Shift Logic Left



Mem,Imm8 1100000woo100mmm Shift Logic Left

SHR Reg,1 1101000woo101mmm Shift Logic Right

Mem,1 1101000woo101mmm Shift Logic Right

Reg,CL 1101001woo101mmm Shift Logic Right

Mem,CL 1101001woo101mmm Shift Logic Right

Reg,Imm8 1100000woo101mmm Shift Logic Right

Mem,Imm8 1100000woo101mmm Shift Logic Right

SBB Reg,Reg 0001101woorrrmmmSubstract Integers withBorrow

Mem,Reg 0001100woorrrmmmSubstract Integers with

Borrow

Reg,Mem 0001101woorrrmmmSubstract Integers with

Borrow

Acc,Imm 0001110wSubstract Integers withBorrow

Reg,Imm8 1000001woo011mmmSubstract Integers with

Borrow

Mem,Imm8 1000001woo011mmmSubstract Integers withBorrow

Reg,Imm 1000000woo011mmmSubstract Integers with

Borrow

Mem,Imm 1000000woo011mmm Substract Integers withBorrow

SCASB 10101110 Compare Byte

SCASW 10101111 Compare Word

SCASD 10101111 Compare Doubleword

SGDT Mem64 0000111100000001oo000mmmStore Global Descriptor

Table

SHLDRegWord,RegW

ord,Imm80000111110100100oorrrmmm

Double Precision Shift

Left

MemWord,RegWord,Imm8

0000111110100100oorrrmmmDouble Precision ShiftLeft

RegWord,RegW

ord,CL0000111110100101oorrrmmm


Left

MemWord,RegWord,CL

0000111110100101oorrrmmmDouble Precision ShiftLeft



SHRDRegWord,RegW

ord,Imm80000111110101100oorrrmmm


Right

MemWord,Reg

Word,Imm80000111110101100oorrrmmm


Right

RegWord,RegWord,CL

0000111110101101oorrrmmm Double Precision ShiftRight

MemWord,Reg

Word,CL0000111110101101oorrrmmm


Right

SIDT Mem64 0000111100000001oo001mmmStore Interrupt Descriptor Table

SLDT Reg16 0000111100000000oo000mmmStore Local Descriptor

Table Register (LDTR)

Mem16 0000111100000000oo000mmmStore Local Descriptor

Table Register (LDTR)

SMSW Reg16 0000111100000001oo100mmmStore Machine StatusWord

Mem16 0000111100000001oo100mmmStore Machine Status

Word

STC 11111001 Set Carry Flag(CF)

STD 11111101 Set Direction Flag(DF)

STI 11111011 Set Interrupt Flag(IF)

STOSB 10101010 Store String Data Byte

STOSW 10101011 Store String Data Word

STOSD 10101011Store String Data

DoubleWord

STR Reg16 0000111100000000oo001mmm Store Task Register

Mem16 0000111100000000oo001mmm Store Task Register

SUB Reg,Reg 0010101woorrrmmm Subtract

Mem,Reg 0010100woorrrmmm Subtract

Reg,Mem 0010101woorrrmmm Subtract

Acc,Imm 0010110w Subtract

Reg,Imm8 1000001woo101mmm Subtract

Mem,Imm8 1000001woo101mmm Subtract

Reg,Imm 1000000woo101mmm Subtract

Mem,Imm 1000000woo101mmm Subtract



TEST Reg,Reg 1000010woorrrmmm Test Operands

Mem,Reg 1000010woorrrmmm Test Operands

Reg,Mem 1000010woorrrmmm Test Operands

Acc,Imm 1010100w Test Operands

Reg,Imm 1111011woo000mmm Test Operands

Mem,Imm 1111011woo000mmm Test Operands

VERR Reg16 0000111100000000oo100mmm Verify Read

Mem16 0000111100000000oo100mmm Verify Read

VERW Reg16 0000111100000000oo101mmm Verify Write

Mem16 0000111100000000oo101mmm Verify Write

WAIT 10011011 Wait for FPU

WBINVD 0000111100001001 Write Back andInvalidate Data Cache

WRMSR 0000111100110000Write to Model Specific

Register

XADD Reg,Reg 000011111100000woorrrmmm Exchange and Add

Mem,Reg 000011111100000woorrrmmm Exchange and Add

XCHGAccWord,RegW

ord10010rrr Exchange

RegWord,AccW

ord

10010rrr Exchange

Reg,Reg 1000011woorrrmmm Exchange

Mem,Reg 1000011woorrrmmm Exchange

Reg,Mem 1000011woorrrmmm Exchange

XLAT 11010111 Translate

XOR Reg,Reg 0011001woorrrmmm Exclusive-OR

Mem,Reg 0011000woorrrmmm Exclusive-OR

Reg,Mem 0011001woorrrmmm Exclusive-OR

Acc,Imm 0011010w Exclusive-OR

Reg,Imm8 1000001woo110mmm Exclusive-OR

Mem,Imm8 1000001woo110mmm Exclusive-OR

Reg,Imm 1000000woo110mmm Exclusive-OR

Mem,Imm 1000000woo110mmm Exclusive-OR



CALL MemFar 11111111oo011mmm Call a Procedure

Near 11101000 Call a Procedure

Far 10011010 Call a Procedure

RegWord 11111111oo010mmm Call a Procedure

MemNear 11111111oo010mmm Call a Procedure

Jcc Short 0111ccccJump on Some Condition

Code

Near 000011111000ccccJump on Some Condition

Code

JCXZ Short 11100011

JCXE Short 11100011

JECXZ Short 11100011

JECXE Short 11100011

JMP MemFar 11111111oo101mmm

Short 11101011

Near 11101001

Far 11101010

RegWord 11111111oo100mmm

MemNear 11111111oo100mmm

LOOP Short 11100010

Loop Control While ECX

Counter Not Zero

LOOPZ Short 11100001 Loop while Zero

LOOPE Short 11100001 Loop while Equal

LOOPNZ Short 11100000 Loop while Not Zero

LOOPNE Short 11100000 Loop while Not Equal

LOCK 11110000Assert Lock# Signal

Prefix

LOCK: 11110000Assert Lock# Signal

Prefix

REP 11110011Repeat Following StringOperation

REPE 11110011 Repeat while Equal

REPZ 11110011 Repeat while Zero

REPNE 11110010 Repeat while Not Equal



REPNZ 11110010 Repeat while Not Zero

CS: 00101110CS segment override

prefix

DS: 00111110DS segment override

prefix

ES: 00100110ES segment override

prefix

FS: 01100100FS segment override

prefix

GS: 01100101GS segment override prefix

SS: 00110110SS segment override

prefix

8086 OPCODE

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