78Q8430 STEM Demo Board User Manual - maximintegrated.com · Teridian Semiconductor Corporation...

Simplifying System IntegrationTM

78Q8430

STEM Demo Board User Manual

March, 2008 Rev. 1.0

78Q8430 STEM Demo Board User Manual UM_8430_006

2 Rev. 1.0

© 2008 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Pentium is a registered trademark of Intel Corporation. Windows is a registered trademark of Microsoft Corporation. All other trademarks are the property of their respective owners. Teridian Semiconductor Corporation makes no warranty for the use of its products, other than expressly contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms and Conditions. The company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein. Accordingly, the reader is cautioned to verify that this document is current by comparing it to the latest version on http://www.teridian.com or by checking with your sales representative.

Teridian Semiconductor Corp., 6440 Oak Canyon, Suite 100, Irvine, CA 92618 TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridian.com

UM_8430_006 78Q8430 STEM Demo Board User Manual

Rev. 1.0 3

Table of Contents

1 Introduction ......................................................................................................................................... 5 1.1 Package Contents......................................................................................................................... 6 1.2 Safety and ESD Notes .................................................................................................................. 6 1.3 System Hardware Requirements .................................................................................................. 7 1.4 System Software Requirements ................................................................................................... 7

2 Hardware Setup ................................................................................................................................... 8 2.1 Jumper and Dip Switch Settings ................................................................................................... 8 2.2 Connections .................................................................................................................................. 9

3 Software Setup .................................................................................................................................. 11 3.1 Development (Host) PC Environment Setup .............................................................................. 11 3.2 Video Server PC Environment Setup ......................................................................................... 11 3.3 ST Microconnect Target Configuration ....................................................................................... 11 3.4 78Q8430 Software Device Driver ............................................................................................... 11

4 78Q8430 STEM Demo Board Schematic, BOM and PCB Layout ................................................. 12 5 Ordering Information ........................................................................................................................ 23 6 Related Documentation .................................................................................................................... 23 7 Contact Information .......................................................................................................................... 23


4 Rev. 1.0

Figures Figure 1: 78Q8430 System Interface Diagram ............................................................................................. 6 Figure 2: 78Q8430 STEM Demo Board Jumper and Dip Switch Locations ................................................. 8 Figure 3: Demo System Hardware Connections........................................................................................... 9 Figure 4: STEM EMI Bus Interface Block Diagram ..................................................................................... 12 Figure 5: STEM EMI Bus Interface Schematic ........................................................................................... 13 Figure 6: STEM IO Bus Interface Schematic .............................................................................................. 14 Figure 7: MICTOR Diagnostic Connectors Schematic ............................................................................... 15 Figure 8: 78Q8430 MAC Interface Schematic ............................................................................................ 16 Figure 9: 78Q8430 PHY Interface Schematic ............................................................................................. 17 Figure 10: Top Silkscreen Layout ............................................................................................................... 19 Figure 11: Top Layer Layout ....................................................................................................................... 19 Figure 12: Ground Layer Layout ................................................................................................................. 20 Figure 13: Inner Layer 1 Layout .................................................................................................................. 20 Figure 14: Inner Layer 2 Layout .................................................................................................................. 21 Figure 15: VCC Layer Layout ..................................................................................................................... 21 Figure 16: Bottom Layer Layout .................................................................................................................. 22 Figure 17: Bottom Silkscreen Layout .......................................................................................................... 22

Tables Table 1: Demo Board Jumper Options ......................................................................................................... 8 Table 2: Demo Board Dip Switch Options .................................................................................................... 8 Table 3: STEM Demo Board Bill of Materials ............................................................................................. 18 Table 4: Order Numbers and Description ................................................................................................... 23


Rev. 1.0 5

1 Introduction

The 78Q8430 STEM Demo Board (D8430T3B_STEM) is a design example for a 10/100BASE-TX MAC+PHY ST Microelectronics STEM daughter card. The Demo Board plugs directly into STi5100 and STi5514 Evaluation Systems. The network connection is provided by the 78Q8430 which is a single chip auto-sensing, auto-switching (auto-negotiation or parallel detect modes and auto-MDIX) 10/100BASE-TX Fast Ethernet transceiver with full duplex operation capability. The device is designed specifically for the Audio/Visual (A/V) and Set Top Box (STB) markets and is easily interfaced to available A/V and STB core processors. The 78Q8430 is compliant with applicable IEEE-802.3 standards. MAC and PHY configuration and status registers are provided as specified by IEEE802.3u. The integrated MAC is supported by an internal 32KByte transmit and receive SRAM FIFO. The partition of transmit and receive queues are configurable through software, allowing the 78Q8430 to be tuned for specific applications. The device contains hardware support for TCP-IP checksum and ARC address recognition. The 78Q8430 STEM Demo Board includes support for the following 78Q8430 hardware interface features: • The system bus interface operates like external memory with an active low chip select. • A configurable bus interface with support for little endian and big endian formats. • Supports an asynchronous 100 MHz (max) bus clock for STi5100/5514 operation. • Supports 32-bit, 16-bit and 8 bit wide data bus formats. • Optional EEPROM interface for configuration data. • Two programmable LED outputs for PHY status. • Single +3.3V power supply voltage with common ground plane. A host processor interfaces directly to the FIFO via the GBI interface. The D8430T3B_STEM board is configured for 16-bit big endian bus format by default. The bus can optionally be configured for 32-bit or 8-bit bus widths or little endian format. Figure 1 shows the 78Q8430 system interfaces.


6 Rev. 1.0

Activity (Programmable)

32-bit/16-bit/8-bitSystem

Bus

InterfaceConfiguration

EEPROM Interface

JTAGInterface

78Q8430Single Chip

10/100 EthernetMAC & PHY

RJ45

Integrated RJ-45 with 1:1

Transformer

CAT5Cable

LED

LED

Link (Programmable)

Figure 1: 78Q8430 System Interface Diagram

This document describes the setup and configuration of the 78Q8430 STEM Demo Board. The demo board requires operation with a +3.3V power supply sourced from the STEM bus interface on the STi5100 evaluation board. The 78Q8430 PHY interfaces to a CAT5 UTP cable via a 1:1 transformer. The supplied software driver includes support for ST/OS-20. The included 78Q8430 Software Driver Development Guidelines and 78Q8430 Software User Guide for ST/OS-20 describe the software interfacing requirements for quick driver integration and prompt system evaluation of the 78Q8430. Use this document with those listed in the Related Documentation section. 1.1 Package Contents The 78Q8430 STEM Demo Board kit includes: • A 78Q8430 STEM Demo Board (D8430T3B_STEM). • A CD containing the 78Q8430 software device driver for ST/OS-20. • The following documents on CD:

78Q8430 STEM Demo Board User Manual (this document) 78Q8430 Preliminary Data Sheet 78Q8430 Layout Guidelines 78Q8430 Software Driver Development Guidelines 78Q8430 Software User Guide for ST/OS-20

The printed circuit board Gerber files are available upon request. 1.2 Safety and ESD Notes Connecting live voltages to the demo board system will result in potentially hazardous voltages on the boards.

The demo boards are ESD sensitive! ESD precautions must be taken when handling these boards!


Rev. 1.0 7

1.3 System Hardware Requirements The following describes the minimum hardware requirements for the 78Q8430 Demo Board system: • The 78Q8430 STEM Demo Board (D8430T3B_STEM). • An STi5100 Evaluation Platform (available from ST). • A software development PC with the following minimum requirements: Pentium® 4 CPU with 256 MB

RAM and 40 GB hard drive running either Windows® 2000 or Windows XP. • An IP Video Server PC with the following minimum requirements: Pentium 4 CPU with 256 MB RAM

and 40 GB hard drive, 10/100 ports for demo board connection, running either Windows 2000 or Windows XP.

• A 10/100Base-T hub or switch. • An ST Microconnect JTAG emulator. This device loads the IPSTB demo software into the STi5100

Evaluation Platform. • Television for viewing the video demo. 1.4 System Software Requirements The following describes the minimum software requirements for embedded application programming using the 78Q8430 Demo Board: • ST20 Toolset: STi5100 BSP Version 2.0.5 Patch 1 (available from ST). • IPBox: contains web_server, htdocs, and video_server folders (included in the 78Q8430 ST/OS-20

driver software release package). • IPSTB application: Ipstba3_esp – 5100 (included in the 78Q8430 ST/OS-20 driver software release

package).


8 Rev. 1.0

2 Hardware Setup 2.1 Jumper and Dip Switch Settings The 78Q8430 STEM Demo Board utilizes various jumpers (J5, J6, and J8) and dip switches (S3) for establishing the startup configuration of the 78Q8430 device. Figure 2 shows the location of the jumpers and dip switch. Table 1 and Table 2 describe the jumper and dip switch options. The jumper and switch numbers and settings are printed on the demo board.

Figure 2: 78Q8430 STEM Demo Board Jumper and Dip Switch Locations

Table 1: Demo Board Jumper Options

Jumper Name Setting Description J5 Chip Select Source notCS0 Selects STEM notCS0 for 78Q8430 chip select signal

source. notCS1 Selects STEM notCS1 for 78Q8430 chip select signal

source (default). J6 Interrupt Selection notINTR0 Connects 78Q8430 interrupt output to STEM notINTR0

signal. notINTR1 Connects 78Q8430 interrupt output to STEM notINTR1

signal (default). J8 PMEB Selection notINTR1 Connects 78Q8430 PMEB output to STEM notINTR1

signal. PMEB Connects 78Q8430 PMEB output to board PMEB signal.

Table 2: Demo Board Dip Switch Options

S3 – Device Mode Configuration Dip Switch ( 1 = open, 0 = closed) Position 1 (ENDIAN1)

Position 1, 2: 0, 0 (default) = big endian (MSB at high bit positions) 0, 1 = bytes are little endian inside 16 bit words 1, 0 = word endian (MSW at low bit positions) 1, 1 = little endian (MSB at low bit positions)

Position 2 (ENDIAN0)


Rev. 1.0 9

S3 – Device Mode Configuration Dip Switch ( 1 = open, 0 = closed) Position 3 (BUSMODE) Position 3, 5, 4:

0, 0, 0 = sync bus, external system clock, memwait act low 0, 0, 1 = sync bus, external system clock, memwait act high 0, 1, 0 = reserved 0, 1, 1 = reserved 1, 0, 0 = async bus, external system clock, memwait act low 1, 0, 1 (default) = async bus, external system clock, memwait act high 1, 1, 0 = async bus, internal system clock, memwait act low 1, 1, 1 = async bus, internal system clock, memwait act high

Position 5 (CLCKMODE)

Position 4 (WAITMODE)

Position 6 (BTZ0) Position 6, 7: 0, 0 = 32 bit bus width 0, 1 (default) 16 bit bus width (only DATA[15:0] are used) 1, 0 = 8 bit bus width (only DATA [7:0] are used) 1, 1 = reserved

Position 7 (BTZ1)

Position 8 (NC) No Connection 2.2 Connections Connect the system components as shown in Figure 3. Refer to the STi5100 documentation for additional information on the STi5100 Evaluation Platform connections.

Figure 3: Demo System Hardware Connections

STEP 1: Attach the 78Q8430 STEM Demo Board to the STi5100 Evaluation Board via the two 140 pin connectors on the bottom of the demo board to the two corresponding STEM connectors on the STi5100 Evaluation Board.


10 Rev. 1.0

STEP 2: Connect the development PC Ethernet port to the switch/hub using a CAT-5 cable. STEP 3: Connect the ST20 in-circuit-emulator (ICE) to the switch/hub using a CAT-5 cable. STEP 4: Connect the ST20 ICE to the STi5100 Evaluation Board using the ribbon cable. STEP 5: Connect the television to the STi5100 Evaluation Board using a video/audio cable. STEP 6: Connect the video server PC to the STEM demo board RJ-45 connector using a CAT-5 cable. STEP 7: Refer to the STi5100 documentation for powering up the evaluation system. The 78Q8430 STEM Demo Board receives its power through the STEM bus interface on the STi5100 Evaluation Board.


Rev. 1.0 11

3 Software Setup The path names (in italics) given in the following steps are for illustrative purposes. If the software has been installed in different directories than those given below, replace the path in the example with the appropriate path for your installation. 3.1 Development (Host) PC Environment Setup The following steps describe how to set up the host PC software environment. STEP 1: Modify the Windows Environment to use the ST20R2.0.5 tool set as follows:

Append C:\STM\ST20R2.0.5\bin; to the front of the system variable ‘Path’. As an example, the new path might be C:\STM\ST20R2.0.5\bin;C:\STM\ST20R1.9.6\bin;%SystemRoot%\system32;……

STEP 2: Modify the system variable ‘ST20ROOT’ as follows: ST20ROOT C:\STM\ST20R2.0.5

STEP 3: Reboot the PC.

3.2 Video Server PC Environment Setup The following steps describe how to set up the MPEG2 video server PC environment. STEP 1: Set up the ST TSVOD server for unicast video streaming:

G:\ IPBox\servers\ TS_VOD_Server

STEP 2: Set up the ST Multicast server for multicast video streaming: G:\ IPBox\servers\ Multicast

STEP 3: Set the video server PC IP address to 192.168.1.110.

STEP 4: Start the appropriate server before requesting a video stream. 3.3 ST Microconnect Target Configuration Set the ST Microconnect Target Configuration (via Ethernet) IP addresses as follows:

Host PC: 192.168.1.100 ST Microconnect: 192.168.1.30 Video Server PC: 192.168.1.110

3.4 78Q8430 Software Device Driver The 78Q8430 ST/OS-20 device driver software and user guide, 78Q8430 Software User Guide for ST/OS-20, are provided with the demo board. Refer to that documentation for additional information on configuring and installing the driver.


12 Rev. 1.0

4 78Q8430 STEM Demo Board Schematic, BOM and PCB Layout

BUSMODECLKMODEWAITMODEBOOTSZ0BOOTSZ1

PMEB

ENDIAN0ENDIAN1

TCLKTRSTTMSTDOTDI

S3

J9

LED0LED1

TXPTXN

RXPRXN

XTLP

XTLN

RJ45

J16

25MHz Crystal

.

STEM IO InterfaceNot UsedPass Through Only

TP2 & TP5

Mictor ConnectorsLogic Analyzer Pods

U2PROMCLKPROMCSPROMDOPROMDI

TP1, TP4, TP8

Scope Test Points

J4/P2

STEMEMIINTERFACE

FLASHCLK

notRESET

notCS0notCS1

notRDnotWR

A9:0

D31:0

MemWait

notINTR0notINTR1

J6

J1/P1

VCC33

78Q8430B

BUSCLK

RESETB

CSB

OEBWRB

ADDR9:0

DATA31:0

MEMWAIT

INTB

J5

J8

VCCD VCCA

Figure 4: STEM EMI Bus Interface Block Diagram


Rev. 1.0 13

A0A1

A1A0

11

GND1

MTHOLE

GND1

1

GND2

MTHOLE

GND

STEM_P_EMI

AMP 179031-6STEM_J_EMI_REV1AMP 5-179010-6

VCC12

D15

A[9:0]

D13D14

D19

D12

D30

D16D17

D7

D23

D6D5

D3

D27D24

D4

D21

D28

D1

D20

D0

D[31:0]

D25

D9

D18

D10

D2

D8

D31

D11

D22

A5

A15

D29

D26

A14

A4

A7

A3

A8A6

A12A10

A2

A11

A9

A13

notINTR1

notRESET

MemWait

notINTR0

notWR

notCS0 notCS1

GND

FCLK

A24A22

A20A18

MCLK ALE

A16

notRD

norCAS

DACK3DACK1DRAK1notDR1

ACLK

MemReq

FBAA

A25

MemGnt

notDR0DRAK0

SCKENSCLKnotBS notFRM

D26

DACK2DACK0

A17

A19A21

A23

notCS0

norCAS

D31

DACK0

D4

A10

A24

DRAK1

SCLK

DACK3

D6

D28D30

A25

A5

notWR

A9

A16A14

A19

MemGnt

D29

A20

D23

A7

MemReq

D24

ALE

D17

A12

notINTR0

SCKEN

notBS

D13

D27

D15

GND

D8

A22

D10

D0

MemWait

A23

A6

DRAK0

D9

D22

D12

notFRM

notRESET

D14

A21

A11

notDR1

D21

D2

D20

notRD

MCLK

D25

A8

FCLK

A15

D7

A13

ACLK

D16

D11

notINTR1

D18

notDR0

DACK1

A17

A2

DACK2

A18

A3A4

notCS1

D5

FBAA

D1

GND

MPST1MPST0

GNDGND

GND

D3

D19

GND

VCC5

GND

notBS1

SDRAM_CLK2

SDRAM_CLKEN3

MEZZ_PRESENT04

GROUND5

DACK26

DACK07

DRAK08

notDREQ09

GROUND10

MemWait11

VCC3V312

MemGranted13

notINTR014

GROUND15

FLASH_CLK16

GROUND17

notWR18

GROUND19

notCS020

GROUND21

A2522

A2323

VCC3V324

A2125

A1926

GROUND27

A1728

A1529

VCC3V330

A1331

A1132

GROUND33

A934

A735

VCC3V336

A537

A338

GROUND39

A1_notBE3_DQM340

notBE1_DQM141

GROUND42

D3143

D2944

GROUND45

D2746

D2547

GROUND48

D2349

D2150

GROUND51

D1952

D1753

GROUND54

D1555

D1356

GROUND57

D1158

D959

GROUND60

D761

D562

GROUND63

D364

D165

GROUND66

MPX_CLK67

GROUND68

VCC12V69

VCC12V70

notFRAME71

notCAS72

notRESET73

MEZZ_PRESENT174

GROUND75

DACK376

DACK177

DRAK178

notDREQ179

GROUND80

AUXCLKOUT81

VCC3V3 82

MemReq 83

notINTR184

GROUND85

FBAA86

GROUND87

notRD_notCAS_notFRAME88

GROUND89

notCS190

GROUND91

A2492

A2293

VCC3V3 94

A20 95

A1896

GROUND97

A1698

A1499

VCC3V3100

A12101

A10102

GROUND103

A8104

A6105

VCC3V3106

A4 107

A2 108

GROUND109

A0_notBE2_DQM2110

notBE0_DQM0111

GROUND112

D30113

D28114

VCC115

D26116

D24117

GROUND118

D22 119

D20 120

VCC121

D18122

D16123

GROUND124

D14125

D12126

VCC127

D10128

D8129

GROUND130

D6 131

D4 132

VCC133

D2134

D0135

GROUND136

ALE_notRAS_notBS137

GROUND138

VCC12V139

VCC12V140

P1

STEM EMI Connector

C6100805

notBS1

SDRAM_CLK2

SDRAM_CLKEN3

MEZZ_PRESENT04

GROUND5

DACK26

DACK07

DRAK08

notDREQ09

GROUND10

MemWait11

VCC3V312

MemGranted13

notINTR014

GROUND15

FLASH_CLK16

GROUND17

notWR18

GROUND19

notCS020

GROUND21

A2522

A2323

VCC3V324

A2125

A1926

GROUND27

A1728

A1529

VCC3V330

A1331

A1132

GROUND33

A934

A735

VCC3V336

A537

A338

GROUND39

A1_notBE3_DQM340

notBE1_DQM141

GROUND42

D3143

D2944

GROUND45

D2746

D2547

GROUND48

D2349

D2150

GROUND51

D1952

D1753

GROUND54

D1555

D1356

GROUND57

D1158

D959

GROUND60

D761

D562

GROUND63

D364

D165

GROUND66

MPX_CLK67

GROUND68

VCC12V69

VCC12V70

notFRAME71

notCAS72

notRESET73

MEZZ_PRESENT174

GROUND75

DACK376

DACK177

DRAK178

notDREQ179

GROUND80

AUXCLKOUT 81

VCC3V3 82

MemReq83

notINTR184

GROUND85

FBAA86

GROUND87

notRD_notCAS_notFRAME88

GROUND89

notCS190

GROUND91

A2492

A22 93

VCC3V3 94

A2095

A1896

GROUND97

A1698

A1499

VCC3V3100

A12101

A10102

GROUND103

A8104

A6105

VCC3V3 106

A4 107

A2108

GROUND109

A0_notBE2_DQM2110

notBE0_DQM0111

GROUND112

D30113

D28114

VCC115

D26116

D24117

GROUND 118

D22 119

D20120

VCC121

D18122

D16123

GROUND124

D14125

D12126

VCC127

D10128

D8129

GROUND 130

D6 131

D4132

VCC133

D2134

D0135

GROUND136

ALE_notRAS_notBS137

GROUND138

VCC12V139

VCC12V140

J1

STEM EMI Connector

C5100805

C3100805

C4100805

R133

0603

R2 33

0603

+3.3V

notRESET

notCS1

notWR

FLASHCLK

notCS0

notRD

MemWait

VCC12

D[31:0]

A[9:0]

Pass ThroughComponent Side Expansion Connector

Solder Side Connector to Motherboard

VCC5

notINTR0 notINTR1notINTR0 notINTR1

Figure 5: STEM EMI Bus Interface Schematic


14 Rev. 1.0

Component Side Expansion ConnectorSolder Side Connector to Motherboard

VCC5VCC5

VCC12

Pass Through

STEMIO69

STEMIO75STEMIO74

STEMIO140

STEMIO80

STEMIO78STEMIO77

STEMIO84STEMIO83

STEMIO81

STEMIO89

STEMIO87STEMIO86

STEMIO93STEMIO92

STEMIO90

STEMIO99STEMIO98

STEMIO96STEMIO95

STEMIO104

STEMIO102STEMIO101

STEMIO108STEMIO107

STEMIO105

STEMIO113

STEMIO111STEMIO110

STEMIO117STEMIO116

STEMIO114

STEMIO123STEMIO122

STEMIO120STEMIO119

STEMIO128

STEMIO126STEMIO125

STEMIO134

STEMIO132

STEMIO130

STEMIO4

STEMIO138

STEMIO136

STEMIO8STEMIO7

STEMIO5

STEMIO14STEMIO13

STEMIO10

STEMIO19

STEMIO17STEMIO16

STEMIO25

STEMIO23STEMIO22

STEMIO29STEMIO28

STEMIO26

STEMIO35STEMIO34

STEMIO32STEMIO31

STEMIO40

STEMIO38STEMIO37

STEMIO46

STEMIO44STEMIO43

STEMIO52

STEMIO49

STEMIO47

STEMIO56STEMIO55

STEMIO53

STEMIO64

STEMIO62

STEMIO60

STEMIO58

STEMIO67

STEMIO65

GND

STEMIO128

STEMIO47

STEMIO99

STEMIO4

STEMIO117

STEMIO56

STEMIO60

STEMIO65

STEMIO14

STEMIO107

STEMIO28

STEMIO90

STEMIO102STEMIO32

STEMIO87STEMIO17

STEMIO7

STEMIO80

STEMIO44

STEMIO95

STEMIO37

STEMIO98

STEMIO101

STEMIO69

STEMIO86

STEMIO113

STEMIO34

STEMIO53

STEMIO120

STEMIO25

STEMIO19

STEMIO130

STEMIO62

STEMIO8

STEMIO40

STEMIO49

STEMIO108

STEMIO29

STEMIO123

STEMIO125

STEMIO5

STEMIO136

STEMIO67

STEMIO92

STEMIO110

STEMIO78

STEMIO105

STEMIO96

STEMIO74

STEMIO22

STEMIO46

STEMIO132

STEMIO84

STEMIO81

STEMIO119

STEMIO116

VCC12

STEMIO111

STEMIO114

STEMIO58

STEMIO10

STEMIO55

STEMIO26

STEMIO38

STEMIO77

STEMIO64

STEMIO122

STEMIO104

STEMIO134

STEMIO138

STEMIO140

STEMIO52

GND

STEMIO31

STEMIO35

STEMIO126

STEMIO75

STEMIO23

STEMIO13

STEMIO43

STEMIO93

STEMIO16

STEMIO83

STEMIO89

VCC12V1

VCC12V2

GROUND3

TS_OUT_DATA74

TS_OUT_DATA55

GROUND6

TS_OUT_DATA37

TS_OUT_DATA18

GROUND9

TS_OUT_CLK10

GROUND11

VCC12

TS_IN0_DATA713

TS_IN0_DATA514

GROUND15

TS_IN0_DATA316

TS_IN0_DATA117

GROUND18

TS_IN0_CLK19

GROUND20

VCC21

AVData722

AVData523

GROUND24

AVData325

AVData126

GROUND27

AVPacketErr28

AVByteClk29

GROUND30

AVPacketTag031

AVPacketTag232

VCC33

TS_IN1_DATA734

TS_IN1_DATA535

GROUND36

TS_IN1_DATA337

TS_IN1_DATA138

GROUND39

TS_IN1_CLK40

GROUND41

VCC42

TS_IN2_DATA743

TS_IN2_DATA544

GROUND45

TS_IN2_DATA346

TS_IN2_DATA147

GROUND48

TS_IN2_CLK49

GROUND50

VCC51

YUV752

YUV553

GROUND54

YUV355

YUV156

GROUND57

VSYNC58

GROUND59

PIXCLK60

GROUND61

SCLK62

GROUND63

PCM364

PCM165

GROUND66

I2C_CLK67

GROUND68

Reserved69

VCC70

VCC12V71

VCC12V72

GROUND73

TS_OUT_DATA674

TS_OUT_DATA475

GROUND76

TS_OUT_DATA277

TS_OUT_DATA078

GROUND79

TS_OUT_DSTRT80

TS_OUT_DVAL81

GROUND82

TS_IN0_DATA683

TS_IN0_DATA484

GROUND85

TS_IN0_DATA286

TS_IN0_DATA087

GROUND88

TS_IN0_DSTRT89

TS_IN0_DVAL90

GROUND91

AVData692

AVData493

GROUND94

AVData295

AVData096

GROUND97

AVPacketClk98

AVByteClkValid99

GROUND100

AVPacketTag1101

AVPacketTag3102

VCC103

TS_IN1_DATA6104

TS_IN1_DATA4105

GROUND106

TS_IN1_DATA2107

TS_IN1_DATA0108

GROUND109

TS_IN1_DSTRT110

TS_IN1_DVAL111

GROUND112

TS_IN2_DATA6113

TS_IN2_DATA4114

GROUND115

TS_IN2_DATA2116

TS_IN2_DATA0117

GROUND118

TS_IN2_DSTRT119

TS_IN2_DVAL120

GROUND121

YUV6122

YUV4123

GROUND124

YUV2125

YUV0126

GROUND127

HSYNC128

GROUND129

MCLK130

GROUND131

LRCLK132

GROUND133

PCM2134

PCM0135

GROUND136

I2C_SDA137

GROUND138

notRESET139

VCC140

J4

STEM IO Connector

VCC12V1

VCC12V2

GROUND3

TS_OUT_DATA74

TS_OUT_DATA55

GROUND6

TS_OUT_DATA37

TS_OUT_DATA18

GROUND9

TS_OUT_CLK10

GROUND11

VCC12

TS_IN0_DATA713

TS_IN0_DATA514

GROUND15

TS_IN0_DATA316

TS_IN0_DATA117

GROUND18

TS_IN0_CLK19

GROUND20

VCC21

AVData722

AVData523

GROUND24

AVData325

AVData126

GROUND27

AVPacketErr28

AVByteClk29

GROUND30

AVPacketTag031

AVPacketTag232

VCC33

TS_IN1_DATA734

TS_IN1_DATA535

GROUND36

TS_IN1_DATA337

TS_IN1_DATA138

GROUND39

TS_IN1_CLK40

GROUND41

VCC42

TS_IN2_DATA743

TS_IN2_DATA544

GROUND45

TS_IN2_DATA346

TS_IN2_DATA147

GROUND48

TS_IN2_CLK49

GROUND50

VCC51

YUV752

YUV553

GROUND54

YUV355

YUV156

GROUND57

VSYNC58

GROUND59

PIXCLK60

GROUND61

SCLK62

GROUND63

PCM364

PCM165

GROUND66

I2C_CLK67

GROUND68

Reserved69

VCC70

VCC12V71

VCC12V72

GROUND73

TS_OUT_DATA674

TS_OUT_DATA475

GROUND76

TS_OUT_DATA277

TS_OUT_DATA078

GROUND79

TS_OUT_DSTRT80

TS_OUT_DVAL81

GROUND82

TS_IN0_DATA683

TS_IN0_DATA484

GROUND85

TS_IN0_DATA286

TS_IN0_DATA087

GROUND88

TS_IN0_DSTRT89

TS_IN0_DVAL90

GROUND91

AVData692

AVData493

GROUND94

AVData295

AVData096

GROUND97

AVPacketClk98

AVByteClkValid99

GROUND100

AVPacketTag1101

AVPacketTag3102

VCC103

TS_IN1_DATA6104

TS_IN1_DATA4105

GROUND106

TS_IN1_DATA2107

TS_IN1_DATA0108

GROUND109

TS_IN1_DSTRT110

TS_IN1_DVAL111

GROUND112

TS_IN2_DATA6113

TS_IN2_DATA4114

GROUND115

TS_IN2_DATA2116

TS_IN2_DATA0117

GROUND118

TS_IN2_DSTRT119

TS_IN2_DVAL120

GROUND121

YUV6122

YUV4123

GROUND124

YUV2125

YUV0126

GROUND127

HSYNC128

GROUND129

MCLK130

GROUND131

LRCLK132

GROUND133

PCM2134

PCM0135

GROUND136

I2C_SDA137

GROUND138

notRESET139

VCC140

P2

STEM IO ConnectorGND GND

STEM_P_IO

AMP 179031-6STEM_J_IO_REV1AMP 5-179010-6

Figure 6: STEM IO Bus Interface Schematic


Rev. 1.0 15

D[31:0]

A[9:0]A[9:0]

GND

2-767004-2

2-767004-2

AMP

AMP

11

22

TP8

11

22

TP4

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

TP1

FLASHCLK

MemWaitnotINTRPMEB

notRESETnotCSnotWRnotRD

D28

(LSB)

D13

D11

D18

D26D25

D27

D29

D17

D4

D24

D15

D12

D9

D7D23D22

D8

D21

D3

(MSB)

D6D5

D1

D30

D0

D20

D2D19

D31D14

D10

D16

A4A5

notWR

(MSB)

A7

FLASHCLK

A8A9

notRD

notRESET

A6

A2notCS

A3

MemWaitnotINTRPMEB

A1(LSB)A0

TP27TP29TP211

A2A3

NC1

GND3

CLKE5

D15E7

D14E9

D13E11

D12E13

D11E15

D10E17

D9E19

D8E21

D7E23

D6E25

D5E27

D4E29

D3E31

D2E33

D1E35

D0E37

NC2

NC4

CLKO6

D15O8

D14O10

D13O12

D12O14

D11O16

D10O18

D9O20

D8O22

D7O24

D6O26

D5O28

D4O30

D3O32

D2O 34

D1O36

D0O38

GN

D39

GN

D40

GN

D41

GN

D42

GN

D43

TP5

Mictor 38 Pin Connector

D0D1

NC1

GND3

CLKE5

D15E7

D14E9

D13E11

D12E13

D11E15

D10E17

D9E19

D8E21

D7E23

D6E25

D5E27

D4E29

D3E31

D2E33

D1E35

D0E37

NC2

NC4

CLKO6

D15O8

D14O10

D13O12

D12O14

D11O16

D10O18

D9O20

D8O22

D7O24

D6O26

D5O 28

D4O30

D3O32

D2O34

D1O36

D0O38

GN

D39

GN

D40

GN

D41

GN

D42

GN

D43

TP2

Mictor 38 Pin Connector

D[31:0]

GND

GND

Figure 7: MICTOR Diagnostic Connectors Schematic


16 Rev. 1.0

TMS

DATA0 28DATA1 29DATA2 30DATA3 31DATA432DATA533DATA638DATA739DATA840DATA941DATA1042DATA1145DATA12 46DATA13 47DATA14 48DATA15 49DATA16 52DATA17 53DATA18 54DATA19 55DATA20 56DATA21 57DATA22 58DATA23 59DATA24 62DATA25 63DATA26 64DATA27 65DATA28 66DATA29 67DATA30 68DATA31 69

INTB 72

PMEB 73

MEMWAIT 13

ADDR218 ADDR319 ADDR420 ADDR521 ADDR622 ADDR723 ADDR824 ADDR925

ADDR010 ADDR19

BUSCLK15

RESETB7

CSB16

WRB11

OEB12

ENDIAN079 ENDIAN180

BUSMODE83

WAITMODE84

CLKMODE85

BOOTSZ1100

BOOTSZ01

PROMCLK74

PROMCS75

PROMDO76

PROMDI77

TCLK6 TRST5 TMS3 TDO81 TDI4

GN

D1

2

GN

D2

14

GN

D3

34

GN

D4

35

GN

D5

26

GN

D6

43

GN

D7

50

GN

D8

60

GN

D9

70

GN

D11

78

VC

C1

8

VC

C2

17

VC

C3

36

VC

C4

27

VC

C5

37

VC

C6

44

VC

C7

51

VC

C8

71

VC

C9

61

VC

C11

82

U1A78Q8430B-100

GND GNDGND GND

R70330603

J82

GND GNDGND

GND

GND

notCSnotWRnotRD

GND

R6910K0603

D19

D3

D18

D12

D31

D14

notINTR

D26D25

D1

D4

D23

D7

D16D15

D20

D13

D22

D2

D9

D28

D17

D21

D6

D27

D5

D8

D11

D0

D24

D[31:0]

D10

D30

PMEBTRST

+3.3V

FLASHCLK

.

(LSB)

(MSB)

VC

C8

GN

D5

CLK2

CS1

DI3

DO 4

NC1 7

NC2 6

U2

93LC46B

notINTR

PMEB

12345678910

J9

CON10

TCLK

TDI

TMS

D[31:0]

TCLK

TRST

GND

TDO

R6510K0603

R6710K0603

GND

R6810K0603

+3.3V

SW1

notCS

RESET

GNDGND

Not Installed

GNDGND

EVQPJU

2 4

53

UX1SpareSOT23_5

2 4

53

UX2SpareSOT23_5

2 4

53

UX3SpareSOT23_5

2 4

53

UX4SpareSOT23_5

+3.3V

R433

0603

MEMWAITMEMWT

R24330603

J62

PROMCSPROMCLK

PROMDIPROMDO

(LSB)

(MSB)

+3.3V

ENDIAN0

R81 33

WAITMODE

ENDIAN1ENDIAN0

BTZ0

BUSMODE

ENDIAN1

BTZ1

CLKMODE

R54 33

R82 33

R83 33

12345678

161514131211109

S3

R84 33

R85 33

notINTR1

notINTR0

R86 33R87 33R88 33

BTZ0

R8910K0603

R9010K0603

R9110K0603

R53 33R9210K0603

R9310K0603

R9410K0603

BTZ1

A6

A0

A5

A7

A9

A3A2

A8

A4

A[9:0]A[9:0]

A1

R9510K0603

R6 33 0603R5 33 0603

R1910K0603

C140.10603

C150.10603

C170.10603

C110.10603

C180.10603

C120.10603

C130.10603

C160.10603

C100.10603

C90.10603

11

22

33

J5

11

22

33

J6

+3.3V

CLKMODEWAITMODEBUSMODE

+3.3V

FLASHCLK

MemWait

notCS0 notRDnotWR

notRESET

notINTR1

notINTR0

notCS1

R7210K

0603

R3

1000603

RSTB

notRESET

D29R8 33 0603

R7 33 0603

R9 33 0603R10 33 0603

GND

R12 33 0603R11 33 0603

R13 33 0603R14 33 0603

R16 33 0603R15 33 0603

R17 33 0603R18 33 0603

R21 33 0603R20 33 0603

R22 33 0603R23 33 0603

R26 33 0603R25 33 0603

R27 33 0603R28 33 0603

R30 33 0603R29 33 0603

R31 33 0603R32 33 0603

R34 33 0603R33 33 0603

R35 33 0603R36 33 0603

R38 33 0603R37 33 0603

11

22

33

J8

DB31

DB28DB29DB30

DB22DB23DB24DB25DB26DB27

DB17DB18DB19DB20DB21

DB12DB13DB14DB15DB16

DB6DB7DB8DB9DB10DB11

DB1DB2DB3DB4DB5

DB0TDI

GND

TDO

+3.3V

R7110K0603

Figure 8: 78Q8430 MAC Interface Schematic


Rev. 1.0 17

XTLN

XTLP

GND GND

GND

LED1

LED0

GNDLink

Gnd pins 2 and 4

VCCA

TXOP

TXON

Use Zero Ohm ResistorGNDGND

RXIP

RXIN

GND

C19100805

C220.10603

GND

C240.10603

R636800603

R646800603

R4649.91%0603

C3127PF0603

1 3Y1

25.000MHZ50ppmRaltronL11B

R4749.91%0603

C25100805

R4449.91%0603

L1

FERRITER_0805

C230.10603

C3027PF0603

R4549.91%0603

C210.10603

C200.10603

+3.3V

+3.3V

+3.3VGNDGND

TXP 97

TXN 98

RXP 94

RXN 93

XTLP 87

XTLN 88

VC

CA

186

VC

CA

295

VC

CA

396

GN

DA

189

GN

DA

291

GN

DA

399

LED1 92

LED0 90

U1B78Q8430B-100

CGND

Pulse Engr

RX/TX

Link

CGND

8

1234567

1314

910

1112

RALEDRCLED

TD+TD-TDCTCGND1CGND2RDCTRD+RD-

LCLEDLALED

CGND3

CGND4

J16

J0011F01P TabUp

Activity

CGND

1

CHSGND1

Figure 9: 78Q8430 PHY Interface Schematic


18 Rev. 1.0

Table 3: STEM Demo Board Bill of Materials

Item Quantity Reference Part PCB Footprint

Part Number Vendor

1 2 C30,C31 CAP, 27pF, 50V C_0603 C1608C0G1H270J TDK 2 15 C9-C18,C20-C24 CAP, 0.1uF, 16V C_0603 ECJ-1VB1E104K Panasonic

3 6 C3-C6,C19,C25 CAP,10uF,10V C_0805 GRM21BR61A106KE19L Murata

4 0 GND1,GND2 MTHOLE MTHOLE

5 3 J5,J6,J8 CON3 SIP\3P PBC03SAAN Sullins Electronics Corp

6 2 TP4,TP8 CON2 SIP\2P PBC02SAAN Sullins Electronics Corp

7 1 J9 CON10 SIP\10P PBC10SAAN Sullins Electronics Corp

8 2 J1,J4 STEM connector STEM CON 5-5179010-6 AMP 9 1 J16 Integrated RJ45 RJ45-INT J1011F01P Pulse Eng 10 1 Y1 25MHz Crystal XTAL-SMD ABMM-25MHz Abracon 11 1 L1 (USE 0-ohm) Ferrite Bead L_0805 MMZ2012S181A TDK

12 14 R19,R65,R67-R69, R71,R72,R89-R95 RES, 10k, 5% R_0603 ERJ-3GEYJ103V Panasonic

13 1 SW1 Switch, PB PB EVQ-PJX05M Panasonic

14 1 S3 8-Position DIP Switch DIPSW-16 90HBJ08PT Grayhill, Inc

15 4 R44-R47 RES, 49.9, 1% R_0603 ERJ-3EKF49R9V Panasonic

16 47 R1,R2,R4-R18, R20-R38, R53, R54,R70,R81-R88

RES, 33, 5% R_0603 ERJ-3GEYJ330V Panasonic

17 1 R3 RES,100,5% R_0603 ERJ-3GEYJ101V Panasonic 18 2 R63,R64 RES, 680, 5% R_0603 ERJ-3GEYJ681V Panasonic

19 1 TP1 CON17 SIP\17P PBC17SAAN Sullins Electronics Corp

20 2 TP2,TP5 Mictor 38-pin MICTOR 2-767004-2 Tyco

21 1 U1 78Q8430 100 LQFP 78Q8430 Teridian Semiconductor

22 1 U2 93LC46 SOIC8 93LC46BT-I/SN Microchip

23 4 UX1-UX4 Spare – not installed


Rev. 1.0 19

Figure 10: Top Silkscreen Layout

Figure 11: Top Layer Layout


20 Rev. 1.0

Figure 12: Ground Layer Layout

Figure 13: Inner Layer 1 Layout


Rev. 1.0 21

Figure 14: Inner Layer 2 Layout

Figure 15: VCC Layer Layout


22 Rev. 1.0

Figure 16: Bottom Layer Layout

Figure 17: Bottom Silkscreen Layout


Rev. 1.0 23

5 Ordering Information Table 4 lists the order number and description for the 78Q8430 STEM Demo Board.

Table 4: Order Numbers and Description

Part Description Order Number 78Q8430 STEM Demo Board (D8430T3B_STEM) 78Q8430STEM-DB

6 Related Documentation The following 78Q8430 documents are available from Teridian Semiconductor Corporation: 78Q8430 Preliminary Data Sheet 78Q8430 Layout Guidelines 78Q8430 Software Driver Development Guidelines 78Q8430 Software User Guide for ST/OS-20 78Q8430 STEM Demo Board User Manual 78Q8430 ARM9 Linux Driver User and Test Guide 78Q8430 Embest Evaluation Board User Manual 7 Contact Information For more information about Teridian Semiconductor products or to check the availability of the 78Q8430, contact us at: 6440 Oak Canyon Road Suite 100 Irvine, CA 92618-5201 Telephone: (714) 508-8800 FAX: (714) 508-8878 Email: [email protected] For a complete list of worldwide sales offices, go to http://www.teridian.com.

http://www.teridian.com/


24 Rev. 1.0

Revision History Revision Date Description 1.0 03/20/2008 First publication.

78Q8430 STEM Demo Board User Manual - maximintegrated.com · Teridian Semiconductor Corporation...

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