7.3. Analog Input - Project Management Systemtqvinh/Lectures/ESD/ESD-Ch7_2016-p2.pdf · 8 10-bit...
Transcript of 7.3. Analog Input - Project Management Systemtqvinh/Lectures/ESD/ESD-Ch7_2016-p2.pdf · 8 10-bit...
8/9/2016
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ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINHTRƯỜNG ĐẠI HỌC BÁCH KHOA
KHOA ĐIỆN-ĐIỆN TỬ BỘ MÔN KỸ THUẬT ĐIỆN TỬ
Bộ Môn Kỹ Thuật Điện Tử - ĐHBK
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Embedded System Design
Chapter 7: Peripherals for embedded systems
7.1 Digital parallel input / output7.2 LCD interfacing7.3 Analog input /output7.4 Serial communication
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7.3. Analog Input
• Allows an external voltage to be converted to digital form, stored and processed
• This type of input occurs in data loggers, control systems, digital audio and signal processors…
• The PIC microcontrollers is designed specifically for high‐speed analog signal processing
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Analog input with PIC 16 Series
Device Pins Features
16F873A16F876A
28 3 parallel ports,3 counter/timers,2 capture/compare/PWM,2 serial,5 10-bit ADC,2 comparators
16F874A16F877A
40 5 parallel ports,3 counter/timers,2 capture/compare/PWM,2 serial,8 10-bit ADC,2 comparators
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The PIC16F87XA ADC module
Functional blocks for the A/D converter in medium-end PIC microcontrollers. A/D, successive approximation analog-to-digital converter; SHA, sample-and-hold amplifier; AMUX, analog multiplexer.Chapter 7 - p2
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Analog Setup
• The PIC 16F877 has eight analog inputs: RA0, RA1, RA2, RA3, RA5, RE0, RE1, RE2 being renamed AN0 to AN7.
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RA0/AN02
RA1/AN13
RA2/AN2/VREF-4
RA4/T0CKI6
RA5/AN4/SS7
RE0/AN5/RD8
RE1/AN6/WR9
RE2/AN7/CS10
OSC1/CLKIN13
OSC2/CLKOUT14
RC1/T1OSI/CCP216
RC2/CCP117
RC3/SCK/SCL18
RD0/PSP0 19
RD1/PSP1 20
RB7/PGD 40RB6/PGC 39
RB5 38RB4 37
RB3/PGM 36RB2 35RB1 34
RB0/INT 33
RD7/PSP7 30RD6/PSP6 29RD5/PSP5 28RD4/PSP4 27RD3/PSP3 22RD2/PSP2 21
RC7/RX/DT26
RC6/TX/CK25
RC5/SDO24
RC4/SDI/SDA23
RA3/AN3/VREF+5
RC0/T1OSO/T1CKI15
MCLR/Vpp/THV1
U1
PIC16F877Chapter 7 - p2
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CCS C Analog Input Functions
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CCS C Analog Input Functions
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CCS C Analog Input Functions
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Example
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RA0/AN02
RA1/AN13
RA2/AN2/VREF-4
RA4/T0CKI6
RA5/AN4/SS7
RE0/AN5/RD8
RE1/AN6/WR9
RE2/AN7/CS10
OSC1/CLKIN13
OSC2/CLKOUT14
RC1/T1OSI/CCP216
RC2/CCP117
RC3/SCK/SCL 18
RD0/PSP019
RD1/PSP120
RB7/PGD 40RB6/PGC
39RB5
38RB4
37RB3/PGM
36RB2
35RB1
34RB0/INT
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RD7/PSP730
RD6/PSP629
RD5/PSP528
RD4/PSP427
RD3/PSP322
RD2/PSP221
RC7/RX/DT26
RC6/TX/CK25
RC5/SDO24
RC4/SDI/SDA23
RA3/AN3/VREF+5
RC0/T1OSO/T1CKI15
MCLR/Vpp/THV1
U1
PIC16F877
VSS
RXD
VDD
LCD1
MILFORD-2X16-BKP
RV1
1k
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Example
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Voltage measurement
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RA0/AN02
RA1/AN13
RA2/AN2/VREF-4
RA4/T0CKI6
RA5/AN4/SS7
RE0/AN5/RD8
RE1/AN6/WR9
RE2/AN7/CS10
OSC1/CLKIN13
OSC2/CLKOUT14
RC1/T1OSI/CCP216
RC2/CCP1 17
RC3/SCK/SCL 18
RD0/PSP0 19
RD1/PSP120
RB7/PGD 40RB6/PGC
39RB5 38RB4
37RB3/PGM 36
RB235
RB1 34RB0/INT
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RD7/PSP730
RD6/PSP6 29RD5/PSP5
28RD4/PSP4 27RD3/PSP3
22RD2/PSP2 21
RC7/RX/DT 26RC6/TX/CK 25
RC5/SDO 24RC4/SDI/SDA 23
RA3/AN3/VREF+5
RC0/T1OSO/T1CKI 15
MCLR/Vpp/THV1
U1
PIC16F877
VSS
RXD
VDD
LCD1
MILFORD-2X16-BKP
D1
BZX79C2V7
R1680R
RV2
1k
R24k7
RV1
1k
RV3
1k
RV4
1k
RV5
1k
RV6
1k
RV7
1k
RV8
1k
R3
120R
U1(RA3/AN3/VREF+)V=2.55838
RV5(1)V=2.71739
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Voltage measurement
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7.3. Analog Output
a) general DAC hardware b) output voltage
Basic digital to analogue converter
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DAC
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DAC Circuit• Typical application
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Vo 10V
A1
2 A2
4 A8
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Ex: DAC0808 & Serial DAC
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Waveform Generator
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Waveform Generator Source Code (1/3)
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Waveform Generator Source Code (2/3)
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Waveform Generator Source Code (3/3)
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Class Assignment
• Design a system to read temperature data from the sensor LM35, and show the result on LCD
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D7
14D
613
D5
12D
411
D3
10D
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D1
8D
07
E6
RW
5R
S4
VS
S1
VD
D2
VE
E3
LCD1LM016L
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Serial communication
Parallel vs. Serial IO
Serial transmission of binary data consists of sending the bits of a word one by one in a consecutive form and using the same pins.
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simplex vs half‐duplex vs full‐duplex
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Serial Communication
1.PIC16 USART Serial Link
2.PIC16 SPI Serial Bus
3.I2C Serial Bus
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USART
• The universal synchronous/asynchronous receive transmit (USART) device is typically used in asynchronous mode to implement off‐board, one‐to‐one connections.
• The term asynchronous means no separate clock signal is needed to time the data reception, so only a data send, data receive, and ground wires are needed.
• It is quick and simple to implement if a limited data bandwidth is acceptable.
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USART Operation
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USART• RS232 driver
– MAX232
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USART RS232 Signal
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USART with PIC microcontroller• The PIC has a dedicated hardware RS232 port, but CCS C allows any pin to be set up as an RS232 port, providing functions to generate the signals in software.
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(a) Connection between two PICs in asynchronous mode
(b) Synchronous mode connection. CK is the clock pin, output in the master device and input in the slave device
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CCS RS232 Serial Port Functions
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RS232 Periperal Simulation
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The program
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Outline
1.PIC16 UART Serial Link
2.PIC16 SPI Serial Bus
3.I2C Serial Bus
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SPI Bus• The serial peripheral interface (SPI) bus provides high‐speed
synchronous data exchange over relatively short distances (typically within a set of connected boards), using a master/slave system with hardware slave selection
• One processor must act as a master, generating the clock. Others act as slaves, using the master clock for timing the data send and receive.
• The slaves can be other microcontrollers or peripherals with an SPI interface.
• The SPI signals are: – Serial Clock (SCK)
– Serial Data In (SDI)
– Serial Data Out (SDO)
– Slave Select (!SS)
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SPI Bus
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SPI Connection
SPI Signals
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SPI Operation
• To transfer data, the master selects a slave device to talk to, by taking its SS line low.
• Eight data bits are then clocked in or out of the slave SPI shift register to or from the master. No start and stop bits are necessary, and it is much faster than RS232.
• The clock signal runs at the same speed as the master instruction clock, that is, 5MHz when the chip is running at the maximum 20MHz (16 series MCUs).
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SPI Driver Functions
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• SPI Test System Schematic
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Master and slaves source code
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Outline
1.PIC16 UART Serial Link
2.PIC16 SPI Serial Bus
3.I2C Serial Bus
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I2C Bus
• The interintegrated circuit (I2C) bus is designed for short‐range communication between chips in the same system using a software addressing system.
• It requires only two signal wires and operates like a simplified local area network.
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I2C connection
I2C signals
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I2C Bus
• The I2C slave chips are attached to a two‐wire bus, which is pulled up to logic 1 when idle. Passive slave devices have their register or location addresses determined by a combination of external input address code pins and fixed internal decoding.
• As for SPI, the clock is derived from the instruction clock, up to 5MHz at the maximum clock rate of 20MHz.
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I2C Bus
• To send a data byte, the master first sends a control code to set up the transfer, then the 8‐bit or 10‐bit address code, and finally the data. Each byte has a start and acknowledge bit, and each byte must be acknowledged before the next is sent, to improve reliability.
• The sequence to read a single byte requires a total of 5 bytes to complete the process, 3 to set the address, and 2 to return the data
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I2C Functions
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I2C Test System
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RA0/AN02
RA1/AN13
RA2/AN2/VREF-4
RA4/T0CKI6
RA5/AN4/SS7
RE0/AN5/RD8
RE1/AN6/WR9
RE2/AN7/CS10
OSC1/CLKIN13
OSC2/CLKOUT14
RC1/T1OSI/CCP216
RC2/CCP117
RC3/SCK/SCL18
RD0/PSP019
RD1/PSP120
RB7/PGD40
RB6/PGC39
RB538
RB437
RB3/PGM36
RB235
RB134
RB0/INT33
RD7/PSP730
RD6/PSP629
RD5/PSP528
RD4/PSP427
RD3/PSP322
RD2/PSP221
RC7/RX/DT26
RC6/TX/CK25
RC5/SDO24
RC4/SDI/SDA23
RA3/AN3/VREF+5
RC0/T1OSO/T1CKI15
MCLR/Vpp/THV1
U1PIC16F877A
R14k7
R24k7
+5V
I2CSDA
SCL
TRIG
SCK6
SDA5
WP7
A01
A12
A23
U2
24FC256
OFFON12345678
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DSW1
DIPSWC_8
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I2C Test System
45Chapter 7 - p2