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    Embedded development life cycle

    The design of an embedded system implies that both software and hardware are being

    designed in parallel.

    Figure1: embedded design life cycle diagram

    A phase representation of embedded design life cycle

    Time flows from left and proceeds through seven phases:

    Product specification

    Partitioning of design into its software and hardware components

    Iteration and refinement of the partitioning

    Independent hardware and software design tasks

    Integration of the hardware and software components

    Product testing and release

    n!going maintenance upgrading

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    The embedded design process is not as simple as figure1 depicts. A considerable

    amount of iteration and optimi"ation occurs within phases and between phases.#efects

    found in later stages often cause us to $go back%. For e&ample' when product testing

    reveals performance deficiencies that render the design noncompetitive' we might have to

    rewrite algorithms' redesign custom hardware!such as application specific integratedcircuits(A)I*s+ for better performance!speed up the processor' choose a new processor'

    and so on.

    Product specifications:#esign of any system starts at its specifications' specifications uses a language'

    which may be simple ,nglish' some programming languages like *' or it may be some

    formal techni-ues using petri nets' state chart and so on.The choice of the microprocessor and some other key elements of a design are

    important

    Hardware/software partitioning:

    ,mbedded design involve both hardware and software components' we have to

    decide which portion of the problem will be solved in hardware and which in software.

    This choice is called the $partitioning decision.%

    A general purpose processor will have software implementation of the task' while

    a dedicated processor can be implemented on FPA(field programmable gate array+ or

    A)I*(application specific integrated circuit+' to have better performance

    /The partitioning decision is a comple& optimi"ation problem. 0any embedded

    designs are re-uired to be

    Price sensitive

    eading edge performers

    2on standard

    0arket competitive

    Proprietary

    Iteration and implementation:

    The iteration and implementation part of the process represents a somewhat

    blurred area between implementation and hardware3software partitioning in which the

    hardware and software paths diverge. This phase represents the early design work before

    the hardware and software teams built $the wall% between them.

    The hardware designers might be using simulation tools such as architectural

    simulators' to model the performance of the processor and memory systems. The

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    software designers are probably running code bench marks on self!contain single board

    computers that use the target microprocessors.

    Detailed hardware and software design:

    4ardware design involves

    )election of the processor: micro!controller' microprocessor' digital

    signal processor

    *alculation of memory re-uirements and the type of memory such as

    5A0()5A0'#5A0+' ,P50' flash memory

    Identification of input devices such as sensors' keyboard and keypad

    Identification of output devices such as ,#s and *#

    Identification of communication interfaces such as 5)676' ,thernet'

    8)9

    Identification of test points

    Identification of supply voltages and current re-uirements for designing

    the power supply unit.

    )oftware design involves

    orking out of the details of the processing to be done by the embedded

    system

    #ecomposition of the processing into different task

    #eciding on the use of an embedded operating system

    Hardware/Software integration:

    The hardware3software integration phase of the development cycle must have

    special tools and methods to manage the comple&ity. The process of integrating

    embedded software and hardware is e&ercise in debugging and discovery

    #ebugging an embedded system:

    #ebugging an embedded system is similar to debugging a host based

    applications. If the target system contains an available communication channel to the host

    computer' the debugger can e&ist as two pieces: a debug kernel in the target system and a

    host application that communicates with it and manages the source database and symboltables. 0any embedded systems are impossible to debug unless they are operating at full

    speed. 5unning an embedded program under a debugger can slow the program down by

    one or more orders of magnitude.

    In general' there are three re-uirements for debugging an embedded or

    real!time system:

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    5un control! the ability to start' stop' peak' and poke the processor and

    memory.

    0emory substitution! replacing 50!based memory with 5A0 for

    rapid and easy code download' debug' and repair cycles.

    5eal!time analysis! following code flow in real time with real!time trace

    analysis

    Product testing and release:

    Testing is the most difficult and time consuming process and important process.

    $Testing is the process to reduce the risk associated with the residual defects.

    There are different types of testing

    9lack bo& testing: Functionality of the product is tested

    hite bo& testing: each and every line of code is tested

    Performance testing: checks whether the system is meeting the time constraintsas per the

    re-uirements

    Maintenance and upgrading:

    5eliability: The measure of how much percentage the system can rely upon

    theproper functionality of the system.

    0T9F(0ean time between failures+ and 0TT5 (mean time to reapair+ are the

    terms used in defining system reliability

    0aintainability: It deals with support maintenance in case of technical issues andproduct failure.

    As the reliability of the system increases the chances of failure reduces' then the

    maintainability also reduces.

    The ideal value of availability of any embedded system design is

    Ai;0T9F3(0T9F