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The x86 Microprocessor - Lyla B Das 1

MEMORY AND I/O

DECODIN

C!A"TER #

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The x86 Microprocessor - Lyla B Das $

%i&'re #(1) Typical RAM *i+h co,+rol

pi,s

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The x86 Microprocessor - Lyla B Das

Why Active Low Control

Signals?The s+ray capaci+a,ces o. +he co,+rol pi,s ca,

&e+ char&e .ro0 ,oise ol+a&es2 a, +his 0ayca'se +he si&,als +o cross +he +hreshol o.3hi&h4 leel as e5,e .or TTL

Th's2 i. +he co,+rol si&,als are ac+ie hi&h2 i+0ay ca'se *ro,& +ri&&eri,&

O, +he o+her ha,2 a, active low signal+ri&&er *ill happe, o,ly *he, +he li,e is p'llelo* eliera+ely y +he co,+roller

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Example 7.1

!o* 0a,y aress a, a+a li,es are ,eee.or +he 0e0ory chips *i+h +he .ollo*i,&or&a,ia+io,9

i: $;6 < 7

ii: ;1$ < 8

iii: 1= < 16

i: $ = < 8

: 1$8 = < 8

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The x86 Microprocessor - Lyla B Das ;

Exa0ple #(1 > ?ol'+io,

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Memory Address ecodingExa0ple #(1i: %i, o'+ +he ra,&e o. aresses +ha+ +he

0e0ory chip i, %i& #($ co,+ai,sii: Repea+ +he sa0e *he, +he lo&ic o. +he NAND

&a+e is cha,&e as i, %i& #(

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The x86 Microprocessor - Lyla B Das #

%i&'re #($) Me0ory *i+h aress

ecoi,&

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%i&'re #() NAND &a+e ecoer

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The x86 Microprocessor - Lyla B Das @

Exa0ple #($ >?ol'+io,The lo*er a, 'pper ra,&e o. +he aressesi, +he chip are see, as i, +he 5&'re elo*(

The aress ra,&e o. +he chip is %%8! +o

%%%%%! i(e(2 $78 y+es i(e(2 $ = y+es(

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Exa0ple #($ > Co,+((

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Address ecoding ConceptsThe asic iea o. aress ecoi,& is +o

ecoe +he ex+ra ','se aress li,es o. +heprocessor +o speci.y +he aress ra,&e

he, 0ore chips are +o e i,+er.ace2 ecoe+he ex+ra aress li,es +o a iere,+ ra,&e .oreach &ro'p

A,y lo&ic/lo&ic &a+e ca, e 'se +o per.or0aress ecoi,&

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The x86 Microprocessor - Lyla B Das 1$

Aress ecoi,& co,cep+s >

Co,+(I, &e,eral2 aress ecoers ca, e 'il+

'si,&

Ra,o0 lo&ic si0ple &a+es:BlocF ecoers e(&( $ < 72 < 8 G:

"ro&ra00ale lo&ic "LAs2 C"LDs2 %"As G:

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Example 7.!

Desi&, a, aress ecoer 'si,& OR lo&ic .ora $ = < 8 RAM( %i, +he aress space o. +his0e0ory chip(

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Exa0ple #( >?ol'+io,

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The x86 Microprocessor - Lyla B Das 1;

Exa0ple #( > ?ol'+io,

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Exa0ple #(7%i, +he aress space o. +he .ollo*i,& chips

*i+h +he aress ecoi,& circ'i+ry as sho*,i, +he %i& #(;a a, #(;(

i: 8 = < 8 E"ROM

ii: 8 = < 8 RAM

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The x86 Microprocessor - Lyla B Das 1#

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The x86 Microprocessor - Lyla B Das 1@

Address ecoding "sing #loc$

ecodersA ery pop'lar ecoer is +he +o 8 ecoer

#7L?18: The o'+p'+ li,es are ac+ie lo* a,epe,i,& o, +he selec+io, i,p'+s2 o,e o'+p'+li,e alo,e *ill e ac+ie

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%i&'re #(6a) %',c+io,al locF ia&ra0

o. +he +o 8 ecoer #7L?18

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The x86 Microprocessor - Lyla B Das $1

%i&'re #(6) Decoi,& +ale o.

#7L?18

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The x86 Microprocessor - Lyla B Das $$

%i&'re #(#) Aress ecoi,& o. a RAM

'si,& a locF ecoer

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Exa0ple #(;

The 5&'re sho*s a RAM a, a ROM co,,ec+e+o a, aress ecoer2 *hich is a +o 8ecoer( %i, +he aress space o. each o.+hese chips

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%i&'re #(8) Aress ecoi,& o. a RAM

a, ROM 'si,& a +o 8 ecoer

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The x86 Microprocessor - Lyla B Das $;

Exa0ple #(; > ?ol'+io,O,ly 7 li,es o. +he aress 's are +o e 'se .or

aress ecoi,&2 as +he re0ai,i,& 16 li,es are+o e co,,ec+e +o each o. +he 67 = 0e0ory chips

%or +he ROM2 A1@ +o A16 are +o e 11 A1@ H 12CBA H 1:

Th's2 +he aress ra,&e o. +his chip is @! +o@%%%%!

?i0ilarly2 .or +he RAM2 A1@ +o A16 are +o e 11A@ H 12 CBA H 1:( Th 's2 +he aress ra,&e o.+his chip is C! +o C%%%%!

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%artial Address ecodinge 5, +ha+ i, all o'r isc'ssio,s so .ar2 +he

aresses &e,era+e are ',iJ'e a, crea+e,o a0i&'i+y( This is also calle exha's+ieecoi,&( !o*eer2 so0e+i0es +o re'ce +hehar*are 'se2 o,ly so0e o. +he 'pperaress li,es are 'se .or ecoi,& a, +his iscalle par+ial aress ecoi,&

The prole0 is +ha+ i+ crea+es &old'ac$memory

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Exa0ple #(6Dra* a ecoi,& circ'i+ 'si,& par+ial ecoi,&

.or a RAM a, E"ROM each o. sie 8 = < 8

%or ecoi,&2 'se o,ly +he aress li,es A1a, A17( ha+ is +he sie o. i+s .olacF0e0ory9

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The x86 Microprocessor - Lyla B Das $@

%i&'re #(1) "ar+ial aress

ecoi,& 'si,& +*o aress li,es

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Memory #an$s886 has a 16-i+ 0e0ory 's > *hich 0ea,s

+ha+ a+a +ra,s.er ca, occ'r a+ a 0axi0'0ra+e o. 16 i+s o,e *or: per 's cycle

B'+ y+e +ra,s.er a, *or +ra,s.er 0's+ epossile

%or a *or +ra,s.er2 +*o y+e loca+io,s 0's+

e accesse

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%i&'re #(11) 16-i+ 0e0ory realie

'si,& +*o 8-i+ 0e0ory chips

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Kpper a, lo*er a,FsA 16-i+ *or is o+ai,e as +he co,ca+e,a+io, o.

+*o y+es i, +*o 30e0ory a,Fs4 i(e(2 0e0ory isor&a,ie as +*o a,Fs

O,e2 +he 'pper a,F or hi&h a,F *i+h +he a+acorrespo,i,& +o +he 'pper y+e D8 > D1;2 +heo+her2 +he lo*er a,F or lo* a,F *hich has +hea+a li,es D > D#

The 'pper a,F is also calle +he o 0e0orya,F2 eca'se i+ has +he o aresses 0appe+o i+

The lo*er a,F is calle +he ee, a,F

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%i&'re #(1$) Me0ory a,Fs o. 886

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Me0ory a,F access%or accessi,& a y+e2

I. +he aress is o2 +he ac+ie lo* B!Esi&,al *ill e ac+ia+e

I. +he aress is ee,2 +he AAli,e o. +hearess is lo*

%or *or access2 o+h +he a,Fs ,ee +o eac+ia+e

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Tale #(1) ?+a+'s o. Co,+rol ?i&,als .or

Me0ory Ba,F Access

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The x86 Microprocessor - Lyla B Das #

%i&'re #(1) Me0ory a,Fs *i+h +herespec+ie a,F e,ales si&,als2 alo,& *i+h+he ecoer

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(dd Addresses Word

%or accessi,& a *or *hose aress is o2 +*o 0achi,ecycles are expe,e

To aoi +his2 +he EEN irec+ie ca, e 'se +o ali&, all

0e0ory accesses a+ ee, aresses.A)A

*"MS # 7 "%+,-

E/E* 0increments location conter to,,,2

W3 W 4!5-6!o*eer2 +his oio'sly *as+es o,e y+e space2 a,

0e0ory is .ra&0e,+e

This si+'a+io, ca,,o+ e aoie i. spee is +o e op+i0ie

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The x86 Microprocessor - Lyla B Das @

Why Memory #an$s?ha+ is +he prole0 i. o+h +he a,Fs are e,ale .or a,y

a, eery access9

The a,s*er is +ha+ +here *ill ,o+ e a,y prole0 i, case o.

a rea opera+io,2 '+ i+ 0ay ca'se haoc .or a *ri+eopera+io,

I. o+h a,Fs are e,ale o, a y+e *ri+e opera+io,2',*a,+e a+a o, +he a+a li,es *ill &e+ *ri++e, o,+o +hee,ale loca+io, i, +he o+her a,F2 *hich is ,o+ a0issile

)hs when a 8'yte9 alone is to 'e written intomemory it is

important to ensre that only one o& the memory'an$s is ena'led

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"sing Separate Write Stro'esA,o+her approach is 'se +o e,ale 0e0ory

a,Fs2 a, i+ is y &e,era+i,& separa+e *ri+es+roes

No* +ha+ +he prole0 has ee, ie,+i5e +oe associa+e *i+h 3*ri+i,&42 +here is a,o+her*ay +o sole i+2 a, i+ is y &e,era+i,&separa+e *ri+e s+roes

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%i&'re #(17) Ksi,& separa+e *ri+e

s+roes

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The x86 Microprocessor - Lyla B Das 7$

Tale #($) IBM "C Me0ory Map

d

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:;( Address ecodingO,ly I/O 0appe I/O i(e2 peripheral I/O *ill e

isc'sse

Ee, +ho'&h o'r processor has $ i+s .oraress2 I/O 'ses o,ly 16 i+s

Th's I/O por+ aresses ca, ra,&e .ro0 +o %%%%! a, +he +o+al I/O space is o,ly 67 =

i(e(2 *e ca, 'se 6;2;6 iere,+ I/O aresses!o*eer2 si,ce +he i,s+r'c+io,s .or i,p'+ IN:

a, o'+p'+ OKT: are separa+e2 *e ca, hae67 = i,p'+ por+s a, 67 = o'+p'+ por+s

d

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%i&'re #(16) ?che0es o. por+

aressi,&

d

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The x86 Microprocessor - Lyla B Das 7;

(tpt %orts

O'+p'+ por+s 'se +he i,s+r'c+io, 3OKT4 .or*ri+i,& i,+o i+

Da+a .ro0 +he processor is se,+ +o a, o'+p'+por+ 'ri,& +he I/O *ri+e cycle

This a+a *ill e aailale o, +he a+a 'so,ly ',+il +he e, o. a 0achi,e cycle

%or +he o'+p'+ por+ +o e ale +o 'se +his a+a2i+ 0's+ e la+che

Th's2 a la+ch is 0a,a+ory .or a, o'+p'+ por+se+ 'p

d

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3e

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The x86 Microprocessor - Lyla B Das 7#

%i&'re #(1#) Basic o'+p'+ por+ se+'p

d

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Exa0ple #(#Desi&, a sys+e0 *i+h 8 LEDs co,,ec+e +o +he

lo*er 8 i+s o. +he a+a 's o. +he 886 a+a's

The LEDs 0's+ s*i+ch ON a, O%% *i+h aelay o. 1 seco, e+*ee, each s*i+chi,&ac+io,

d

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The x86 Microprocessor - Lyla B Das 7@

Exa0ple #(# > ?ol'+io,

d

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%i&'re #(18) O'+p'+ por+ *i+h 8 LEDs

i,+er.ace +o i+

td

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The x86 Microprocessor - Lyla B Das ;1

:npt %ortsI,p'+ por+s 'se +he IN i,s+r'c+io, +o receie

a+a i,+o +he processor i, +he acc'0'la+or o.+he processor AL or A:

A, i,p'+ por+ reJ'ires a +ri-s+a+e 'er alo,&*i+h i+ +o e,s're +ha+ i+ is isola+e .ro0 +he's *he, i+ is ,o+ selec+e

td

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The x86 Microprocessor - Lyla B Das ;$

3e

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%i&'re #(1@) Basic i,p'+ por+

td

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%i&'re #($) %',c+io,al pi, ia&ra0 o.

+he oc+al +ri-s+a+e 'er #7L?$77

td

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The x86 Microprocessor - Lyla B Das ;;

Exa0ple #(8%i, +he aresses o. +he +*o i,p'+ eices

sho*, i, %i&'re #($1 a, *ri+e a pro&ra0 +orea a+a .ro0 each o. +hese por+s2 a, 0oe

i+ +o so0e o+her re&is+ers

Ltd

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%i&'re #($1) T*o se+s o. s*i+ches ac+i,&

as +*o 8-i+ i,p'+ por+s

Ltd

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The x86 Microprocessor - Lyla B Das ;#

Exa0ple #(8 > ?ol'+io,i: T*o se+s o. 8 s*i+ches ? +o ?# are co,,ec+e +o +he

a+a 's +hro'&h +*o +ri-s+a+e 'ers a, +his se+'p.',c+io,s as +*o i,p'+ por+s

ii: The aress o. +he por+s are 8-i+2 as o,ly aressli,es A +o A# hae ee, co,siere .or ecoi,&( Thearess o. +he 5rs+ por+ is #E! a, +ha+ o. +he seco,is E!(

iii: The aress o, +he aress 's ecies *hich o. +hei,p'+ por+s &e+ selec+e( The +ri-s+a+e 'er e,s'res+ha+ +he por+ *hich is ,o+ selec+e2 is isola+e .ro0 +he's

Ltd

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Exa0ple #(8 > ?ol'+io, > Co,+(i: The pro&ra0 .or i,p'++i,& a+a .ro0 each o.

+hese por+s is

?TRT IN AL2 E!

MO BL2 AL

IN AL2 #E!

MO DL2 AL

Th's2 a.+er reai,& o+h por+s2 +he s*i+chse++i,&s are aailale i, BL a, CL( This a+aca, e 'se .or processi,& a,/or isplay

Ltd

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The x86 Microprocessor - Lyla B Das ;@

ecoding 1=>#it :;( Addresses

Aress li,es A +o A1; sho'l e 'se y+he aress ecoer +o &e,era+e +he eiceselec+ p'lse

The o+her poi,+ +o re0e0er is +o 'se3ariale por+ aressi,&4 *he, *ri+i,& I/Oi,s+r'c+io,s .or por+s *i+h 16-i+ aresses

Ltd

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%orts with 1=>#it ata #s!o*eer2 16-i+ a+a 's is also possile .or I/O

por+s

ha+ eco0es iere,+ +he,9

The a,s*er is +ha+2 +he si+'a+io, is si0ilar +o +hecase o. 0e0ory a,Fs

Recollec+ +he co,cep+ o. 0e0ory a,Fs

I. each o. +he 16-i+ por+s are +o e accesse as

+*o 8-i+ por+s as *ell2 *e ,ee +o hae 8-i+ I/Oa,Fs

?o *e ca, hae I/O a,Fs +oo2 *i+h 8 i+s i, +he'pper a,F a, 8 i+s i, +he lo*er a,F

Ltd

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%i&'re #($$) I/O a,Fs

4615-4718_Chapter 7

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Transcript of 4615-4718_Chapter 7