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Semiconductor Components Industries, LLC, 2002 September, 2002 – Rev. 1 1 Publication Order Number: AN983/D AN983/D A Simplified Power Supply Design Using the TL494 Control Circuit Prepared by: Jade H. Alberkrack ON Semiconductor Bipolar IC Division This bulletin describes the operation and characteristics of the TL494 SWITCHMODEt Voltage Regulator and shows its application in a 400–watt off–line power supply. The TL494 is a fixed–frequency pulse width modulation control circuit, incorporating the primary building blocks required for the control of a switching power supply. (See Figure 1). An internal linear sawtooth oscillator is frequency–programmable by two external components, R T and C T . The oscillator frequency is determined by: f osc ^ 1.1 R T @ C T Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor C T to either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flip–flop clock–input line is in low state. This happens only during that portion of time when the sawtooth voltage is greater than the control signals. Therefore, an increase in control–signal amplitude causes a corresponding linear decrease of output pulse width. (Refer to the timing diagram shown in Figure 2). The control signals are external inputs that can be fed into the dead–time control (Figure 1, Pin 4), the error amplifier inputs (Pins 1, 2, 15, 16), or the feedback input (Pin 3). The dead–time control comparator has an effective 120 mV input offset which limits the minimum output dead time to approximately the first 4% of the sawtooth–cycle time. This would result in a maximum duty cycle of 96% with the output mode control (Pin 13) grounded, and 48% with it connected to the reference line. Additional dead time may be imposed on the output by setting the dead–time control input to a fixed voltage, ranging between 0 to 3.3 V. Figure 1. TL494 Block Diagram 6 5 4 Dead–Time Control Oscillator 0–12 V 0.7 V 0.6 mA + 1 + + + 2 Q CK 13 Reference Q1 Q2 8 9 11 10 12 V CC 1 2 3 15 16 14 7 Feedback/P.W.M. Comparator Input Flip–Flop Output Mode Control Dead–Time Comparator P.W.M. Comparator Q Error Amplifier R T C T V CC Gnd V ref 5.0 V E2 C2 E1 C1 This document may contain references to devices which are no longer offered. Please contact your ON Semiconductor representative for information on possible replacement devices. APPLICATION NOTE http://onsemi.com

Transcript of 400w psu tl494

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Semiconductor Components Industries, LLC, 2002

September, 2002 – Rev. 11 Publication Order Number:

AN983/D

AN983/D

A Simplified Power SupplyDesign Using the TL494Control Circuit

Prepared by: Jade H. AlberkrackON SemiconductorBipolar IC Division

This bulletin describes the operation and characteristics ofthe TL494 SWITCHMODE� Voltage Regulator and showsits application in a 400–watt off–line power supply.

The TL494 is a fixed–frequency pulse width modulationcontrol circuit, incorporating the primary building blocksrequired for the control of a switching power supply. (SeeFigure 1). An internal linear sawtooth oscillator isfrequency–programmable by two external components, RTand CT. The oscillator frequency is determined by:

fosc �1.1

RT � CTOutput pulse width modulation is accomplished by

comparison of the positive sawtooth waveform acrosscapacitor CT to either of two control signals. The NOR gates,which drive output transistors Q1 and Q2, are enabled onlywhen the flip–flop clock–input line is in low state. This

happens only during that portion of time when the sawtoothvoltage is greater than the control signals. Therefore, anincrease in control–signal amplitude causes a correspondinglinear decrease of output pulse width. (Refer to the timingdiagram shown in Figure 2).

The control signals are external inputs that can be fed intothe dead–time control (Figure 1, Pin 4), the error amplifierinputs (Pins 1, 2, 15, 16), or the feedback input (Pin 3). Thedead–time control comparator has an effective 120 mVinput offset which limits the minimum output dead time toapproximately the first 4% of the sawtooth–cycle time. Thiswould result in a maximum duty cycle of 96% with theoutput mode control (Pin 13) grounded, and 48% with itconnected to the reference line. Additional dead time may beimposed on the output by setting the dead–time control inputto a fixed voltage, ranging between 0 to 3.3 V.

Figure 1. TL494 Block Diagram

6

5

4

Dead–TimeControl

Oscillator

0–12 V

0.7 V

0.6 mA

+1

+

+

+2–

Q

CK

13

Reference

Q1

Q2

8

9

11

10

12

VCC

1 2 3 15 16 147

Feedback/P.W.M.Comparator Input

Flip–Flop

Output Mode Control

Dead–TimeComparator

P.W.M.Comparator

Q

Error Amplifier

RT

CT

VCC

Gnd

Vref

5.0 V

E2

C2

E1

C1

This document may contain references to devices which are nolonger offered. Please contact your ON Semiconductorrepresentative for information on possible replacement devices.

APPLICATION NOTE

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Figure 2. TL494 Timing Diagram

Capacitor CT

Feedback/P.W.M. Comp.(Pin 3)

Dead–Time Comp. (Pin 4)

Flip–FlopClock Input

Flip–FlopQ

Flip–FlopQ

Output Q1Emitter (Pin 9)

Output Q2Emitter (Pin 10)

Output ModeControl (Pin 13)

The pulse width modulator comparator provides a meansfor the error amplifiers to adjust the output pulse width fromthe maximum percent on–time, established by thedead–time control input, down to zero, as the voltage at thefeedback pin varies from 0.5 to 3.5 V. Both error amplifiershave a common mode input range from –0.3 V to (VCC –2 V), and may be used to sense power supply output voltageand current. The error amplifier outputs are active high andare ORed together at the inverting input of the pulse widthmodulator comparator. With this configuration, theamplifier that demands minimum output on time, dominatescontrol of the loop.

When capacitor CT is discharged, a positive pulse isgenerated on the output of the dead–time comparator, whichclocks the pulse steering flip–flop and inhibits the outputtransistors, Q1 and Q2. With the output mode controlconnected to the reference line, the pulse–steering flip–flopdirects the modulated pulses to each of the two outputtransistors alternately for push–pull operation. The outputfrequency is equal to half that of the oscillator. Output drivecan also be taken from Q1 or Q2, when single–endedoperation with a maximum on–time of less than 50% isrequired. This is desirable when the output transformer hasa ringback winding with a catch diode used for snubbing.When higher output drive currents are required forsingle–ended operation, Q1 and Q2 may be connected inparallel, and the output mode control pin must be tied toground to disable the flip–flop. The output frequency willnow be equal to that of the oscillator.

The TL494 has an internal 5 V reference capable ofsourcing up to 10 mA of load currents for external biascircuits. The reference has an internal accuracy of ±5% with

a thermal drift of less than 50 mV over an operatingtemperature range of 0 to 70°C.

APPLICATION OF THE TL494 IN A400 OFF–LINE POWER SUPPLY

A 5 V, 80 A line operated 25 kHz switching power supply,designed around the TL494, is shown in Figure 3, and theperformance data is shown in Table 1. A brief explanationof each section of the power supply is as follows:

AC Input SectionThe operating ac line voltage is selectable for nominal of

115 or 230 volts by moving the jumper links to theirappropriate positions. The input circuit is a full wave voltagedoubler when connected for 115 VAC operation with bothhalves of the bridge connected in parallel for added line–surgecapability. When connected for 230 VAC operation, the inputcircuit forms a standard full wave bridge.

The line voltage tolerance for proper operation is –10,+20% of nominal. The ac line inrush current, during powerup, is limited by resistor R1. It is shorted out of the circuit bytriac Q1, only after capacitors C1 and C2 are fully charged,and the high frequency output transformer T1, commencesoperation.

Power SectionThe high frequency output transformer is driven in a

half–bridge configuration by transistors Q3 and Q5. Eachtransistor is protected from inductive turn–off voltagetransients by an R–C snubber and a fast recovery clamprectifier. Transistors Q2 and Q4 provide turn–off drive to Q3and Q5, respectively. In order to describe the operation ofQ2, consider that Q6 and Q3 are turned on. Energy is

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coupled from the primary to the secondary of T3, forwardbiasing the base–emitter of Q3, and charging C3 throughCR1. Resistor R3 provides a dc path for the ‘on’ drive afterC3 is fully charged. Note that the emitter–base of Q2 isreverse biased during this time. Turn–off drive to Q3commences during the dead–time period, when both Q6 andQ7 are off. During this time, capacitor C3 will forward biasthe base–emitter of Q2 through R3 and R2 causing it to turnon. The base–emitter of Q3 will now be reverse biased by thecharge stored in C3 coupled through the collector–emitter ofQ2.

Output SectionThe ac voltage present at the secondaries of T1 is rectified

by four MBR 6035 Schottky devices connected in a fullwave center tapped configuration. Each device is protectedfrom excessive switching voltage spikes by an R–C snubber,and output current sharing is aided by having separatesecondary windings. Output current limit protection isachieved by incorporating a current sense transformer T4.The out–of–phase secondary halves of T1 are crossconnected through the core of T4, forming a 1–turn primary.The 50 kHz output is filtered by inductor L1, and capacitorC4. Resistor R4 is used to guarantee that the power supplywill have a minimum output load current of 1 ampere. Thisprevents the output transistors Q3 and/or Q5 from cycleskipping, as the required on–time to maintain regulation intoan open circuit load is less than that of the devices storagetime. Transformer T5 is used to reduce output switchingspikes by providing common mode noise rejection, and itsuse is optional.

The MC3423, U1, is used to sense an overvoltagecondition at the output, and will trigger the crowbar SCR,Q8. The trip voltage is centered at 6.4 V with a programmeddelay of 40 �s. In the event that a fault condition has causedthe crowbar to fire, a signal is sent to the control section viajumper ‘A’ or ‘B.’ This signal is needed to shut down the

output, which will prevent the crowbar SCR fromdestruction due to over dissipation. Automatic over voltagereset is achieved by connecting jumper ‘A’. The controlsection will cycle the power supply output every 2 secondsuntil the fault has cleared. If jumper ‘B’ is connected, SCRQ12 will inhibit the output until the ac line is disconnected.

Low Voltage Supply SectionA low current internal power supply is used to keep the

control circuitry active and independent from externalloading of the output section. Transformer T2, Q9 and CR2form a simple 14.3 V series pass regulator.

Control SectionThe TL494 provides the pulse width modulation control

for the power supply. The minimum output dead–time is setto approximately 4% by grounding Pin 4 through R5. Thesoft start is controlled by C5 and R5. Transistor Q11 is usedto discharge C5 and to inhibit the operation of the powersupply if a low ac line voltage condition is sensed indirectlyby Q10, or the output inhibit line is grounded.

Error amplifier 1 and 2 are used for output voltage andcurrent–level sensing, respectively. The inverting inputs ofboth amplifiers are connected together to a 2.5 V referencederived from Pin 14. By connecting the two inputs together,only one R–C feedback network is needed to set the voltagegain and roll off characteristics for both amplifiers. Remoteoutput voltage sensing capability is provided, and the supplywill compensate for a combined total of 0.5 V drop in thepower busses to the load. The secondary of the outputcurrent sense transformer T4, is terminated into 36 � andpeak detected by BR1 and C6. The current limit adjust is setfor a maximum output current of 85 amperes.

The oscillator frequency is set to 50 kHz by the timingcomponents RT and CT. This results in a 25 kHz two phaseoutput drive signal, when the output mode (Pin 13) isconnected to the reference output (Pin 14).

Table 1. 400 Watt Switcher Performance Data

Conditions

Test Input Output Results

Line Regulation 103.5 to 138 Vac 5 Volts and 80 Amps 8 mV 0.16%

Load Regulation 115 Vac 5 Volts, 0 to 80 Amps 20 mV 0.4%

Output Ripple 115 Vac 5 Volts and 80 Amps P.A.R.D. 50 mV P–P

Efficiency 115 Vac 5 Volts and 80 Amps 73%

Line Inrush Current 115 Vac 5 Volts and 80 Amps 24 Amps Peak

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Figure 3. 400 Watt Switchmode Power Supply

AC

INP

UT

SE

CT

ION

LOW

VO

LTA

GE

SU

PP

LY S

EC

TIO

N

PO

WE

R S

EC

TIO

N

Q1

T1

10 k

200

10 k

5 W 5 WC1

2400200 V

C2

2400 200 V

MDA2504

WhiteGreenBlack

120

1/2 W

10/5 A

3 AG

R.F.I. FilterCDE

APF520CL

MAC15–6

6–810 WR1

100

5 W

100

5 W

0.001

1 kV0.001

1 kV

1N49361N4936

4 200 V4 200 V

TIP31Q2

TIP31Q4

MJ1

3015

MJ1

3015

Q3 Q5

1N49

33 1N49

333333R2

33010 V

33010 V

++

53 W

5 V SEN5 V 80 A 5 V SEN RTN 5 V RTNOutput

10

1/2 W

10

1/2 W

1N4001

2200 10 V

7.5 k 5.1 k

Inhibit

MC3423U1

7543

8

1

+

50 V

0.0033

MB

R60

35

MB

R60

35

OU

TP

UT

SE

CT

ION

0.05

0.05

10 101/2

W

1/2

W

MB

R60

35

MB

R60

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0.05

0.05

1010 1/2

W

1/2

W

1

L1

4.7 10 W

R4

T5

50 V1+

330

1 k 1 k

+ C446000 10 V

33C 35 U

0.01

Q8

MCR100.3 Q12

‘A’

‘B’

T4

115

230

115

230

115

T2 +35 V2200

1N4744390 1 W

Q9TIP31

MDA100 A

+16 V1000

5.1 k

5601.5 k 2.2 k

1N4933

1N4933

560

TIP32Q6

Q7TIP32

MPSA 70Q10

14.7 k

10

1N4001

+16 V330

1N40018.2 k 0.001

50 V

MPSA 55

Q11

TL494U2

OutputVoltage Adj.

8.2 k 4.7 k

361 W BR1

5 k

10 Turn

25 k

10 Turn

0.001

50 V

0.001

50 V

33 k18 k 1N4001

C6+16 V22

CT

RT0.00316 5 6

1

3

15

2

14

13

10

9

7

8

12

11 4

18 k

R5

0.1

10 k 10 k

8.2 k

0.01

50 V 1 M

EG

4750 VC5

All Capacitors in �FAll Resistors in Ohms 1/4 Watt

(unless otherwise noted)

Cur

rent

Lim

it A

dj. S

et fo

r 85

AC

ON

TR

OL

SE

CT

ION

T3

Vm 25

R35

3 W

C3

CR1

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Transformer Data

T1 Core:Bobbin:Windings:

Ferroxcube EC 70–3C8, 0.002″ gap in each legFerroxcube 70PTBPrimary (Q3, Q5):Primary (Q1):Secondary, 4 each:Shield, 2 each:

50 turns total, #17 AWG Split wound about secondary.4 turns, #17 AWG.3 turns, #14 AWG Quad Filar wound.Made from soft alloy copper 0.002″ thick.

T2 Core:Bobbin:Windings:

Allegheny Ludlum EI–75–M6, 29 gaugeBobbin Cosmo EI 75Primary, 2 each:Secondary:

1000 turns, #36 AWG.200 turns, #24 AWG.

T3 Core:Windings:

Ferroxcube 846 T250–3C8Primary, 2 each:Secondary, 2 each:

30 turns, #30 AWG Bifilar wound.12 turns, #20 AWG Bifilar wound.

T4 Core:Windings:

Magnetics Inc. 55059–A2Primary, 2 each:Secondary:

1 turn, #14 AWG Quad Filar wound. Taken from secondary to T1.500 turns, #30 AWG.

T5 Core:Windings:

Magnetics Inc. 55071–A2Primary:Secondary:

4 turns, #16 AWG Hex Filar wound.4 turns, #16 AWG Hex Filar wound.

L1 Core:Windings:

TDK H7C2 DR 56 x 355 turns, soft alloy copper strap, 0.9″ wide x 0.020″ thick, 6 �H.

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Notes

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Notes

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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to makechanges without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for anyparticular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and allliability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/orspecifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must bevalidated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or deathmay occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLCand its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney feesarising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges thatSCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

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For additional information, please contact your localSales Representative.

AN983/D

SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.

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