4-bit Carry Save Adder S 4-bit CSA-CLA wi i · 2005. 11. 28. · 1 3BA5, 13th Lecture, M....
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3BA5, 13 th Lecture, M. Manzke,Page: 1 4-bit Carry Save Adder ∑ = = k i i w S 1 3BA5, 13 th Lecture, M. Manzke,Page: 2 4-bit CSA-CLA ∑ = = k i i w S 1 3BA5, 13 th Lecture, M. Manzke,Page: 3 Multiplication Multiplication of an m-bit number X by and n-bit number Y M> N To yield Z=X•Y with m+n bits This may be accomplished by forming n partial products P i where: P i = Y i • X This requires m AND gates 3BA5, 13 th Lecture, M. Manzke,Page: 4 4-Bit Partial Products Z = P 0 +2 • P 1 +2 2 • P 2 + 2 3 • P 3 X 3 X 2 X 1 X 0 * Y 3 Y 2 Y 1 Y 0 __________________________________________________ 0 0 0 0 X 3 Y 0 X 2 Y 0 X 1 Y 0 X 0 Y 0 → P 0 0 0 0 X 3 Y 1 X 2 Y 1 X 1 Y 1 X 0 Y 1 0 → P 1 0 0 X 3 Y 2 X 2 Y 2 X 1 Y 2 X 0 Y 2 0 0 → P 2 0 X 3 Y 3 X 2 Y 3 X 1 Y 3 X 0 Y 3 0 0 0 → P 3
Transcript of 4-bit Carry Save Adder S 4-bit CSA-CLA wi i · 2005. 11. 28. · 1 3BA5, 13th Lecture, M....
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3BA5, 13th Lecture, M. Manzke,Page: 1
4-bit Carry Save Adder ∑=
=k
iiwS
1
3BA5, 13th Lecture, M. Manzke,Page: 2
4-bit CSA-CLA ∑=
=k
iiwS
1
3BA5, 13th Lecture, M. Manzke,Page: 3
Multiplication
Multiplication of an m-bit number X by and n-bit number Y
M> NTo yield Z=X•Y with m+n bitsThis may be accomplished by forming n partial
products Pi where:
Pi = Yi • X
This requires m AND gates3BA5, 13th Lecture, M. Manzke,Page: 4
4-Bit Partial ProductsZ = P0 + 2 • P1 + 22 • P2 + 23 • P3
X3 X2 X1 X0* Y3 Y2 Y1 Y0
__________________________________________________0 0 0 0 X3Y0 X2Y0 X1Y0 X0Y0 → P00 0 0 X3Y1 X2Y1 X1Y1 X0Y1 0 → P10 0 X3Y2 X2Y2 X1Y2 X0Y2 0 0 → P20 X3Y3 X2Y3 X1Y3 X0Y3 0 0 0 → P3
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Partial Products
We then weight each Pi with 2i and sum them:
Z = P0 + 2 • P1 + 22 • P2 +…+ 2n-1 • Pn-1
For example if m=56 and n=8 we use a Wallace tree of six CSAs to reduce 8 partial products to 2 which are complited by a single Carry Lookahead Adder.
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Wallace Tree Multiplier
The CSA range from 58-63 bits wide.
The CLA is 64 bits wide
CSA 1 CSA 2
CSA 3 CSA 4
CSA 5
CSA 6
X Register
Y
Y0
Y1
Y7
8 X 56 AND Array
X0X1X55
P0P1P2P3P4P5P6P7
CLA
Z
←1←2←3←4←5←6←7
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Shift and Add Multiplication
← P0← P1×21
← P2×22
← P3×23
← P4×24
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Hardware Multiplication
a. Overflow temporarily occurred
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Binary Multiplier Diagram
3BA5, 13th Lecture, M. Manzke,Page: 10
Booth’s Algorithm
This effectively halves the number of partial products in a multiplication.
Principle:Z = X* Y
k jX = 00111…100X = 2k+1 - 2j
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Booth’s Algorithmk-j+1
P1 = 2k+1 * YP2 = -2j * YZ = P1 + P2
We may replace the k-j+1 non-zero partial products with just two:
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Booth’s AlgorithmWorst case
Worst case = 01010101010101
Of course in general a multiplier will have more than one such sequence of consecutive ONES.
The most extrem case is that of alternating zero and one.
Resulting in n/2
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Booth’s AlgorithmSequences of three bits
Xi+1, Xi, Xi-1Bits examined Previously Examined Bit
Thus to deted and generate all the appropriate partial products we examine averlapping sequences of three bits:
