© IMEC 2011

3D STACKED IMAGERS

COLLABORATION: IMEC, KULEUVEN, B-PHOT (VUB),

HOGESCHOOL GENT

© IMEC 2011

ARCHITECTURE STUDY

IMEC

© IMEC 2011 BERT GEELEN 3

APPLICATION SELECTION

High Dynamic Range

Low-light Conditions

Signal processing

power

Face detection Security applications

Automotive

Automotive pedestrian detection

Automotive pedestrian detection was selected to allow demonstration of huge

design flexibility of smart 3D stacked sensors

Micro-Optics

Photodiode

ROIC

DSP

Wide FOV High Speed

© IMEC 2011

WP2: Optical Subsystems & Micro-lenses

WP3: Advanced Pixel Technologies

WP4: Pixel Read Out & ADC

WP5: Vision Processing

WP1:

Syste

m D

esig

n &

Arc

hitectu

re

Tra

de-O

ffs

WP6:

Pro

of

of

Concept

WP2: Optical Subsystems & Micro-lenses

WP3: Advanced Pixel Technologies

WP4: Pixel Read Out & ADC

WP5: Vision Processing

WP1:

Syste

m D

esig

n &

Arc

hitectu

re

Tra

de-O

ffs

WP6:

Pro

of

of

Concept

4

INTERACTIONS WITH OTHER WORK PACKAGES

Low-light

Wide FOV

High dynamic range

Face Detection

• Streamline interaction between WP’s toward common

automotive pedestrian detection demonstrator

• Follow application-specific technology pull approach

© IMEC 2011

PARTITIONING OF IMAGE PROCESSING

GEELEN BERT 5

Optics

Sensing

ROIC

DSP

Distribute functionality over layers • What can be added to the digital ROIC tier?

• memory to enable efficient L2 memory for

DSP?

• or for background memory?

• or to buffer data for data-dependent

processing?

• or bandwidth reducing, application-specific

functional units?

• Can optical layer take on part of the functionality

• WFOV? Multi-resolution? Depth extraction?

• How do we align, connect and configure optical

channels, ADC blocks and DSP blocks?

• What consequences does this have for DSP

architecture?

• ...

© IMEC 2011

OPTICAL DESIGN

B-PHOT (VRIJE UNIVERSITEIT BRUSSEL)

© IMEC 2011

IDEA

Replace “classic” camera lens by a micro-optical lens

system that uses multiple imaging channels.

+ Compact and cheap

+ New optical functionalities become possible

© IMEC 2011

INTEGRATION OF THREE OPTICAL

CHANNELS

3

1

2

(Integrated in Spaceclaim© CAD software)

1

2 3

FOV=80.6o FOV=7.2o

FOV=20.4o

•Different magnification for each sub-image

→ Different image processing algorithms can be applied to

different sub-images.

(1440 x 960 pixels)

© IMEC 2011

TECHNOLOGY

precision diamond tooling:

• Allows 2 free-form surfaces per channel

• Results in miniaturized lens system

GAUSSIAN BEAM PROPAGATION METHOD (1/23) – WHY ? (1/5)

© IMEC 2011

3 CHANNEL MULTI-RESOLUTION IMAGING SYSTEM

(FOUR SURFACES PER IMAGE CHANNEL)

•Diffraction limited performance (10 um pixel) only @ 587 nm

(→ chromatic abberations).

(Designed and simulated in CODE V)

F#=7.0, f=29 mm, FOV=2x3.6o , Angular resolution=0.005o,

Depth of field= [8m-infinity], Diffraction limited

F#=7.0, f=10 mm, FOV=2x10.2o,Angular resolution=0.015o

Depth of field= [2m-∞], Diffraction limited

F#=5.0, f=2.3 mm, FOV=2x40.3o ,Angular resolution=0.03o

Depth of field= [0.2m- infinity] , Diffraction limited

© IMEC 2011

PIXEL DESIGN DESIGN

IMEC

© IMEC 2011

PINNED PHOTODIODES

How to reach low dark current and noise performance ?

Solution: Design & technology: of pinned photodiodes, 4T pixel

imec offer:

• custom specific optimization (co-design) thanks to design and process under

one roof

PIET DE MOOR 12

TX

PPD FD

VDD

VDD

Row select

SF

Rst

© IMEC 2011

SIMULATION STUDIES REVIEW

Simulations performed and first optimization completed

Results from experiments will be input to further optimization

© IMEC 2011

Advanced Pixel array

Single Pixel array

Pixel yield structures

CMOS monitor & yield structures

Pixel monitor structures

XSEM CMOS & XSEM-X Pixel structures

PC

M s

truct

ure

s

OPC verification structures

XSE

M-Y

Pix

el st

ruct

ure

s

TEST MASK FLOOR PLAN

© IMEC 2011 15

PIXEL ARRAY

15

Pixel array

2×12 bond-pad module

© IMEC 2011

PIXEL-PITCH

16

5um 20um

© IMEC 2011

PINNED PHOTODIODES: 1ST RESULTS

imec Status:

• CIS 0.13 um imec process in development

• First 4T pixels (2.5 um pitch) operational

• Optimization ongoing

PIET DE MOOR 17

© IMEC 2011

PIXEL READ-OUT ELECTRONICS

KULEUVEN (LEUVEN UNIVERSITY)

© IMEC 2011 ESAT MICAS 19

PIXEL READOUT & ADC

High Dynamic Range

(HDR)

DR extension with high SNR &

on-chip image synthesis

[Xhakoni et al. KULeuven, IISW2011]

Target performance:

DR>100dB

High Frame Rate

Pixel output capacitance

reduction

[Xhakoni et al. KULeuven, Electronics

Letters, 2011]

High speed ADC design

3D-IC for small pixel grouping

increased parallelism

Target performance:

Frame rate >1000 frames/sec at

extended dynamic range

Global Shutter

In pixel memory cells for signal

and reset noise storage:

Low parasitic light sensitivity

Correlated double sampling

Low noise pixel readout

Objectives:

ROIC design for CMOS Image Sensors

© IMEC 2011 ESAT MICAS 20

Dynamic Range Extension Algorithm

Based on two captures:

First, short capture, used to predict the best integration time for

the second capture

Short frame time (Tcapture1 << max Tcapture2 )

Large SNR dip avoided compared to traditional dual capture HDR techniques

Group of pixel processing level for small pixel pitch

SN

R (

dB

)

10

20

30

40

102 10

410

6 108

Signal (e)

-- Conventional dual capture

─ Proposed algorithm

[Xhakoni et al. KULeuven, IISW2011]

PIXEL READOUT & ADC

© IMEC 2011 ESAT MICAS 21

3D read-out architecture

Group of pixels processing concept

Constant high frame rate at increased pixel

array resolution

ADC layout not limited by fine pixel column

array pitch

[Xhakoni et al. KULeuven,

IISW2011]

PIXEL READOUT & ADC

© IMEC 2011

(DIGITAL) IMAGING PROCESSING

HOGESCHOOL GENT - ASSOCIATIE UNIVERSITEIT GENT

© IMEC 2011

AIM: FACE RECOGNITION

Viola-Jones: Face detection

algorithm

Introduction:

Slide a window across the image and

evaluate a face model at every location

(based on a cascade of features)

Slow training, but the detection is very fast

Key ideas

Integral images for fast feature

evaluation

Boosting for feature selection

Attentional cascade for fast rejection of

non-face windows

© IMEC 2011

EXECUTABLE MODEL FOR VIOLA-JONES

ON 3SIS ARCHITECTURE

Blip: block based image processor

Image is split in blocks

32 x 32 or 64 x 64 ...

Every block has 1 Processing

element (PE)

All PEs execute the same

instructions at any given time

SIMD controlled by host

processor

© IMEC 2011

EXECUTABLE MODEL FOR VIOLA-JONES

ON 3SIS ARCHITECTURE

Blip evaluation

Advantages

Parallel architecture

Shorter active wire length (less data transitions)

Implementing low-, mid- and high-level computer vision algorithms

Disadvantages

Communication overhead between blocks

The PE of a block can get idle in case no object of interest is

present in that block

© IMEC 2011

BLIP SIMULATION RESULTS

Viola-Jones on Blip

Embarrassing parallelism in

the Viola-Jones algorithm

Parallel processing of features:

the SIMD-structure is suitable

for this

PEs get idle when no face is

detected in the image block

From stage 7 we see a sudden decrease in active PEs

© IMEC 2011

DEMONSTRATOR DESIGN

IMEC

© IMEC 2011

G. 3D STACKED IMAGERS

Imaging system on a chip-stack • Integration of micro-optics layer:

- Ultra wide field of view

- Filters for hyperspectral imaging

• Shared pixels = multiple pixels per bump

• Smart analog/digital read-out:

- Ultra high dynamic range

- ADC per group of pixels

- Variable resolution (active binning)

• Smart digital processing:

- 2D distributed group of processors

- Face recognition

Status: demonstrator design

PIET DE MOOR 28

© IMEC 2011

SUMMARY OF THE CURRENT

DEMONSTRATOR CONCEPT I

Ultra wide field of view

3 fields with different zoom ratio

Pinned photodiode with:

• FD sharing, bump sharing

• Special: LOFIC

Sensor electronic read-out:

• Large dynamic range

• Parallel ADC

Face recognition

• Parallel based image processing 29

Optical layer

Sensor layer

Mixed analog/digital layer

Mixed analog/digital layer

© IMEC 2011

ARCHITECTURAL/INTERCONNECT

CHOICES: PIXEL, BUMP AND TSV PITCH

Bump pitch = 20 um (given by technology) Pixel size ≠ bump pitch: • Grouping of 4 pixels/bump (TBC)

TSV pitch ≠ bump pitch ≠ pixel pitch: • 4 (TBC) TSV’s per ADC/analog readout block

1 readout block per 64x64 pixels

TSV pitch

bump pitch

pixel size

detector

Tier 1

Tier 2

30

© IMEC 2011