3D Integration Technologies For Miniaturized Tire Pressure … · Introduction Heterogeneous ......

Nicolas Lietaer, SINTEF ICTimaps 2009, San Jose, Nov 1 - 5, 2009

Peter Ramm, IZM-M

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3D Integration TechnologiesFor Miniaturized Tire Pressure Monitor

System (TPMS)- supported by the European Commissionunder support-no. IST-026461 e-CUBES

Nicolas Lietaer1*, Maaike M. V. Taklo1, Armin Klumpp2, Josef Weber2

and Peter Ramm2

1SINTEF, department for Microsystems and Nanotechnology, Oslo, Norway 2Fraunhofer Institute for Reliability and Microintegration, Munich, Germany


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OutlineIntroduction

Heterogeneous integrationEuropean 3D technology platform

e-CUBES automotive demonstrator (TPMS)Technology choices Hollow through-silicon viasInterconnect for sensor and BAR

Au stud bump bondingCu/Sn Solid-Liquid Interdiffusion

TPMS demonstrator results


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Definition:Fabrication ofstacked and vertically interconnected device layers

Motivations:

Form Factor• Reduced volume and weight• Reduced footprint

Performance• Improved integration density• Reduced interconnect length• Improved transmission speed• Reduced power consumption

“The Ultimate Goal: Repartitioning”

3D Integration

(P. Garrou / MCNC)


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Definition:Fabrication ofstacked and vertically interconnected device layers

Motivations:

Form Factor• Reduced volume and weight• Reduced footprint

Performance• Improved integration density• Reduced interconnect length• Improved transmission speed• Reduced power consumption

“More than Moore” Applications• Integration of heterogeneous technologies

3D Integration


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Sensors Actuarors System in

Package

Auto-motive

Data ProcOffice

CommunicationWireline Wireless

Power

ConsumerPortable Stationary

Markets

Legend:

Technologies

RF / AMS

CMOS LP

CMOS HP

Memory

Industrial Medical

Analog / HV

Bubble size = driver impact

More Moore(scaling)

More than Moore(non-scaling)

mixed

Technologies serve different applications

Ref.: ETP Nanoelectronics, A.J. van Roosmalen, December 13, 2007


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Humanbrain

Humansensing & interaction withenvironment

‘Beyond CMOS’

e-CUBES

e-CUBES®

Self organising wireless sensor networks to monitor the environment

e-CUBE

e-cube application layer(s)

e-cube radio

e-cube Power

Antenna

rf circuit

Processing unit

Radio digital baseband

Sensor Function

Power Management

Energy Scavenging(e.g. vibration,solar)

Power storage

e-CUBE

e-cube application layer(s)

e-cube radio

e-cube Power

Antenna

rf circuit

Processing unit

Radio digital baseband

Sensor Function

Power Management

Energy Scavenging(e.g. vibration,solar)

Power storage


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3D-PLUS: WDoD, HiPPiPTyndall: SW-ACF

Bottom-Chip

IMEC/IZM: UTCS, TCICEA-Leti: Via-Belt

IZM-M: ICV-SLIDSINTEF: HoViGo

2

3D Integration Technologies for e-CUBES

3D-SOC 3D-WLP 3D-SIP


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3D-PLUS: WDoD, HiPPiP

Bottom-Chip

IMEC/IZM: UTCS, TCIIZM-M: ICV-SLIDSINTEF: HoViGo

2

e-CUBES Application Demonstrators

Infineon´sAutomotive

Philips´Health & Fitness

Thales´Aeronautic


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Concept Categories:

• Stacking of packages (or substrates)(eq. to 3D-SIP)

• Stacking of embedded dieswithout TSVs(eq. to 3D-WLP)

• TSV Technology(Vertical System Integration)with TSVs

- “vias last”- “vias first”

FEOL, BEOL, post BEOLTSVs prior / post stacking

3D Integration – Definitions


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TSV Technology(Vertical System Integration)with TSVs

- 3D-IC3D Integrated Circuit: stacking of transistor layers(at local interconnect densities)

- 3D-SIC3D Stacked Integrated Circuit(very high TSV densities)

- 3D-SOC3D System-On-Chip: stacking of devices (global level)

• Fabrication of Heterogeneous Systems

3D Integration – Definitions (2)


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3D-SOCstacked dieswith TSVs

3D-SOCstacked dieswith TSVs

Performance

Performance

FormfactorFormfactor

3D-WLPstacked embedded dies

without TSVs

3D-WLPstacked embedded dies

without TSVs

3D-SIPstacked packages


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Performance

Performance

FormfactorFormfactor

3D-PLUS: WDoD, HiPPiP, …(Stacking of Packages)3D-PLUS: WDoD, HiPPiP, …(Stacking of Packages)

Die 2Vias

Die 3

Die 2Vias

Die 3

W-filled TSV

Al

Top-Chip (17 µm)

Cu

Cu3Sn

Cu

2 µm

W-filled TSV

Al

Top-Chip (17 µm)

Cu

Cu3Sn

Cu

2 µm

ICV-SLID

HoViGo UTCS

Via-Belt

HiPPiP

WDoD

TCI

3D Technology Platform3D-SOC

3D-WLP

3D-SIP


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3D Technology Platform (e-CUBES)

Technology e-CUBES Partner

3D-SOC

Through Si Via (TSV) Technology (ICV-SLID) Fraunhofer IZM Munich

Hollow Via & Gold Stud Bump Bonding (HoViGo) SINTEF

3D-WLP

Thin Chip Integration (TCI / UTCS) IMEC & Fraunhofer IZM

Via Belt Technology (µInsert) CEA-Leti

3D-SIP

HiPPiP 3D-PLUS

Wireless Die on Die Technology (WDoD) 3D-PLUS

Submicron Wire Anisotropic Conductive Film (SW-ACF) Tyndall


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e-CUBES TPMS demonstratorObjective of e-CUBES project : develop wireless sensor networks with miniaturized sensor nodes3 demonstrators : Health and fitness, Aeronautics and space, AutomotiveTire Pressure Monitoring System (TPMS) chosen for the Automotive demonstrator

Today’s TPMS 3D integrated TPMS

20 cm3

Source: Infineon Technology

Source: SINTEF

~ 1 cm3

Source: Infineon Technology SensoNor

e-CUBES


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TPMS building blocksMEMS pressure sensor (glass-Si-glass stack) : 1.8 x 2.1 mm2 (150 mm wafers, 900 µm)MEMS bulk acoustic resonator (BAR) : 0.8 x 1.3 mm2 (150 mm wafers, 200 µm)Transceiver ASIC (TX) : 3.8 x 3.3 mm2 (200 mm wafers, 60 µm)µ-controller ASIC (µC) : 4.3 x 3.8 mm2 (200 mm wafers, 700 µm)AntennaBatteryPackage

µC

3D integrated miniaturized TPMS

sensor

TX

BAR

Technologies required :µC - TX interconnectTX - sensor / BAR interconnect TX TSVsSensor TSVs


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Source: SINTEF

Technology choices

TX – sensor interconnect

TX TSVsTX – BAR

interconnect

SensorTSVs

µC – TX interconnect

Source: SINTEF/ FhG IZM-Berlin

SnAg µbumps and underfiller or SLID

Au stud bumps only(alternative: SLID)

Source: Kulicke & Soffa

TSV with W

Source: FraunhoferIZM-Munich

W-filled TSV

Al

Top-Chip (17 µm)

2 µm

W-filled TSV

Al

Top-Chip (17 µm)

2 µm

Au stud bumpswith adhesive(alternative:

SLID)

Silicon-glass compound wafer with TSVs

(alternative: hollow TSVs)

Source: SINTEF/SensoNor/ PlanOptik


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Source: SINTEF

Technology choices


TX TSVsTX – BAR

interconnect

SensorTSVs


Source: SINTEF/ FhG IZM- Berlin

SnAg µbumps and underfiller or SLID

Au stud bumps only(alternative: SLID)

Source: Kulicke & Soffa

TSV with W

Source: FraunhoferIZM-Munich

W-filled TSV

Al

Top-Chip (17 µm)

2 µm

W-filled TSV

Al

Top-Chip (17 µm)

2 µm

Au stud bumpswith adhesive(alternative:

SLID)

Silicon-glass compound wafer with TSVs

(alternative: hollow TSVs)

Source: SINTEF/SensoNor/ PlanOptik

Bottom Device

Al

Top - Chip

(17 µ m)

Cu

Cu

Cu3

Sn

AlILD

12 µ m

Bottom Device

Al

Top - Chip

(17 µ m)

Cu

Cu

Cu3

Sn

AlILD

12 µ m


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Contact under pressure and heat~ 5 bar, 260 – 300 °C (Sn-melt)

Sn, liquid

Cu -interdiffusion

Formation of intermetallic compound; Tmelt > 600 °C

Cu3SnIMC

Patternedelectrodeposition

Cu

Sn

TiW

Simultaneous formation of electrical and mechanical connections

SLID:Solid-Liquid Inter-Diffusion

Source: VSI project, funded by German Ministry for Education & Research (BMBF)


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Copper

• Fabrication of Tungsten-filled Inter-Chip Viason Top Substrate

ILD 5-7 µm

IsolationTungsten Plug Si 10-50 µm

Passivation• Via Opening and

Metallization

• Thinning

• Opening of Plugs

• Through Mask Electroplating

• Chip/Wafer Alignment and SolderingSnCu3Sn

Chip-to Wafer Stacking by ICV-SLID Technology


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W-filled TSV

Al

Top-Chip (17 µm)

Cu

Cu3Sn

Cu

2 µm

W-filled TSV

Al

Top-Chip (17 µm)

Cu

Cu3Sn

Cu

2 µm


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Post Backend-of-Line TSV Process

DisadvantageBEOL intermetal-dielectrics

have to be etched prior to silicon via etch

For 3D Integration of variousMore than Moore productsthere is no cost-effectiveoptionComponents are usuallyavailable as completelyfabricated devices only


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DisadvantageBEOL intermetal-dielectrics

have to be etched prior to silicon via etch

For 3D Integration of variousMore than Moore productsthere is no cost-effectiveoptionComponents are usuallyavailable as completelyfabricated devices only

TSV technology for automotive application (metallization of trenches by CVD tungsten)

Post Backend-of-Line TSV Process


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Hollow Vias and Gold stud bump bonding(HoViGo)

TSV and interconnects for MEMS/ASIC

TSVs for 300 -1000 µm thick silicon wafersVia first conceptTSV hole dimension in silicon: 20 x 50 or 50 x 50 µm2

Resistivity per TSV < 10 Ohm/via (300 µm wafer thickness)Min pitch TSVs: 110 µm (rectangular) - 140 µm (square)

Corresponding TSV densities: ~ 5000 cm-2

Interconnects compatible with inlets and released structures (MEMS)Completely dry processingChip-to-wafer stackingMin pitch Au stud bumps: 90 µm

Corresponding Au stud bump density: ~ 12000 cm-2

Stand-off height Au stud bumps: 10-15 µmNumber of layers: 2 tested (in principle unlimited)


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Hollow through-silicon viasProcess :

300 µm thick 6” Si wafers2,5 µm thermal SiO2Strip SiO2 on the backsideAl sputter backsideLithography via holes frontsideRIE SiO2 frontsideDRIE using modified Bosch processStrip Al and SiO21 µm thermal SiO21 µm LPCVD polySiPOCl3 doping of polySiAl sputter both sidesLithography both sides using dry-film resistRIE Al and polySi both sides

1.2 µm Al

1 µm polySi

1 µm SiO2

Alcatel AMS200I-productivity16 µm / min

(50 x 50 µm2)

viasvias


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Hollow through-silicon viasTSVs for the TPMS sensor :

Requirements :Mechanical stabilityElectrical performance (< 30 Ohm / via)Reliability

Thermal cycling -40°C to +150°CPost processing at 260°C (lead free soldering)

Hermetic sealingHigh yieldLow cost

Results technology demonstrator :Resistance : 7,5 Ohm / viaOnly failing dies at the wafer edges98% yield on daisy chains with 80 vias(when excluding the dies at the wafer edge)

Hollow TSVs :Suitable for thick wafers (300 – 1000 µm)Highly doped polysiliconNo stress issues due to CTE mismatch (hollow)Allows post-processing up to 400°CHermetic sealing by bonding (to be demonstrated)Simple process

Wafermap daisy chain with 16 vias


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Interconnect for sensor and BARInterconnect technology for stacking sensor and BAR onto the TX-µC stack :

Requirements :Chip to wafer technologyLead freeElectrical performanceMechanical strengthStand-off height < 30 µmReliability

Thermal cycling -40°C to +150°CPost processing at 260°C (lead free soldering)

High yieldLow cost

Selected alternatives :

Au stud bump bonding (SBB)

Cu/Sn solid-liquid interdiffusion (SLID)

Source: SINTEF

Source: SINTEF / FhG IZM


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Au stud bump bondingProcess used for the TPMS demonstrator :

Au stud bumping on sensor & BAR wafersDiameter +/- 50 µmHeight +/- 30 µm

Wafer dicing

Flip-chip bonding (chip-to-wafer)Sensor (first) : with Epotek 353ND underfillerBAR (last) : without underfillerThermocompression bonding

Bond force : 20 – 30 N for 10 sTool : 200 °CChuck : 120 – 140 °C

Thermosonic bondingBond force : 12 – 20 N for 2 sTool : room TChuck : 120 – 140 °C

BAR

sensor

µC

TX

sensor

BAR


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Au stud bump bondingElectrical results :

Larger spread and bad reliability when the TX substrates had not been subjected to an O2/H2O plasma stripHigher resistance in some cases, typically for bumps that were squeezed less (height > 15 µm)Thermal cycling (- 40°C to + 150°C) and 30 minat 260°C has little impact on most of the devices that were subjected to the O2/H2O strip

0

5

10

15

20

25

30

35

1 5 10 20 30 50 70 80 90 95 99

Resistance of daisy chain with 16 Au stud bumps(thermosonic bonding only)

after bonding, O2/H2O stripafter bonding, no stripafter TC, O2/H2O stripafter TC, no stripafter TC and HTP, O2/H2O strip

Res

ista

nce

[Ohm

]

Percent

0

5

10

15

20

25

30

35

1 5 10 20 30 50 70 80 90 95 99

Resistance of daisy chain with 16 Au stud bumps

Thermocompression, no stripThermosonic, no stripThermosonic, O2/H2O strip

Res

ista

nce

[Ohm

]

Percent


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Au stud bump bondingSummary stud bump bonding results :

Electrical resistance : 0,10 Ω / bumpShear strength Sensor > 50 MPa, BAR ~ 27 MPaThermal cycling - 40°C to + 150°C and 30 min at 260°C stress have little effectStand-off height : 8 - 15 µm

No wet processing involved

No need for UBM or passivation layers

Serial process : most cost-effective for stacking devices with lower I/O counts

BAR

sensor

TXµC

Source: SINTEF


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Al

Process SLID technology demonstrator:

Preparation of dummy sensor and ASIC wafers :10 x 10 µm2 contact openings on bondpadselectroplated Cu bumps ASIC side : 50 µm ∅ (circular)electroplated Cu/Sn bumps sensor side : 40 µm ∅ (circular)

Dicing of sensor wafer Mounting sensor chips on handle waferWafer-to-wafer bonding : 3 kN, 325°C, EVG bonder

Cu/Sn Solid-Liquid Interdiffusion


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Process :

During bonding at 325°C, Sn meltsCu diffuses into the melted Sn layer to form Cu6Sn5 (η)→ the compound solidifies and the stack is fixedCu6Sn5 (η) then transforms into the thermodynamicallystable Cu3Sn (ε) phase with melting point > 600°C

Cross-sections and SEM-EDS analysis :

Nearly all Sn has reacted with Cu to formed the stable Cu3Sn (ε) phaseOn some samples (2 out of 12) a small area with Cu6Sn5 (η) remainsAfter thermal cycling (- 40°C to + 150°C) no areas with Cu6Sn5 (η) were seen anymoreOtherwise, no changes were observed after thermal cycling and 30 min at 260°C10 µm misalignment

Cu/Sn Solid-Liquid Interdiffusion

1 Cu2 Cu3Sn3 Cu6Sn54 Cu1

23 4

Cu3Sn (ε)

Cu6Sn5 (η)

Source: SINTEF / FhG IZM

Melting temperaturesSn : Cu :Cu6Sn5 (η) :Cu3Sn (ε) :

232°C1083°C415°C670°C


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Cu/Sn Solid-Liquid InterdiffusionSummary SLID results :

Electrical resistance : very low(measurement dominated by Al conductors)Shear strength : ~ 37 MPaThermal cycling - 40°C to + 150°C and 30 min at 260°C stress have little effectStand-off height : ~ 8 µm

Suitable for high I/O counts

Scalable to pitch < 50 µm(limited by bonder alignment accuracy)

Wet processing required(e.g. inlets would need to be protected)

Source: SINTEF


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TPMS demonstrator results

MiniaturizedTPMS ~ 1 cm3

Source : Infineon TechnologiesSource : SINTEF

MEMS / TX / µC 3D stack Micro-PCBMolded Interconnect Device (MID)with integrated loop-antenna

Succesfull measurements on PCB level :

Communication with TX is workingCommunication with µC is working

µC – TX (SnAg µ-bumps)TX TSVs (W-TSVs)

BAR is running at correct frequencyTX-BAR interconnect (Au stud bumps)

Sensor performance to be measured soon


TX TSVs TX – BAR interconnect


SensorTSVs


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AcknowledgementsThis report is partly based on the e-CUBES project which is supported by the European Commission.

Colleagues of the e-CUBES project, especiallyWerner Weber, Thomas Herndl and Josef Prainsack, Infineon TechnologiesTimo Seppänen, SensoNorLars Nebrich and Robert Wieland, Fraunhofer IZM-MunichJürgen Wolf and Matthias Klein, Fraunhofer IZM-BerlinThor Bakke and Lars Geir Whist Tvedt, SINTEF

Vincent McTaggart, Kulicke and Soffa Industrial (KNS)For providing the bumping service

Gerhard Hillmann, Datacon Technology GmbH For providing the chip to wafer bonding service and process development

3D Integration Technologies For Miniaturized Tire Pressure … · Introduction Heterogeneous ......

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