384-428-484 - Final Project Report With Addendum 1 - Lynam, Lesher, Levantino
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Transcript of 384-428-484 - Final Project Report With Addendum 1 - Lynam, Lesher, Levantino
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V A R I A B L E F R E Q U E N C Y T H R E E P H A S E
P W M S Y N C H R O N O U S M O T O R
C O N T R O L L E R A N D P O W E R S Y S T E M
FR AN K LYN AM R OBE R T LE SHE R GR E GOR Y LE VAN TIN O APR IL 29, 2011
ENGR 384 ENGR 428 ENGR 484
SUMMARY
The goal of this project was to develop a sophisticated variable frequency pulse width modulation
control signal to drive a power electronics system to power a three phase synchronous motor.
Beyond that base premise, a current sensor to provide feedback has been implemented, impactingthe field voltage generated. The entire system has an LCD screen with a keypad input and provides
for smooth operation of the motor.
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Contant Voltage to Frequency Ratio ................................................................................................... 13
H-Bridge Inverter .................................................................................................................................... 14
MOSFET Selection ............................................................................................................................... 14
Gate Driver System ......................................................................................................................... 15
Component Selection .......................................................................................................................... 15
Simulation ........................................................................................................................................... 15
Construction ........................................................................................................................................ 15
AC/DC Current Transducer...................................................................................................................... 16
Super Diode Precision Rectification and Filtering ............................................................................... 16
Testing ......................................................................................................................................................... 17
Initial Testing ........................................................................................................................................... 17
Gate Driver Voltage Issue.................................................................................................................... 17
Gate Driver Circuit Modification ..................................................................................................... 17
Phase Side Testing................................................................................................................................... 17
Further Issues ...................................................................................................................................... 18
Oscilloscope Grounding Issues ............................................................................................................ 18
Phase Testing .......................................................................................................................................... 19
Further Oscilloscope Grounding Issues ............................................................................................... 19
1 M Resistor and 60 Hz Noise ....................................................................................................... 19
Output Inversion Issues .......................................................................................................................... 20
Motor Testing ......................................................................................................................................... 20
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FIGURE 2 - A PWM SIGNAL
FIGURE 1 - INTERFACING CONTROLLERS
SOFTWARE
In this portion of this document, we will discuss the general theory
behind pulse width modulation (PWM) signal generation and the
particular method of implementation of the software which made this
solution possible. Specific details will include all portions of the codeinvolved. Additionally, the human interface device (HID) control code will
be addressed and discussed in detail.
PWM
PWM is a method for generating an arbitrary output signal by creating unit
blocks of on-state and off-state voltages in particular proportions. These on
and off states can be coupled with additional information to allow multi-
level PWM output, generating either a negative or positive value for an on-
state signal as desired. This is called a three-level PWM system. In this
project, we only developed a two-level PWM system, wherein an on-stateoutput signal generated a positive pulse at Vs while an off-state output
signal generated a negative pulse at -Vs. The specifics of the hardware implementation are covered
in detail in the Hardware section.
GENERAL
A PWM signal is comprised of pulses at high values and pulses at low values. The periodicity of this
cycle of high and low values is called the carrier frequency. This carrier frequency can be modulated
or unmodulated. An unmodulated PWM signal is effectively a buck chopper, where simply altering a
static k value will provide a controllable DC output.
The concept of this implementation is to provide a controllable modulation signal by varying the k
value for each pulse output. By varying the k along a sine function, the carrier signal is modulated at
a frequency much lower than itself to generate a sine wave output. As long as the modulation signal
remains at a much lower frequency than the carrier signal, an inductive load can maintain
continuity of current through the output pulses and turn that series of pulses into a meaningful
waveform.
As seen in figure 2 above, the carrier frequency of high and low pulses is much higher than the
modulation frequency which determines the duty cycle of those pulses. The portion with wider tops
represents the positive half cycle of the modulation signal, while the portion with wider bottoms
represents the negative half cycle of the modulation signal.
SIGNAL MODULATION
The code for this project (attached) used a pre-generated lookup table of values approximating a
sine wave. These values were stored in the PWM_Base array which is defined by two aspects: A and
T. A is the peak-peak amplitude of the waveform stored, and T is to the total number of entries
stored in it. To ease communication issues discussed later, T and A were selected based on bitdepth.
The T in the final implementation was 10 bits for a total of 1024 entries, with an A of 9 bits, for a
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in both should provide evenly scalable resolution control, minimizing resolution loss. In practice,
though, the loss of amplitude resolution (or variance in k over a cycle) is much more significantly
pronounced on the output than loss of periodic resolution. For that reason, this system solely relies
on periodic resolution reduction.
Periodic resolution reduction is realized through alteration of the PWM reference step each
operating phase takes at the beginning of each pulse. Simply by increasing that step by one unit, the
output frequency can be controlled. Going from a step of 1 to 2 reduces periodic resolution by half.
Another step provides one third the original output resolution, providing three times the original
frequency. Thus, a linear frequency control is realized through the inverse reduction in periodic
resolution (f = 1 / T).
Managing the output frequency in this manner also allows the simple production of an opposite
phase sequence, corresponding to an opposite direction of rotation, by adding a negative value. This
signal is realized through the use of a parity bit in the HID speed control signal.
SPEED CONTROL LIMITATIONS
As discussed above, there are limitations to periodic resolution constriction. Primarily, when thespeed control signal is high, the periodic bitdepth is low. For the purposes of this project, we
arbitrarily determined that a minimum acceptable bitdepth would be 4 bits, or 16 pulses per cycle
(8 pulses per half-cycle). To realize that bitdepth at our maximum speed, the speed control signal
could only be T 4 bits, or 6 bits. This gives a maximum control signal of 64. Since the lowest value
is used for a zero-frequency output, in practice we do not reach our minimum periodic resolution as
the maximum speed value is only 63 (this output is shown in figure 2).
A secondary effect of periodic resolution reduction is the generation of a low frequency floating
neutral signal. If the periodic resolution were shrunk and appropriately concatenated for each
speed control signal, an uneven portion would have to be removed from the end of the reference
table as 1024 is not divisible by all numbers from 1 to 63. The removal of this portion would
generate significant high frequency harmonic distortion even on a well filtered output, and would
damage the quality of the fundamental output signal.
To prevent this, the modulus operator was used to prevent exceeding the bitdepth of the periodic
resolution in the time step code, with effectively similar code used for the negative speed values.
The drawback of this solution is the generation of a very low frequency modulation on top of the
primary modulation signal, due to uneven shifting of initial positions in the PWM_Base reference
array. The drawback to this issue is the generation of a low frequency float signal in the effective
neutral of the motor, which could cause efficiency losses.
An ideal solution eliminating both of these concerns would be the use of multiple reference tables,
or a reference table of sufficient resolution to preclude these concerns.
CONSTANT PEAK FLUX DENSITY SYSTEM
To prevent exceeding the rated peak flux density of the motor, a constant V/f system was
implemented maintaining an output maximum pulse width proportional to speed. For present
operation, maximum frequency output is ~30 Hz, allowing a maximum source voltage of ~60 V. The
motor characteristics defining this limitation are discussed below.
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Vf output. This variation is well within the error of the simplistic Vf output control system, and is
not presently deemed a meaningful limitation to system operation.
HI D
The human interface device (HID) not only provides human control ofthe system, but also provides a delayed response speed ramping
system and a minimum-seeking current sensing field voltage control
system. As part of the HID necessities of this system, it interfaces with
an LCD screen and, through the LCD serial interface, with a keypad. It
also provides a sophisticated output listing current speed, target speed,
new speed input, and the field voltage control signal.
GENERAL
An operational goal for this system was providing an intelligent speed control for a synchronous
motor. To that end, some manner of input device would be required to indicate desired speed, andsome manner of output would be required to indicate current status. Although a simple
potentiometer for speed control and a simple binary LED output for status could have been used,
we felt that the LCD system could provide much more usable information not only for operational
use, but also for debugging. The LCD display output was, in fact, of vital use for debugging.
LCD DATA OUTPUT
Data output to the LCD screen is accomplished using a series of strings stored in memory and the
OutputToLCD function we created. The strings stored in memory are only written to the LCD screen
on initialization, and the cursor movement functionality is used to continually rewrite the values to
the right of each string. To quickly describe the output as seen in figure 5, it is segregated into fourlines, each with a variable and its value. First is Target RPM, then Current RPM, then New
RPM, and lastly Vf Signal. All of these start at 0.
The New RPM line is where keypad input is displayed. The operation of and software interaction
with the keypad will not be discussed in detail. Upon pressing the # key on the keypad, whatever
value that is in New RPM is shifted to Target RPM, and Current RPM slowly seeks to that based off
of a speed control delay system discussed later. A key press is accompanied by a 225 ms pause
while the ready indicator, LED 46, dims. The keypad input system allows only 3 digits of input,
beyond 3 it loops the newer key presses and cycles out the older. The * key provides a negative
sign.
The Vf Signal system reads an analog input from a current sensor system and continually changesthe Vf Signal value to attempt to minimize that signal. This will be discussed in further detail below.
OUTPUTTOLCD FUNCTION
The OutputToLCD function provides an ASCII output string to the LCD based on a floating point
value passed to the function. If that value is less than one, it is preceded by a negative sign. Only
three digit values may be passed to this function. In the interest of simplicity, no error checking for
this is done in this portion of the code.
FIGURE 5 - HID LCD OUTPUT
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ASCII output is realized by reading the value passed modulus ten and adding 48. The value is then
divided by ten and the process is repeated until zero is reached, placing the next value into the next
string location each time. These numbers are then reversed.
If the value passed is negative, a note is made at the beginning of the function and the value is
changed to be positive. Then, after the array has been generated and resorted, the values are all
shifted a unit to the right and a negative sign, character 45, is placed in the first location.
The passed variable is set as a floating point due to an earlier plan to incorporate the fractional
ASCII characters to display fractional values in the output. This was deemed unnecessary due to the
high unit step of the speed control system.
SPEED CONTROL SYSTEM
The speed control system interface is effectively an inherent deception. In reality, the speed control
variables are consecutive integer quantities, seen on the LED output on the microcontroller board.
When passed to the OutputToLCD function, they are multiplied by the macro RPM_Step, which is
the pre-calculated RPM step for each unit step in the speed control signal, as discussed below. Thisis all accomplished transparently to the user, allowing an easy and accessible interface.
As an important note for this interface system, the manner in which the input values are converted
actually shifts the values appropriately to find the closest target speed discrete step quantity. If this
were not done, it would always round down, causing unfortunate user interface issues where an
input of 502 RPM provides a target RPM of 490 because the next discrete step value was 502.1
RPM. The present system has an excellent feel to its input response and we are extremely satisfied
with it.
RPM_STEP
The RPM_Step macro was calculated from empirical data. The output waveforms were observed atseveral frequencies, and an approximation of the change in frequency for each unit step in the
speed control signal was determined. We found that a single step in the speed control signal
resulted in an increase of 0.432 Hz.
0.432 Hz is 0.432 turns on the rotor per pole per phase per second. Converting that to full rotations
per minute produces a unit step of approximately 12.95 RPM per unit step in the speed control
signal. This value was used for the RPM_Step macro.
SPEED RAMPING CONTROL
The output frequency changes are not instantaneous. As we are attempting to control a
synchronous motor, it would be foolish to immediately produce the requested output frequency.
Instead, we have implemented a system wherein the current speed is only changed by one discrete
unit at a time, seeking the target speed value.
Additionally, this operation is performed only once every 12-19 cycles, dependent on current
speed. As speed increases, the rate of change of speed increases. Our hope was to provide a more
gradual transition at lower speeds, while allowing a more rapid control at higher speeds. In
practice, our speed control transition time is already extremely generous and slow and completely
unnecessary. It was still an interesting problem to solve, even though it never really existed.
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The speed control seeking system does not provide a check against the maximum speed values. The
initial assignment of the target speed from the RPM input system provides that check instead.
FIELD VOLTAGE CONTROL SYSTEM
The function of the field voltage control system is to search possible field voltage values whichminimize the operating current draw of the machine. To understand the how this control
methodology accomplishes its purpose, it is first important to discuss briefly the underlying
interaction it is operating with.
The magnitude of the generated voltage in a synchronous motor is proportional to the field voltage.
The current draw becomes a vector difference between this generated voltage and the applied
voltage. At some value of generated voltage, current is at unity with the applied voltage. An increase
or decrease in generated voltage will pull the current off unity. As the real component of the current
remains constant, any non-unity operation will result in a higher magnitude of current. Therefore,
for some value of field voltage, current must be a minimum. For any other value, current must be
higher.
This control system is thus designed as minimum seeking. It is a continually changing control
system, which means that it is constantly changing to try to find the minimum current draw. If the
current reading is higher than the previous reading, it starts moving in the other direction. This
allows it to continually seek out the most efficient current point.
The rate of change of the field voltage signal is the same as that of the speed signal. As this is very
low, additional issues resulting from high rate of change of flux should not arise.
CURRENT SENSING SYSTEM
The current sensing system uses an analog input pin to read the value from a hall-effect sensor. This
hardware, and the issues associated with its implementation, will be addressed in more detail lateron. The microcontroller only allows certain pins to function as analog inputs. For a single pin analog
reading, pin 19 must be used. This system has a rated accuracy within 0.05 V, and no compensation
is done within the control code to correct for errors below that threshold.
FIELD VOLTAGE SIGNAL COMMUNICATION
The field voltage control signal is encoded by the Vf_Ref reference array. This array is generated by
the PWM Base program to point to specific points within the PWM_Base array in the PWM
controller corresponding to the desired Vf control signal. By simply seeking linearly through this
array, the Vf system can output a complexly encoded signal which is readily interpreted by the
PWM controller to correspond to a value scaled to A. Thus, with only a 7 digit signal, 10 digits are
referenced and 9 digits are output.
Since there is an overall 2 bit resolution loss, there are a significant number of gaps in the Vf signal.
Additionally, the PWM Base program generates a non-linear reference array for the Vf_Ref system.
The cause of this will be discussed in detail in the PWM Base section, but the problem which arises
is that the unit step for the PWM system toward the middle of the Vf scale is significantly more than
2 bits.
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GATE DRIVER SYSTEM
The solution to this gate current spike problem is to provide an intermediate switching circuit. This
will introduce a propagation delay, but it is hoped that good circuit selection can eliminate any
signal distortion beyond a minimum phase shift. For this system, the Fairchild Semiconductor
FAN73711 gate driver was selected.
The FAN73711 datasheet offers a suggested single-leg design for both a sustain drive system and a
regenerative drive system. As regenerative drive is beyond the scope of this project, we chose to
implement the suggested sustain drive system with only minor alterations.
COMPONENT SELECTION
The suggested schematic lacked specific details as to component specifications, ratings and values.
We discerned the circuits theory of operation and selected components based on our estimate of
what values would make the circuit function. We chose a low resistance value for the power supply
to the top of the leg, and 11 k for the remainder of the circuit. A typical 1N914 was selected for the
power system, and 100 pF capacitors were chosen.
SIMULATION
We were unable to find a Multisim model for the Fairchild components, but we did run simulations
on a similar H-bridge system to test various values of reactive loading to discern the effects of
various PWM carrier frequencies. Our results were discussed in detail in our initial project
proposal, but ultimately we found that a higher PWM carrier frequency would require a lower
reactance in the load to maintain continuity of current. This result met with our expectations from
the simulation.
CONSTRUCTION
The circuit was refined and drawn in EAGLE CAD, which was
used to lay it out on a one-layer PCB design. After panelizing six
legs onto a single board, the PCB design was printed and ironed
on to a simple copper-faced PCB using a transfer medium. The
excess copper was dissolved in ferric chloride, which was
properly discarded.
The remaining traces were scrubbed clean of the protective
transfer medium and holes were drilled for component insertion.
The boards were then hand-soldered, and poorly transferred traces
were rerouted by hand. The process had an overall success rate ofapproximately 80%, and out of two boards created, only two
circuits were deemed completely unserviceable. The total time
spent solely on soldering together these boards was estimated to
be over 13 hours.
FIGURE 8 - EAGLE CAD PCB TRACES
FIGURE 9 - FINAL PCBS
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AC/DC CURRENT TRANSDUCER
For the field voltage control system feedback, we selected an AC/DC current transducer rated for 0-
400 Hz, 20 A with a +/- 5 V output fed by a 24 V source. The intention was to select a transducer
which would provide an RMS value output and feed that DC signal directly into an ADC pin on the
microcontroller for use in the field voltage control system discussed above.
Unfortunately, the transducer ordered provided a real time signal rather than an RMS signal, giving
us a sine wave output. As our ADC sampling rate, as discussed above, is limited to our speed
increment rate, it would be impossible to sample the transducer output at a high enough resolution
to calculate true RMS, or even a running average. Several methods were attempted to solve this
issue, but only one will be discussed here.
SUPER DIODE PRECISION RECTIFICATION AND FILTERING
Our best solution was to use a super diode precision rectifier to turn the AC signals into DC (or a
negative DC current into a positive signal). Unfortunately, the expected maximum amperage of 2 A
(a 40 V intended supply across ~20 ) would only provide a 0.5 V output on the transducer. Thisoutput is well below the cutoff voltage for the diode in the precision rectifier circuit.
For this reason, we hoped to amplify the input to the precision rectifier through a simple inverting
amplifier using a 741 op amp (the same op amp used in the successfully built and tested precision
rectifier). After extensive testing, we were unable to get the 741 inverting amplifier to work at the
low voltages available on the microcontroller board.
Assuming that this circuit had worked, we would have used a small parallel capacitor to filter the
output, as the ADC input is of high impedance. Its important to also note that the precision rectifier
does drop some portion of the signal, producing a linear distortion. Since the system is minimum
seeking, this error would have been irrelevant for the proper operation of the feedback system.
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Initial observations were poisoned by the 60 Hz ground connection inside the oscilloscope, but
once the power source was properly grounded we were able to
observe switching operations on the MOSFETs, controlled by the
microcontroller through the gate driver.
Both the a phase and the a phase were independently observed to
provide the expected output, but were not connected across each
other. After these observations were made, the remaining phases
were soldered together and all appropriate interconnections were
made.
FURTHER ISSUES
Once all the individual legs were completed, unit testing revealed that the b leg was only providing
a constant 15 V output. As all other phases were operating properly, it was expected to be a control
signal line issue, a soldering joint issue or a bad component issue. After carefully testing the control
signal connectivity and finding it satisfactory, all solder joints in the b phase were redone.
Of particular note both for the b phase and for the system in general, the power inputs and the
output signal lines were extremely difficult to solder. The MOSFETs themselves proved to be
extremely effective heat sinks, and our need to melt the solder into place was fighting against our
fear of damaging the sensitive MOSFETs. Fortunately, our MOSFETs were less sensitive than we
thought, and although we went through four different soldering irons before we found one with
sufficient wattage to connect the input power line to the b phase MOSFET, the system did ultimately
work once the soldering was redone.
As an aside, it was extremely satisfying after several hours of failing to solder to that MOSFET to
have all the solder on it suddenly start bubbling up and wetting properly when we put that heavy
duty soldering gun on it.
OSCILLOSCOPE GROUNDING ISSUES
In the EE lab, there is only one DC power supply in the lab which is
capable of grounding to the oscilloscope without interfering with
the power supplys control system and developing an incorrect
output voltage. In later testing, this power source was no longer
available.
An attempted solution to bypass this material deficiency was
using an uncontrolled rectifier with a heavy capacitive filter, but
this was unable to provide a reasonably consistent DC signal,likely due to the rapid generation of transformer losses in the
uncontrolled rectifier power supply.
Another solution attempted was use of the controlled DC power supply in the motor control lab
panel. This power supply was unable to produce a voltage low enough to power the gate driver
circuit. For these reasons, we were prompted to attempt various creative solutions to eliminate this
obstacle. These solutions will be discussed further below.
FIGURE 12 - OUTPUT AND COMPLIMENT
*SEE TABLE OF FIGURES NOTE
FIGURE 13 - 60 HZ GROUND NOISE (SPIKES)
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PHASE TESTING
This oscilloscope grounding issue became only the first of several major problems for the phase
voltage testing portion. As the oscilloscope ground provided a direct connection to the DC source
ground (although the DC source was not, in fact, grounded), connecting the oscilloscope across a
phase resulted in a short on the power supply, providing our second major hurdle: the inability to
directly read a full phase output.
The third issue was that upon inspection, we discovered that the
carefully developed PWM control signal which prevented shorting
the legs, as discussed in both the H-bridge inverter and signal
modulation sections above, was not working properly. There were
significant and clear overlaps between the control signals on each
side of all three phases, which would short the power supply to
ground for approximately 10% of each duty cycle. This was not
reflected on the ammeter output of the DC power supply, but the
error was clear.
FURTHER OSCILLOSCOPE GROUNDING ISSUES
If the oscilloscope is not grounded to the same ground as the DC power supply, then the
oscilloscope will have a significant, noisy 60 Hz poison signal, as shown in figure 13. This issue has
often come up with projects, and until now we had been unable to come up with a better solution
than just connecting the DC source to ground. Since the only source able to do that was unavailable,
and no other types of supplies were able to produce as good an output as the DC sources, we were
forced to find an alternative solution.
The first method we attempted to read the output was to pass it through an RL filter from the motor
control lab panel. This did not, in fact, eliminate the many obstacles to observing the out. It was easy
and quick to hook up, though, and allowed us to eliminate that as a reasonable solution.
The next method we attempted was to connect a transformer across the output. This solution was
met with limited success, as the only output visible on the secondary of the transformer was a noise
set of pulses corresponding to the amplified PWM control output. Although this fixed the
oscilloscope grounding issue, the transformer did not provide a useful or meaningful output for us.
1 M RESISTOR AND 60 HZ NOISE
Our final solution was to simply add a resistance to ground. Since the
oscilloscope we were using had a 1 M input impedance, we connected a
1 M resistor between the ground connection from the oscilloscope to
the a phase and connected the positive side of the oscilloscope input to
the a phase. This gave us the expected AC PWM output at 7.5 V peak,
which is reasonable as the oscilloscope is now reading half of an even
voltage divider.
Unfortunately, although the output was correct, we were still observing a 60 Hz noise poisoning the
displayed output. The eliminate this, we connected a second probe between the true ground and
the DC supply negative terminal, which was serving as our circuit ground. This signal provided us
FIGURE 14 - COMPLIMENTARY OUTPUTS
SHOWING OVERLAP
FIGURE 15 - NOISY OUTPUT (SPIKES)
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directly with the ground poisoning signal in the DC supply, the difference between the system
ground and true ground.
By using the oscilloscope subtraction function, we were able to
display the true phase voltage and observe an extremely noisy
output. Fortunately, the only noise which remained was the PWM
carrier signal, and not the 60 Hz outlet poison. The RL filter was
again tested, but did not provide any output, likely due to either
impedance matching issues with the oscilloscope or problems
with the inductors. Weve used those filters in past labs and have
had very limited success.
OUTPUT INVERSION ISSUES
One of the major observations made after testing was complete today was the reason for the third
problem discussed in the phase testing section. As discussed above and seen in figure 14, the output
signals, instead of having necessary safety regions, overlapped. This caused a short to ground in
every leg for the portion of the PWM cycle in which the two respective control signals overlap.
The cause of this problem was not immediately obvious. We had taken every precaution in the
generation of the control function to ensure this would not be an issue, and yet here it was. We
assumed at first sight it was simply due to switching time delays in the MOSFETs or their driver
circuits and discarded it as unsolvable. This was not the case.
In reality, the cause of the problem was that the output signal generated by the MOSFET is opposite
that of the PWM control signal, as the gate driver turns the MOSFET off when it receives a TTL 5 V
on signal, and turns the MOSFET on when it receives a TTL 0 V off signal (the real transition points
were observed as 3 V on and 2 V off). This is a simple software fix and will be implemented before
the final presentation, but its very important to note as both an interesting issue which cropped upand due to its relevance regarding the oscilloscope outputs contained herein. All the images here
reflect the erroneous, uncorrected outputs.
MOTOR TESTING
As the stated purpose of this project is to drive a three phase motor, we felt it would be
unreasonable not to attempt to do so. We connected the outputs to the appropriate connections on
an induction motor in the lab, but did not observe movement. With the constant voltage to
frequency ratio system disabled, the rated voltage to frequency ratio would theoretically be
developed at 5 Hz (120 Vrms:60 Hz::10 Vrms:5 Hz), which corresponds to an output of 155 RPM.
Even at this setting, we were unable to observe motion in the rotor.
Each of us tested the rotor resistance in both directions by hand, but there was no consensus on
whether either direction provided a meaningful difference in counter-torque or not. Ultimately, this
portion of the experiment was inconclusive due to the power source limitations described in the
gate driver voltage issue section.
FIGURE 16 - READING MINUS NOISE
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1 // --- PWM Controller Code ---
2 // Older Versions Not Included
3
4
5 /*****************************************************************************
6 *
7 * Main PWM signal generator.
8 *
9 *****************************************************************************
10 * File Name: main.c
11 * Processor: CS110000
12 *
13 * Author Date Comment
14 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
15 *
16 * OC Lynam, Frank 11 Apr 2011 PWM Driver, Test Version 7
17 *
18 *****************************************************************************/
19
20 #include "CS110000.h"
2122 // I wrote the whole program so that the ph constant defines the number of phases, jus
for fun.
23 #define ph 3
24
25 // This is taken from the PWM_Base program
26 // First Issue: This program is incomplete, f when complete?
27 // Resolution: Improved Pulse function? We'll see
28 // Second issue: Can't reliably encode Vf in PWM_Base with this low of resolution...
maybe rework that system?
29 // Resolution: Have PWM_Base do different outputs for each program,
30 // using resolution of Vf as Vf control resolution31
32 // Using 18 and 19 for A and T provided ~ 60 Hz at old, 100% speed system
33 // With new, < 15% speed pulse code, this is a new combined resolution of > 6x origina
resolution
34 // Using A^2 + T^2 = Max Resolution, with New Max Resolution = 6 * Old Max Resolution
35 // A and T can go up by a factor of 6 ^ (1/2), which is ~ 2.5
36 // This makes a new low-end resolution for the generation of 60 Hz have A = T = ~44
37 // For a 0.1 Hz PWM_Base, we would need 600 times the number of entries of the 44 unit
resolution
38 // This is valid for T * 600 or A * 600, using A * 600 ^ (1/2) and T * 600 ^ (1/2)
39 // Note: 600 ^ (1/2) = 10 * 6 ^ (1/2) = ~25
40 // This allows A = 1100, T = 1100, thus using 10 bit: A = 1024, T = 1024
41 // Note: 10 bit is best for A, since that's used as an input for Vf, and a power of 2
would
42 // maximize the utility of the parrallel interface there. This can allow T to sca
up to 1192.
43 // ((686*6*600-1024^2)^(1/2))
44
45 // --- Using delta j in Pulse function for speed control:
46
47 // For Speed = 1 making .1 Hz, Speed = 600 will make 60 Hz. This allows for 10 bit
speed control, or
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48 // design for less than 60 Hz and use 9 bit speed control. Or, design A and T for 9 b
49 // speed control to make 60 Hz. For reference, a calculation to find T will be listed
based on
50 // desired number of bits for A:
51 // T = (686*6*600-2^(Number of bits for A * 2))^(1/2)
52
53 // New note: T bit resolution must be > Speed control bit resolution. Preferably, much
greater
54 // Maybe reduce A to make T more? Play with it later.
55
56 // Can't use bitdepth of speed control to find T, 600 speed control signal will produc
60 Hz (or so).
57
58 // Let's assume that we need at least 2^n PWM signals per cycle at 60 Hz
59 // (Note: this n is not the n in the code below)
60 // That means 2^T = 2^S * 2^n = 2^(S + n)
61 // That leaves A = (686*6*600 - 2^(2*(S + n)))^(1/2)
62 // S = 6, n = 3, 2^A = 1485
63 // S = 7, n = 3, 2^A = 1192
64 // S = 6, n = 4, 2^A = 1192
6566 // So, using S = 6, n = 4, T = 10, A = 10 should work.
67 // Only 1 Hz resolution is possible. Incorporated delay should be adjusted for that.
68
69 // --- Using delta V[i] in main loop for speed control:
70
71 // Need an n value of at least 4, like above
72 // Stepping faster through T instead of A, math should be the same
73 // Try S = 6, n = 4, T = 10, A = 10
74 // Should provide better solution by reducing harmonics due to skewed A resolution at
higher frequencies
75 // Drawback: PWM pulse frequency remains constant as output freq goes up, instead ofincreasing
76
77 // Ideal could be mixture of both? Maybe just do both and drop speed input bit depth b
1?
78 // Try that later
79
80 // Note on speed and 60 Hz:
81 // S has to be 9 to make 60 Hz, 6 bit speed will only reach 7 or 8 Hz = 192 RPM.
82 // If S = 9, n = 4, T = 13, then 2^A = 8000i, which is not possible
83 // The highest possible bit depth for T is ln(686*6*600)/(2*ln(2)) = 10.6
84
85 // Right now, this code produces almost exactly 1 Hz with Speed = 4
86 // That's a resolution of 0.25 Hz, with a range of +/-15.75 Hz
87
88 // --- Begin PWM_Base insertion for PWM controller ---
89
90 ROM int PWM_Base[ ] = {257, 259, 260, 262, 263, 265, 266, 268, 270, 271, 273, 274, 276
277, 279, 281, 282, 284, 285, 287, 288, 290, 292, 293, 295, 296, 298, 299, 301, 302,
, 305, 307, 309, 310, 312, 313, 315, 316, 318, 319, 321, 322, 324, 325, 327, 328, 330
331, 333, 334, 336, 337, 339, 340, 342, 343, 345, 346, 348, 349, 351, 352, 353, 355,
, 358, 359, 361, 362, 364, 365, 366, 368, 369, 371, 372, 373, 375, 376, 378, 379, 380
382, 383, 384, 386, 387, 388, 390, 391, 392, 394, 395, 396, 398, 399, 400, 402, 403,
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91 404, 405, 407, 408, 409, 411, 412, 413, 414, 415, 417, 418, 419, 420, 422, 423, 424,
, 426, 427, 429, 430, 431, 432, 433, 434, 435, 437, 438, 439, 440, 441, 442, 443, 444
445, 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461,
, 463, 464, 465, 466, 467, 467, 468, 469, 470, 471, 472, 473, 473, 474, 475, 476, 477
477, 478, 479, 480, 481, 481, 482, 483, 483, 484, 485, 486, 486, 487, 488, 488, 489,
, 490, 491, 491, 492, 493, 493, 494, 494, 495, 495, 496, 497,
92 497, 498, 498, 499, 499, 500, 500, 500, 501, 501, 502, 502, 503, 503, 503, 504, 504,
, 505, 505, 506, 506, 506, 507, 507, 507, 507, 508, 508, 508, 508, 509, 509, 509, 509
510, 510, 510, 510, 510, 510, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511,
, 511, 511, 512, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511, 511
510, 510, 510, 510, 510, 510, 509, 509, 509, 509, 508, 508, 508, 508, 507, 507, 507,
, 506, 506, 506, 505, 505, 505, 504, 504, 503, 503, 503, 502,
93 502, 501, 501, 500, 500, 500, 499, 499, 498, 498, 497, 497, 496, 495, 495, 494, 494,
, 493, 492, 491, 491, 490, 490, 489, 488, 488, 487, 486, 486, 485, 484, 483, 483, 482
481, 481, 480, 479, 478, 477, 477, 476, 475, 474, 473, 473, 472, 471, 470, 469, 468,
, 467, 466, 465, 464, 463, 462, 461, 460, 459, 458, 457, 456, 455, 454, 453, 452, 451
450, 449, 448, 447, 446, 445, 444, 443, 442, 441, 440, 439, 438, 437, 435, 434, 433,
, 431, 430, 429, 427, 426, 425, 424, 423, 422, 420, 419, 418,
94 417, 415, 414, 413, 412, 411, 409, 408, 407, 405, 404, 403, 402, 400, 399, 398, 396,
, 394, 392, 391, 390, 388, 387, 386, 384, 383, 382, 380, 379, 378, 376, 375, 373, 372
371, 369, 368, 366, 365, 364, 362, 361, 359, 358, 356, 355, 353, 352, 351, 349, 348,, 345, 343, 342, 340, 339, 337, 336, 334, 333, 331, 330, 328, 327, 325, 324, 322, 321
319, 318, 316, 315, 313, 312, 310, 309, 307, 305, 304, 302, 301, 299, 298, 296, 295, 2
, 292, 290, 288, 287, 285, 284, 282, 281, 279, 277, 276, 274,
95 273, 271, 270, 268, 266, 265, 263, 262, 260, 259, 257, 256, 254, 252, 251, 249, 248, 2
, 245, 243, 241, 240, 238, 237, 235, 234, 232, 230, 229, 227, 226, 224, 223, 221, 219
218, 216, 215, 213, 212, 210, 209, 207, 206, 204, 202, 201, 199, 198, 196, 195, 193,
, 190, 189, 187, 186, 184, 183, 181, 180, 178, 177, 175, 174, 172, 171, 169, 168, 166
165, 163, 162, 160, 159, 158, 156, 155, 153, 152, 150, 149, 147, 146, 145, 143, 142,
, 139, 138, 136, 135, 133, 132, 131, 129, 128, 127, 125, 124,
96 123, 121, 120, 119, 117, 116, 115, 113, 112, 111, 109, 108, 107, 106, 104, 103, 102,
, 99, 98, 97, 96, 94, 93, 92, 91, 89, 88, 87, 86, 85, 84, 82, 81, 80, 79, 78, 77, 76,, 73, 72, 71, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53,
, 51, 50, 49, 48, 47, 46, 45, 44, 44, 43, 42, 41, 40, 39, 38, 38, 37, 36, 35, 34, 34,
, 32, 31, 30, 30, 29, 28, 28, 27, 26, 25, 25, 24, 23, 23, 22, 21,
97 21, 20, 20, 19, 18, 18, 17, 17, 16, 16, 15, 14, 14, 13, 13, 12, 12, 11, 11, 11, 10, 1
9, 9, 8, 8, 8, 7, 7, 6, 6, 6, 5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1
, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4,
98 5, 5, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13, 13, 14, 14, 15
16, 16, 17, 17, 18, 18, 19, 20, 20, 21, 21, 22, 23, 23, 24, 25, 25, 26, 27, 28, 28, 2
30, 30, 31, 32, 33, 34, 34, 35, 36, 37, 38, 38, 39, 40, 41, 42, 43, 44, 44, 45, 46, 4
48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 6
70, 71, 72, 73, 74, 76, 77, 78, 79,
99 80, 81, 82, 84, 85, 86, 87, 88, 89, 91, 92, 93, 94, 96, 97, 98, 99, 100, 102, 103, 10
106, 107, 108, 109, 111, 112, 113, 115, 116, 117, 119, 120, 121, 123, 124, 125, 127,
, 129, 131, 132, 133, 135, 136, 138, 139, 140, 142, 143, 145, 146, 147, 149, 150, 152
153, 155, 156, 158, 159, 160, 162, 163, 165, 166, 168, 169, 171, 172, 174, 175, 177,
, 180, 181, 183, 184, 186, 187, 189, 190, 192, 193, 195, 196, 198, 199, 201, 202, 204
206, 207, 209, 210, 212, 213, 215, 216, 218,
100 219, 221, 223, 224, 226, 227, 229, 230, 232, 234, 235, 237, 238, 240, 241, 243, 245, 2
, 248, 249, 251, 252, 254, 256};
101
102 int A = 512, T = 1024, Vf_Scale = 8;
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145 //for ( i = 0; i < 7; i++ )
146 // STPIND(39 + i, GTPIND(30 + i));
147 Speed = ((GTPIND(30) * 32) + (GTPIND(31) * 16) + (GTPIND(32) * 8) + (GTPIND(3
* 4) + (GTPIND(34) * 2) + GTPIND(35) ) * ( (GTPIND(36) * 2) - 1);
148
149 // The Vf signal will be encoded by the HID cstamp, reducing the error in this
PWM loop
150 // It effectively has to be an inverse sine function, or if I want to be lazy
could have it sit between the two peaks
151 V[ph] = ( (GTPIND(8) * 64) + (GTPIND(9) * 32) + (GTPIND(10) * 16) + (GTPIND(11
8) + (GTPIND(12) * 4) + (GTPIND(13) * 2) + GTPIND(14)) * Vf_Scale;
152
153 // Any delays resultant from operations in the control loop will simply provid
a DC offset to the output,
154 // assuming those delays are determinate, which at the time of writing this
comment they are.
155 Pulse();
156 }
157 // Idea for speed control: Change the jumps in the pulse loop. Bigger jumps =
fractionally higher speeds
158 // With this, I can key the PWM_Base frequency at something like 0-1 Hz, and itwould be something like
159 // variable resolution speed control. Higher A and T bitdepth will allow even lowe
speed resolutions.
160
161 // Another idea for speed control: Change the change in V[i] instead of changing
delta j in the PWM loop.
162 // This should allow a maximum output frequency of ~15 Hz without significantly
sacrificing output resolution
163 // in any one dimension.
164 }
165166 void Pulse()
167 {
168
169 // Put this in here to allow multiple uses of pulse function in main loop to reduc
impact of data input
170 for(i = 0; i < ph; i++)
171 {
172 V[i] = (V[i] + Speed) % T;
173 if ( V[i] < 0 )
174 V[i] += T;
175 }
176
177 // Might should go "High -> Low" then "Low -> High" for each swap so that the
transistors are all off for
178 // some miniscule period of time to prevent shorting the source... Or vice versa
depending on the gate
179 // controller, which seems to be active high but might not be.
180
181 for(k = 0; k
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185 }
186
187 /* Solution 1: *
188
189 // Puts them in the starting position, k + ph + 1 is the opposing voltage signal,
ph is the Vf signal
190 for(k = 0; k
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235 PWM_Key[k] = i;
236
237 i = PWM_Key[j];
238 PWM_Key[j] = PWM_Key[k];
239 PWM_Key[k] = i;
240 }
241
242 // This formats the values to make the loop below smoother, and provides them with
a constant V/F shift
243 // Speed_Shift = (64 - (64 - (abs(Speed))) * 2 / 3);
244 for ( i = 0; i >6);
246 PWM_Base_Ref_2[0] = 0;
247 PWM_Base_Ref_2[ph + 2] = A;//((A * Speed_Shift)>>6);
248 PWM_Base_Ref_2[ph + 3] = A;
249
250 // This must be paired with a Speed-- down below
251 //Speed++;
252
253 // Puts them in the starting position, k + ph + 1 is the opposing voltage signal,
ph is the Vf signal254 for(k = 0; k
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330 int Vf_Max = 127, Speed_Max = 63;
331
332 // --- End PWM_Base insertion for HID controller ---
333
334 void Writeout(int Output, char Pin, char Bits);
335
336 void OutputToLCD(float i);
337
338 void main(void)
339 {
340
341 /*Planned program diagram:
342 Starting Check:
343 -Turn on, check display (can comment out for real use)
344 -Print out words on LCD
345 -Initialize variables and speeds
346
347 Repeat Loop:
348 -Use ANALOGIN to receive signal from motor or SERIN from C Stamp 1
349 -Convert signal to current speed (ignore if signal from SERIN)
350 -Print status and input on LCD Display351 -Get ready for input
352 -Print input on screen if one shows up, continue on with loop
353 -Upon send command (#), set input speed as new speed, then continue loop
354 -Perform speed operations based on
355 */
356
357 BYTE k[12][2] = {"0","1","2","3","4","5","6","7","8","9","*","#"};
358 BYTE status1[] = "Target RPM:";
359 BYTE status1_L = 12; //Length of status 1
360 BYTE status2[] = "Current RPM:";
361 BYTE status2_L = 13; //Length of status 2362 BYTE status3[] = "New RPM:";
363 BYTE status3_L = 9; //Length of string 3
364 BYTE status4[] = "Vf Signal:";
365 BYTE status4_L = 11; //Length of string 4
366
367 int key; //Input from keypad
368 int length = 5; //Setting buffer length (Do we need that fifth sp
for the null?)
369 int tar_speed = 0; //Target speed. Refreshed when we get
new input
370 int cur_speed = 0; //Current speed. Shows user the
transition from old speed to new
371 int new_speed = 0; //
372 int vf_signal = 0;
373 int i = 0, j, l;
374
375 float Ia, Last_Ia;
376 int Vf_Delta = 1, Vf_Position = Vf_Max / 3;
377
378
379 // int buffer; //For receiving the input from the keypad
380 // int RPM_Output, RPM_Input = 0;
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432 new_speed=(new_speed*10+key)%1000;
433 while ((key=LCDIN_CS410000())
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accuracy of +/- 0.05 V.
483 Ia = ANALOGIN(19, 1, 0, 0, 0);
484
485 // This will obviously provide counter-corrective indications for dynamic
loading, but the goal
486 // isn't to provide an ideal PID loop, just to demonstrate digital control
capability.
487
488 /* Vf Control Normal Mode */
489 // Only change Vf_Delta if Ia is increasing
490 if ( Ia > Last_Ia )
491 Vf_Delta = -1 * Vf_Delta;
492
493 Last_Ia = Ia;
494 /* */
495
496 /* Vf Control Test Mode *
497
498 if ( Ia > 3 )
499 Vf_Delta = 1;
500 else501 if ( Ia < 1 )
502 Vf_Delta = -1;
503 else
504 Vf_Delta = 0;
505 /* */
506
507 // Limit testing
508 if ( Vf_Position >= Vf_Max )
509 Vf_Delta = -1;
510
511 if ( Vf_Position < 1 )512 Vf_Delta = 1;
513
514 // Only change Vf_Position if Ia is changing significantly
515 Vf_Position += Vf_Delta;
516
517 STPIND(46, HIGH);
518 }
519
520 Writeout(Vf_Ref[Vf_Position], 8, 7);
521 Writeout(abs(cur_speed), 39, 6);
522 if ( cur_speed == 0 )
523 STPIND(45, LOW);
524 else
525 STPIND(45, cur_speed/abs(cur_speed) + 1);
526 };
527
528 }
529
530
531 // -- Writeout code --
532 // Has graceful failure mode, where values > the max possible with the input bitdepth
are output as all 1s
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533 // This is good, because the Vf_Ref generation often ends with 2^Vf_Bits which is too
big for Vf_Bits bits
534 void Writeout(int Output, char Pin, char Bits)
535 {
536 // This might do the same as the possible faster BYTEOUT function, but this way
actually works consistently
537 // Also, cycle speed is much less important for the HID loop
538 int Ret = 0, k = 1, i;
539
540 for ( i = 1; i < Bits; i++ )
541 k *= 2;
542
543 for(i = Bits; i >= 0; i--)
544 {
545 STPIND(Pin + Bits - i, Output >= k);
546 Output -= k * (Output >= k);
547 k /= 2;
548 }
549 }
550
551 /*552 //Everything found below is for when I've gotten the code down pat, and want to
553 make it look good. For now, I'll leave them out
554
555 }
556
557 void key_input(int key)
558 {
559 LCDOUT_CS410000(k[key],1); //Print out numbers on LCD
560 buffer[i]=LCDIN_CS410000(void) //send keypad input to buffer
561 i++;
562 }563
564 void reset
565 {
566 //Clear screen
567 LCDCMD_CS410000(11,0,0,0,0,0,0,0,0); //Clear screen
568 LCDCMD_CS410000(15,0,0,0,0,0,0,0,0); //Turns backlight on
569
570 //Displays word set on the 1st, 2nd and 3rd lines
571 LCDCMD_CS410000(1,0,0,0,0,0,0,0,0); //Sets cursor to home position
572 LCDOUT_CS410000(status1,status1_L); //Prints out status message 1
573 LCDCMD_CS410000(2,21,0,0,0,0,0,0,0); //Sets cursor to 2nd line
574 LCDOUT_CS410000(status2,status2_L); //Prints out status message 2
575 LCDCMD_CS410000(2,41,0,0,0,0,0,0,0); //Sets cursor to 3rd line
576 LCDOUT_CS410000(status3,status3_L); //Prints out status message 2
577 }*/
578
579
580 void OutputToLCD(float Input)
581 {
582 char array[5] = {32, 32, 32, 32, 0};
583 int j = 0, k = 0, Sign = 1, i = Input;
584
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796 PWM_Base_Ref[k] = i;
797
798 i = PWM_Key[j];
799 PWM_Key[j] = PWM_Key[k];
800 PWM_Key[k] = i;
801 }
802
803 PWM_Base_Ref_2[0] = 0;
804 for ( i = 0; i
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V A R I A B L E F R E Q U E N C Y T H R E E P H A S E
P W M S Y N C H R O N O U S M O T O R
C O N T R O L L E R A N D P O W E R S Y S T E M
F RANK L YNAM ROB ERT L ESH ER G REG ORY L EVANTI NO AP RI L 2 8 , 2 0 1 1
ENGR 384 ENGR 428 ENGR 484
ADDENDUM 1 COMMUNICATIONS SYSTEMS
The particular pins on which the PWM output control signals were generated were pins 39 through
46. Pins 39 through 41 were the three primary phase signals, with 42 through 44 as their
complements. Pins 45 and 46 were the VF control signal and its complement. How these PWM
control signals were generated is discussed in great detail in the signal modulation section of the
main document. The gate driving circuit was connected directly to these pins as appropriate.
Communication between the two boards was accomplished via a passive parallel signal to eliminate
wasteful serial communication which would drastically disrupt the cycling rate of the PWM
generation microcontroller. Just by connecting pins from one controller directly to the other,
communication can be achieved using simple STPIND and GTPIND. By outputting the binary value
of a control signal on one controller, it can be directly and asynchronously read by the other. This
additionally allowed for a more deterministic loop on the PWN controller.
The field voltage control signal was output from the HID controller using the Writeout function
described in the main document on pins 8 through 14. The PWM speed control signal was similarly
output from the HID controller on pins 39 through 44, with a direction control signal on pin 45.
Obviously, the grounds between the two boards had to be connected as well.
The field voltage control signal was read in on the PWM controller using a series of GTPIND
commands for the appropriate pins and multiplied by the appropriate powers of 2. This signal was
read across pins 8 through 14. The speed control and direction signal were input into the PWMcontroller across pins 30 through 26.
These communication lines were connected via a custom, seven-wire cable with hand-soldered
header connections.