2.War Haed Robot(Doc)

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DPH High byte

P0 Port0

P1 Port1

P2 Port2

P3 Port3

IP Interrupt priority control

IE Interrupt enable control

TMOD Timer/counter mode controlTCON Timer/counter control

T2CON Timer/counter 2 control

T2MOD Timer/counter mode2 control

TH0 Timer/counter 0high byte

TL0 Timer/counter 0 low byte

TH1 Timer/counter 1 high byte


TH2 Timer/counter 2 high byte


SCON Serial controlSBUF Serial data buffer

RFID Radio Frequency IDentification

MAX MAXIM (IC manufacturer )

TTL Transistor to Transistor Logic

ATM Automatic Teller Machine

RS 232 Recommended Standard

AC Alternating Current

DC Direct Current

LCD Liquid Crystal Display

PC Personal Computer

RPS Regulated Power Supply

RMS Root Mean Square

EEPROM Electrically Erasable Programmable ROM

ROM Read Only Memory

RAM Random Access Memory

BIOS Basic Input Output System

SRAM Static RAM

EPROM Erasable Programmable ROM

DRAM Dynamic Random Access Memory

ISR Interrupt Service Routine

I2C Inter Intergrated ChipTWI Two Wire Interface


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Figure Locations

S.No. Figure Page No.

1Components of Typical Linear PowerSupply

2 An Electrical Transformer 3 Bridge Rectifier

4 Bridge Rectifier Positive Cycle5 Bridge Rectifier Negative Cycle6 Three terminal voltage Regulator 7 Functional Diagram of Microcontroller8 Pin Diagram of Microcontroller 9 Oscillator connections

10 External clock drive connections11 A register 12 B register 13 RAM14 RAM Allocation

15 Register Banks16 PSW17 DPTR 18 SP19 PORT 020 TL0 and TH021 DB9222324

25262728293031323334353637383940

4. INTRODUCTION

The aim of the project is design an unmanned robotic war head vehicle which can be used in the war

fields which is remotely controlled via zig bee technology.

This projects employees a tactual wheeled vehicle which is driven by two gear motor making it move


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The vechile is provided with a bomb detector which can detect land mine with war crafts safety guiding the

robotic system .a voiding to walk through such hazardous conditions.

The whole system which is explained above gets the commands from the base station through zig bee

wireless technology

5. Block Diagram

TRNAMITTER SECTION:

RECEIVER SECTION:

MICRO

CONTROLLE

R

Zig bee

transmitter

Buzzer

LCD

Power

supply

Keypad

Microcontroller H Bridge

H Bridge

zigbee

Bombdetector

M1

M2

M3


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5.1Block Diagram Description

Power Supply Section: This section is meant for supplying Power to all the sections mentioned above.It

basically consists of a Transformer to step down the 230V ac to 9V ac followed by diodes. Here diodes are

used to rectify the ac to dc. After rectification the obtained rippled dc is filtered using a capacitor Filter. A

positive voltage regulator is used to regulate the obtained dc voltage.

Microcontroller Section: This section forms the control unit of the whole project. This section basically

consists of a Microcontroller with its associated circuitry like Crystal with capacitors, Reset circuitry, Pull

up resistors (if needed) and so on. The Microcontroller forms the heart of the project because it controls the

devices being interfaced and communicates with the devices according to the program being written.

Keypad Section: This section consists of a Linear Keypad. This keypad is used to enter the no. of liters of

petrol required. The keypad is interfaced to microcontroller which continuously scans the keypad.

LCD Display Section: This section is basically meant to show up the status of the project. This project

makes use of Liquid Crystal Display to display / prompt for necessary information.

Buzzer: buzzer is used for the indication purpose .so here the buzzer is used for detection of bomb in the

middle of the path.

H Bridge: h bridge is used for the driving of the two motors at a time. So that we can move the robot in the

required direction.

Dc Motor: dc motor is mainly used for the motion of the robot so here we use four motor .two motors forthe motion of the robot, one motor for the rotation of the gun toward the target and fourth motor is used

functioning of the gun.

Metal Detector: metal detector is used for thedetection of the bomb in the path of the vechile in the war

field.

Zig bee: zig bee is a wireless technology used for the distance of 20 to 80 meters. Here we can transfer thedata from transmitter part to the receiver part beyond the distance using the different topology types.


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6. SCHEMATIC

Schematic Description

7.HARDWARE Components

The Hardware components used in this project are

Regulated Power Supply

Microcontroller

Keypad

LCD

Buzzer

H Bridge

Dc Motor

Metal Detector

ZIG BEE

7.1 REGULATED POWER SUPPLY

The power supplies are designed to convert high voltage AC mains electricity to a suitable low voltage

supply for electronic circuits and other devices. A RPS (Regulated Power Supply) is the Power Supply

with Rectification, Filtering and Regulation being done on the AC mains to get a Regulated power supply

for Microcontroller and for the other devices being interfaced to it.

A power supply can by broken down into a series of blocks, each of which performs a particular function. A

d.c power supply which maintains the output voltage constant irrespective of a.c mains fluctuations or load

variations is known as Regulated D.C Power Supply

For example a 5V regulated power supply system as shown below:


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Transformer:

A transformer is an electrical device which is used to convert electrical power from one

Electrical circuit to another without change in frequency.

Transformers convert AC electricity from one voltage to another with little loss of power. Transformers

work only with AC and this is one of the reasons why mains electricity is AC. Step-up transformers

increase in output voltage, step-down transformers decrease in output voltage. Most power supplies use a

step-down transformer to reduce the dangerously high mains voltage to a safer low voltage. The input coil

is called the primary and the output coil is called the secondary. There is no electrical connection between

the two coils; instead they are linked by an alternating magnetic field created in the soft-iron core of the

transformer. The two lines in the middle of the circuit symbol represent the core. Transformers waste very

little power so the power out is (almost) equal to the power in. Note that as voltage is stepped down current

is stepped up. The ratio of the number of turns on each coil, called the turns ratio, determines the ratio of

the voltages. A step-down transformer has a large number of turns on its primary (input) coil which is

connected to the high voltage mains supply, and a small number of turns on its secondary (output) coil to

give a low output voltage.


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An Electrical Transformer

Turns ratio = Vp/ VS = Np/NS

Power Out= Power In

VS X IS=VP X IP

Vp = primary (input) voltage

Np = number of turns on primary coil

Ip = primary (input) current

RECTIFIER:

A circuit which is used to convert a.c to dc is known as RECTIFIER. The process of conversion a.cto d.c is called rectification

TYPES OF RECTIFIERS:

Half wave Rectifier Full wave rectifier

1. Centre tap full wave rectifier.2. Bridge type full bridge rectifier.

Comparison of rectifier circuits:

arameterType of Rectifier

Half wave Full wave Bridge

Number of diodes 1

2

4

IV of diodes Vm

2Vm Vm

.C output voltage

Vm/

2Vm/

2Vm/

Vdc,at

o-load

0.318Vm0.636Vm 0.636Vm

i l f t

1 21

0 482

0 482


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frequency f 2f 2fRectificationefficiency

0.406

0.812

0.812TransformerUtilizationFactor(TUF)

0.287 0.693 0.812

MS voltage Vrms Vm/2 Vm/2 Vm/2

Full-wave Rectifier:

From the above comparison we came to know that full wave bridge rectifier as more advantages than the

other two rectifiers. So, in our project we are using full wave bridge rectifier circuit.

Bridge Rectifier: A bridge rectifier makes use of four diodes in a bridge arrangement to achieve full-wave

rectification. This is a widely used configuration, both with individual diodes wired as shown and with

single component bridges where the diode bridge is wired internally.

A bridge rectifier makes use of four diodes in a bridge arrangement as shown in fig (a) to achieve

full-wave rectification. This is a widely used configuration, both with individual diodes wired as shown and

with single component bridges where the diode bridge is wired internally.

Fig (A)

Operation:

During positive half cycle of secondary, the diodes D2 and D3 are in forward biased while D1 and D4 are in

reverse biased as shown in the fig(b). The current flow direction is shown in the fig (b) with dotted arrows.


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Fig (B)

During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward biased while D2 and

D3 are in reverse biased as shown in the fig(c). The current flow direction is shown in the fig (c) with dotted

arrows.

Fig(C)

Filter:

A Filter is a device which removes the a.c component of rectifier output but allows the d.c

component to reach the load

Capacitor Filter:

We have seen that the ripple content in the rectified output of half wave rectifier is 121% or that of full-

wave or bridge rectifier or bridge rectifier is 48% such high percentages of ripples is not acceptable for most

of the applications. Ripples can be removed by one of the following methods of filtering.

(a) A capacitor, in parallel to the load, provides an easier by pass for the ripples voltage though it due to

low impedance. At ripple frequency and leave the D.C. to appear at the load.

(b) An inductor, in series with the load, prevents the passage of the ripple current (due to high impedance at

ripple frequency) while allowing the d.c (due to low resistance to d.c)


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(c) Various combinations of capacitor and inductor, such as L-section filter section filter, multiple

section filter etc. which make use of both the properties mentioned in (a) and (b) above. Two cases of

capacitor filter, one applied on half wave rectifier and another with full wave rectifier.

Filtering is performed by a large value electrolytic capacitor connected across the DC supply to act

as a reservoir, supplying current to the output when the varying DC voltage from the rectifier is falling. Thecapacitor charges quickly near the peak of the varying DC, and then discharges as it supplies current to the

output. Filtering significantly increases the average DC voltage to almost the peak value (1.4 RMS value).

To calculate the value of capacitor(C),

C = *3*f*r*Rl

Where,

f = supply frequency,

r = ripple factor,

Rl = load resistance

Note: In our circuit we are using 1000F hence large value of capacitor is placed to reduce ripples

and to improve the DC component.

Regulator:

Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or variable output voltages. The

maximum current they can pass also rates them. Negative voltage regulators are available, mainly for use in

dual supplies. Most regulators include some automatic protection from excessive current ('overload

protection') and overheating ('thermal protection'). Many of the fixed voltage regulators ICs have 3 leads

and look like power transistors, such as the 7805 +5V 1A regulator shown on the right. The LM7805 is

simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from

9VDC to 24VDC) to the Input pin, connect the negative lead to the Common pin and then when you turn on

the power, you get a 5 volt supply from the output pin.

Fig 6.1.6 A Three Terminal Voltage Regulator

78XX:

The Bay Linear LM78XX is integrated linear positive regulator with three terminals. The LM78XX

offer several fixed output voltages making them useful in wide range of applications When used as a zener


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improvement of two orders of magnitude, lower quiescent current. The LM78XX is available in the TO-252,

TO-220 & TO-263packages,

Features:

Output Current of 1.5A

Output Voltage Tolerance of 5%

Internal thermal overload protection Internal Short-Circuit Limited

Output Voltage 5.0V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 24V.

7.2 MICRO CONTROLLER 89S52

Introduction

A Micro controller consists of a powerful CPU tightly coupled with memory, various I/O interfaces

such as serial port, parallel port timer or counter, interrupt controller, data acquisition interfaces-Analog toDigital converter, Digital to Analog converter, integrated on to a single silicon chip.

If a system is developed with a microprocessor, the designer has to go for external memory such as

RAM, ROM, EPROM and peripherals. But controller is provided all these facilities on a single chip.

Development of a Micro controller reduces PCB size and cost of design.

One of the major differences between a Microprocessor and a Micro controller is that a controller often

deals with bits not bytes as in the real world application.

Intel has introduced a family of Micro controllers called the MCS-51.

The Major Features:

Compatible with MCS-51 products

4k Bytes of in-system Reprogrammable flash memory

Fully static operation: 0HZ to 24MHZ

Three level programmable clock

128 * 8 bit timer/counters Six interrupt sources

Programmable serial channel

Low power idle power-down modes

Why AT 89S52

The system requirements and control specifications clearly rule out the use of 16, 32 or 64 bit micro

controllers or microprocessors Systems using these may be earlier to implement due to large number of


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above application. Using an inexpensive 8-bit Microcontroller will doom the 32-bit product failure in any

competitive market place.

Coming to the question of why to use AT89S52 of all the 8-bit microcontroller available in the

market the main answer would be because it has 4 Kb on chip flash memory which is just sufficient for our

application. The on-chip Flash ROM allows the program memory to be reprogrammed in system or by

conventional non-volatile memory Programmer. Moreover ATMEL is the leader in flash technology intodays market place and hence using AT 89S52 is the optimal solution.

AT89S52 MICROCONTROLLER ARCHITECTURE

The 89S52 architecture consists of these specific features:

Eight bit CPU with registers A (the accumulator) and B Sixteen-bit program counter (PC) and data pointer (DPTR)

Eight- bit stack pointer (PSW)

Eight-bit stack pointer (Sp)

Internal ROM or EPROM (8751) of 0(8031) to 64K (89S52)

Internal RAM of 128 bytes:

1. Four register banks, each containing eight registers

2. Sixteen bytes, which may be addressed at the bit level

3. Eighty bytes of general- purpose data memory

Thirty two input/output pins arranged as four 8-bit ports:p0-p3

Two 16-bit timer/counters: T0 and T1

Full duplex serial data receiver/transmitter: SBUF

Control registers: TCON, TMOD, SCON, PCON, IP, and IE

Two external and three internal interrupts sources. Oscillator and clock circuits.


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Functional block diagram of micro controller

The 89S52 oscillator and clock:

The heart of the 89S52 circuitry that generates the clock pulses by which all the internal all internal

operations are synchronized. Pins XTAL1 And XTAL2 is provided for connecting a resonant network toform an oscillator. Typically a quartz crystal and capacitors are employed. The crystal frequency is the basic

internal clock frequency of the microcontroller. The manufacturers make 89S52 designs that run at specific

minimum and maximum frequencies typically 1 to 16 MHz.


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Fig 3.7.2: - Oscillator and timing circuit

Types of memory:

The 89C51 have three general types of memory. They are on-chip memory, external Code memory

and external Ram. On-Chip memory refers to physically existing memory on the micro controller itself.

External code memory is the code memory that resides off chip. This is often in the form of an external

EPROM. External RAM is the Ram that resides off chip. This often is in the form of standard static RAM

or flash RAM.

a) Code memory

Code memory is the memory that holds the actual 89S52 programs that is to be run. This memory is

limited to 64K. Code memory may be found on-chip or off-chip. It is possible to have 4K of code memory

on-chip and 60K off chip memory simultaneously. If only off-chip memory is available then there can be

64K of off chip ROM. This is controlled by pin provided as EA

b) Internal RAM


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The 89S52 have a bank of 128 of internal RAM. The internal RAM is found on-chip. So it is the

fastest Ram available. And also it is most flexible in terms of reading and writing. Internal Ram is volatile,

so when 89C51 is reset, this memory is cleared. 128 bytes of internal memory are subdivided. The first 32

bytes are divided into 4 register banks. Each bank contains 8 registers. Internal RAM also contains 128 bits,

which are addressed from 20h to 2Fh. These bits are bit addressed i.e. each individual bit of a byte can be

addressed by the user. They are numbered 00h to 7Fh. The user may make use of these variables withcommands such as SETB and CLR.

FLASH MEMORY:

Flash memory (sometimes called "flash RAM") is a type of constantly-powered non volatile that can

be erased and reprogrammed in units of memory called blocks. It is a variation of electrically erasable

programmable read-only memory (EEPROM) which, unlike flash memory, is erased and rewritten at thebyte level, which is slower than flash memory updating. Flash memory is often used to hold control code

such as the basic input/output system (BIOS) in a personal computer. When BIOS needs to be changed

(rewritten), the flash memory can be written to in block (rather than byte) sizes, making it easy to update. On

the other hand, flash memory is not useful as random access memory (RAM) because RAM needs to be

addressable at the byte (not the block) level.

Flash memory gets its name because the microchip is organized so that a section of memory cells are

erased in a single action or "flash." The erasure is caused by Fowler-Nordheim tunneling in which electrons

pierce through a thin dielectric material to remove an electronic charge from afloating gate associated with

each memory cell. Intel offers a form of flash memory that holds two bits (rather than one) in each memory

cell, thus doubling the capacity of memory without a corresponding increase in price.

Flash memory is used in digital cellular phones, digital cameras, LAN switches, PC Cards for

notebook computers, digital set-up boxes, embedded controllers, and other devices.

Memory Type

Features

FLASH Low-cost, high-density, high-speed

architecture; low power; high reliability

ROM

Read-Only Memory

Mature, high-density, reliable, low cost;

time-consuming mask required, suitable

for high production with stable code

SRAM Hi h t d hi h l d it


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EPROM

Electrically Programmable Read-Only

Memory

High-density memory; must be exposed

to ultraviolet light for erasure

EEPROMorE2PROM

Electrically Erasable Programmable

Read-Only Memory

Electrically byte-erasable; lower

reliability, higher cost, lowest density

DRAM

Dynamic Random Access Memory

High-density, low-cost, high-speed,

high-power

Technical Overview of Flash Memory

Flash memory is a nonvolatile memory using NOR technology, which allows the user to electrically

program and erase information. Intel Flash memory uses memory cells similar to an EPROM, but with a

much thinner, precisely grown oxide between the floating gate and the source (see Figure 2). Flash

programming occurs when electrons are placed on the floating gate. The charge is stored on the floating

gate, with the oxide layer allowing the cell to be electrically erased through the source. Intel Flash memory

is an extremely reliable nonvolatile memory architecture.


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Fig 3.7.3: - Pin diagram of AT89S52

Pin Description:

VCC: Supply voltage.

GND: Ground.Port 0:

Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL

inputs. When ones are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also

be configured to be the multiplexed low order address/data bus during accesses to external program and data

memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash

programming, and outputs the code bytes during program verification. External pull-ups are required during

program verification.

Port 1:

Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups

and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current

(IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash

programming and verification.

Port 2:



and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current

(IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external

program memory and during accesses to external data memories that use 16-bit addresses (MOVX

@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external

data memories that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function

Register. Port 2 also receives the high-order address bits and some control signals during Flash

programming and verification.

Port 3:



and can be used as inputs As inputs Port 3 pins that are externally being pulled low will source current


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Port 3 also serves the functions of various special features of the AT89C51 as listed below:

Port 3 also receives some control signals for Flash programming and verification

Tab 6.2.1 Port pins and their alternate functions

RST:

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

device.

ALE/PROG:

Address Latch Enable output pulse for latching the low byte of the address during accesses to

external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal

operation ALE is emitted at a constant rate of 1/6the oscillator frequency, and may be used for external

timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external

Data Memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is

active only during a MOVX or MOVC instruction. Otherwise, the pin is pulled high. Setting the ALE-

disable bit has no effect if the microcontroller is in external execution mode.

PSEN:

Program Store Enable is the read strobe to external program memory. When the AT89C51 is

executing code from external program memory, PSEN is activated twice each machine cycle, except that

two PSEN activations are skipped during each access to external data memory.

EA/VPP:

External Access Enable EA must be strapped to GND in order to enable the device to fetch code


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Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt

programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2:

It is the Output from the inverting oscillator amplifier.

Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can beconfigured for use as an on-chip oscillator, as shown in Figs 6.2.3. Either a quartz crystal or ceramic

resonator may be used. To drive the device from an external clock source, XTAL2 should be left

unconnected while XTAL1 is driven as shown in Figure 6.2.4.There are no requirements on the duty cycle

of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-

flop, but minimum and maximum voltage high and low time specifications must be observed.

Fig 6.2.3 Oscillator Connections Fig 6.2.4 External Clock Drive Configuration

Notes:

1. Under steady state (non-transient) conditions, IOL must be externally

limited as follows:

Maximum IOL per port pin: 10 mA

Maximum IOL per 8-bit port: Port 0: 26 mA

Ports 1, 2, 3: 15 mA Maximum total IOL for all output pins: 71 mA


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If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not

guaranteed to sink current greater than the listed test conditions.

2. Minimum VCC for Power-down is 2V.

REGISTERS:

In the CPU, registers are used to store information temporarily. That information could be a byte ofdata to be processed, or an address pointing to the data to be fetched. The vast majority of 8051 registers are

8bit registers. In the 8051 there is only one data type: 8bits. The 8bits of a register are shown in the

diagram from the MSB (most significant bit) D7 to the LSB (least significant bit) D0. With an 8-bit data

type, any data larger than 8bits must be broken into 8-bit chunks before it is processed. Since there are a

large number of registers in the 8051, we will concentrate on some of the widely used general-purpose

registers and cover special registers in future chapters.

D7 D6 D5 D4 D3 D2 D1 D0

The most widely used registers of the 8051 are A (accumulator), B, R0, R1, R2, R3, R4, R5, R6, R7,

DPTR (data pointer), and PC (program counter). All of the above registers are 8-bits, except DPTR and the

program counter. The accumulator, register A, is used for all arithmetic and logic instructions.

SFRs (Special Function Registers)

Among the registers R0-R7 is part of the 128 bytes of RAM memory. What about registers A, B,

PSW, and DPTR? Do they also have addresses? The answer is yes. In the 8051, registers A, B, PSW and

DPTR are part of the group of registers commonly referred to as SFR (special function registers). There are

many special function registers and they are widely used. The SFR can be accessed by the names (which is

much easier) or by their addresses. For example, register A has address E0h, and register B has been ignited

the address F0H, as shown in table.

The following two points should noted about the SFR addresses.

1. The Special function registers have addresses between 80H and FFH. These addresses are above

80H, since the addresses 00 to 7FH are addresses of RAM memory inside the 8051.

2. Not all the address space of 80H to FFH is used by the SFR. The unused locations 80H to FFH

are reserved and must not be used by the 8051 programmer.

Regarding direct addressing mode, notice the following two points: (a) the address value is limited to

one byte 00 FFH which means this addressing mode is limited to accessing RAM locations and registers


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located inside the 8051. (b) If you examine the l st file for an assembly language program, you will see that

the SFR registers names are replaced with their addresses as listed in table.

Symbol Name Address

ACC Accumulator 0E0HB B register 0F0HPSW Program status word 0D0HSP Stack pointer 81HDPTR Data pointer 2 bytesDPL Low byte 82HDPH High byte 83HP0 Port0 80HP1 Port1 90HP2 Port2 0A0HP3 Port3 0B0HIP Interrupt priority control 0B8HIE Interrupt enable control 0A8H

TMOD Timer/counter mode control 89HTCON Timer/counter control 88HT2CON Timer/counter 2 control 0C8HT2MOD Timer/counter mode2 control 0C9HTH0 Timer/counter 0high byte 8CHTL0 Timer/counter 0 low byte 8AHTH1 Timer/counter 1 high byte 8DHTL1 Timer/counter 1 low byte 8BHTH2 Timer/counter 2 high byte 0CDHTL2 Timer/counter 2 low byte 0CCH

RCAP2H T/C 2 capture register high byte 0CBHRCAP2L T/C 2 capture register low byte 0CAHSCON Serial control 98HSBUF Serial data buffer 99HPCON Power control 87H

Table: 8051 Special function register Address

A Register (Accumulator)

This is a general-purpose register which serves for storing intermediate results during operating. A number

(an operand) should be added to the accumulator prior to execute an instruction upon it. Once an

arithmetical operation is preformed by the ALU, the result is placed into the accumulator. If a data should be

transferred from one register to another, it must go through accumulator. For such universal purpose, this is

th t l d i t th t i t ll b i i d ith t ( th h lf 8051


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B Register

B register is used during multiply and divide operations which can be performed only upon numbers stored

in the A and B registers. All other instructions in the program can use this register as a spare accumulator

(A).

During programming, each of registers is called by name so that their exact address is

not so important for the user. During compiling into machine code (series of hexadecimal numbers

recognized as instructions by the microcontroller), PC will automatically, instead of registers name, write

necessary addresses into the microcontroller.

R Registers (R0-R7)

This is a common name for the total 8 general purpose registers (R0, R1, and R2 ...R7). Even they are not

true SFRs, they deserve to be discussed here because of their purpose. The bank is active when the R

registers it includes are in use. Similar to the accumulator, they are used for temporary storing variables and

intermediate results. Which of the banks will be active depends on two bits included in the PSW Register.

These registers are stored in four banks in the scope of RAM.

The following example best illustrates the useful purpose of these registers. Suppose that mathematical

operations on numbers previously stored in the R registers should be performed: (R1+R2) - (R3+R4).

Ob io sl a register for temporar storing res lts of addition is needed E er thing is q ite simple and the


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MOV A, R3; Means: move number from R3 into accumulator

ADD A, R4; Means: add number from R4 to accumulator (result remains in accumulator)

MOV R5, A; Means: temporarily moves the result from accumulator into R5

MOV A, R1; Means: move number from R1 into accumulatorADD A, R2; Means: add number from R2 to accumulator

SUBB A, R5; Means: subtract number from R5 (there are R3+R4)

8051 Register Banks and Stack

RAM memory space allocation in the 8052

There are 128 bytes of RAM in the 8051. The 128 bytes of RAM inside the 8051 are assignedaddresses 00 to7FH. These 128 bytes are divided into three different groups as follows:

1. A total of 32 bytes from locations 00 to 1FH hex are set aside for register banks and the stack.

2. A total of 16 bytes from locations 20 to 2FH hex are set aside for bit-addressable read/write

memory.

3. A total of 80 bytes from locations 30H to 7FH are used for read and write storage, or what is

normally called Scratch pad. These 80 locations of RAM are widely used for the purpose of

storing data and parameters nu 8051 programmers.

Register banks in the 8052

A total of 32bytes of RAM are set aside for the register banks and stack. These 32 bytes are

divided into 4 banks of registers in which each bank has registers, R0-R7. RAM locations 0 to 7 are set

aside for bank 0 of R0-R7 where R0 is RAM location 0, R1 is RAM location 1, and R2 is location 2, and so

on, until memory location7, which belongs to R7 of bank0. The second bank of registers R0-R7 starts at

RAM location 08 and goes to location 0FH. The third bank of R0-R7 starts at memory location 10H and

goes to location 17H. Finally, RAM locations 18H to 1FH are set aside for the fourth bank of R0-R7. Fig

shows how the 32 bytes are allocated into 4 banks.

As we can see from fig 1, the bank 1 uses the same RAM space as the stack. This is a major

problem in programming the 8052. we must either not use register bank1, or allocate another area of RAM

for the stack.

Default register bank

If RAM locations 00-1F are set aside for the four register banks, which register bank of R0-R7 do

we have access to when the 8051 is powered up? The answer is register bank 0; that is , RAM locations 0,

1 2 3 4 5 6 and 7 are accessed with the names R0 R1 R2 R3 R4 R5 R6 and R7 when programming the


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8051. It is much easier to refer to these RAM locations with names such as R0, R1 and so on, than by their

memory locations as shown in fig 2.

The register banks are switched by using the D3 & D4 bits of register PSW.

FIG: RAM Allocation in the 8052

Fig: 8052 Register Banks and their RAM Addresses

PSW Register (Program Status Word)


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This is one of the most important SFRs. The Program Status Word (PSW) contains several status bits that

reflect the current state of the CPU. This register contains: Carry bit, Auxiliary Carry, two register bank

select bits, Overflow flag, parity bit, and user-definable status flag. The ALU automatically changes some of

registers bits, which is usually used in regulation of the program performing.

P - Parity bit. If a number in accumulator is even then this bit will be automatically set (1), otherwise it will

be cleared (0). It is mainly used during data transmission and receiving via serial communication.

- Bit 1. This bit is intended for the future versions of the microcontrollers, so it is not supposed to be here.

OV Overflow occurs when the result of arithmetical operation is greater than 255 (decimal), so that it cannot be stored in one register. In that case, this bit will be set (1). If there is no overflow, this bit will be

cleared (0).

RS0, RS1 - Register bank selects bits. These two bits are used to select one of the four register banks in

RAM. By writing zeroes and ones to these bits, a group of registers R0-R7 is stored in one of four banks in

RAM.

RS1 RS2 Space in RAM

0 0 Bank0 00h-07h

0 1 Bank1 08h-0Fh

1 0 Bank2 10h-17h

1 1 Bank3 18h-1Fh

F0 - Flag 0. This is a general-purpose bit available to the user.

AC - Auxiliary Carry Flag is used for BCD operations only.

CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operations and shift instructions.

DPTR Register (Data Pointer)

These registers are not true ones because they do not physically exist. They consist of two separate registers:

DPH (Data Pointer High) and (Data Pointer Low). Their 16 bits are used for external memory addressing.

They may be handled as a 16-bit register or as two independent 8-bit registers. Besides, the DPTR Register

i ll d f i d d i di l hi h h hi d i h l i


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SP Register (Stack Pointer)

The stack is a section of RAM used by the CPU to store information temporarily. This information

could be data or an address. The CPU needs this storage area since there are only a limited number of

registers.

How stacks are accessed in the 8052

If the stack is a section of RAM, there must be registers inside the CPU to point to it. The registerused to access the stack is called the SP (Stack point) Register. The stack pointer in the 8052 is only 8 bits

wide; which means that it can take values of 00 to FFH. When the 8052 is powered up, the SP register

contains value 07. This means that RAM location 08 is the first location used for the stack by the 8051. The

storing of a CPU register in the stack is called a PUSH, and pulling the contents off the stack back into a

CPU register is called a POP. In other words, a register is pushed onto the stack to save it and popped off

the stack to retrieve it. The job of the SP is very critical when push and pop actions are performed.

Pushing onto the stack

In the 8051 the stack pointer (SP) points to the last used location of the stack. As we push data onto

the stack, the stack pointer is incremented by one. Notice that this different from many microprocessors,

notably x86 processors in which the SP is decremented when data is pushed onto the stack. As each PUSH

is executed, the contents of the register are saved on the stack and SP is incremented by 1. Notice that for

every byte of data saved on the stack and then SP is incremented only once. Notice also that to push the

registers onto the stack we must use their RAM addresses. For example, the instruction PUSH pushesregister R1 onto the stack.


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Popping the contents of the stack back into a given register is the opposite process of pushing. With

every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer

is decremented once.

The upper limit of the stack

As, mentioned earlier, locations 08 to 1FH in the 8051 RAM can be used for the stack. This is

because locations 20-2FH of RAM are reserved for bit-addressable memory and must not be used by the

stack. If in a program we need more than 24 bytes (08 to 1FH=24bytes) of stack, we can change the SP to

point to RAM locations 30-7FH. This is done with the instruction MOV SP, #XX.

P0, P1, P2, P3 - Input/Output Registers

In case that external memory and serial communication system are not in use then, 4 ports with in total of 32

input-output lines are available to the user for connection to peripheral environment. Each bit inside these

ports corresponds to the appropriate pin on the microcontroller. This means that logic state written to these

ports appears as a voltage on the pin (0 or 5 V). Naturally, while reading, the opposite occurs voltage on

some input pins is reflected in the appropriate port bit.

The state of a port bit, besides being reflected in the pin, determines at the same time whether it will be

configured as input or output. If a bit is cleared (0), the pin will be configured as output. In the same manner,

if a bit is set to 1 the pin will be configured as input. After reset, as well as when turning the microcontroller

ON, all bits on these ports are set to one (1). This means that the appropriate pins will be configured as

inputs.

Program counter:

The important register in the 8051 is the PC (Program counter). The program counter points to the

address of the next instruction to be executed. As the CPU fetches the OPCODE from the program ROM,

the program counter is incremented to point to the next instruction. The program counter in the 8051 is

16bits wide. This means that the 8051 can access program addresses 0000 to FFFFH, a total of 64k bytes of

code. However, not all members of the 8051 have the entire 64K bytes of on-chip ROM installed, as we

will see soon.


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Types of instructions

Depending on operation they perform, all instructions are divided in several groups:

Arithmetic Instructions

Branch Instructions

Data Transfer Instructions

Logical Instructions

Logical Instructions with bits

The first part of each instruction, called MNEMONIC refers to the operation an instruction performs

(copying, addition, logical operation etc.). Mnemonics commonly are shortened form of name of operation

being executed. For example:

INC R1; Increment R1 (increment register R1)

LJMP LAB5 ;Long Jump LAB5 (long jump to address specified as LAB5)

JNZ LOOP ;Jump if Not Zero LOOP (if the number in the accumulator is not 0, jump to address specified

as LOOP)

Another part of instruction, called OPERAND is separated from mnemonic at least by one empty space and

defines data being processed by instructions. Some instructions have no operand; some have one, two or

three. If there is more than one operand in instruction, they are separated by comma. For example:

RET - (return from sub-routine)

JZ TEMP - (if the number in the accumulator is not 0, jump to address specified as TEMP)

ADD A,R3 - (add R3 and accumulator)

CJNE A,#20,LOOP - (compare accumulator with 20. If they are not equal, jump to address specified as

LOOP)

Arithmetic instructions

These instructions perform several basic operations (addition, subtraction, division, multiplication etc.) After

execution, the result is stored in the first operand. For example:

ADD A, R1 - The result of addition (A+R1) will be stored in the accumulator.

Arithmetical Instructions

M i D i tiByte Oscillator


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ADD A,Rn Add R Register to accumulator 1 1

ADD A,RxAdd directly addressed Rx Register to

accumulator2 2

ADD A,@RiAdd indirectly addressed Register to

accumulator1 1

ADD A,#X Add number X to accumulator 2 2ADDC A,Rn Add R Register with Carry bit to accumulator 1 1

Branch Instructions

There are two kinds of these instructions:

Unconditional jump instructions: After their execution a jump to a new location from where the program

continues execution is executed.

Conditional jump instructions: If some condition is met - a jump is executed. Otherwise, the program

normally proceeds with the next instruction.

Branch Instruction

Mnemonic Description Byte NumberOscillator

Period

ACALL adr11Call subroutine located at address within 2 K byte Program

Memory space2 3

LCALL adr16Call subroutine located at any address within 64 K byte

Program Memory space3 4

RET Return from subroutine 1 4

RETI Return from interrupt routine 1 4

AJMP adr11Jump to address located within 2 K byte Program Memory

space2 3

LJMP adr16Jump to any address located within 64 K byte Program

Memory space3 4

Data Transfer Instructions

Th i i h f i h Th i hi h i d


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Data Transfer Instruction

Mnemonic DescriptionByte

Number

Cycle

Number

MOV A,Rn Move R register to accumulator 1 1

MOV A,RxMove directly addressed Rx register to

accumulator2 2

MOV A,@RiMove indirectly addressed register to

accumulator1 1

MOV A,#X Move number X to accumulator 2 2


These instructions perform logical operations between corresponding bits of two registers. After execution,

the result is stored in the first operand.


Mnemonic Description Byte NumberCycle

Number

ANL A,Rn Logical AND between accumulator and R register 1 1

ANL A,RxLogical AND between accumulator and directly addressed

register Rx

2 2

ANL A,@RiLogical AND between accumulator and indirectly addressed

register1 1

ANL A,#X Logical AND between accumulator and number X 2 2

Logical Operations on Bits

Similar to logical instructions, these instructions perform logical operations. The difference is that these

operations are performed on single bits.

Logical operations on bits

Mnemonic Description Byte NumberCycle

Number

CLR C Clear Carry bit 1 1

CLR bit Clear directly addressed bit 2 2

SETB C Set Carry bit 1 1SETB bit Set directly addressed bit 2 2


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CPL bit Complement directly addressed bit 2 2

TIMERS

On-chip timing/counting facility has proved the capabilities of the microcontroller for implementing

the real time application. These includes pulse counting, frequency measurement, pulse width measurement,

baud rate generation, etc,. Having sufficient number of timer/counters may be a need in a certain design

application. The 8051 has two timers/counters. They can be used either as timers to generate a time delay or

as counters to count events happening outside the microcontroller. Let discuss how these timers are used to

generate time delays and we will also discuss how they are been used as event counters.

PROGRAMMING 8052 TIMERS

The 8051 has timers: Timer 0 and Timer1.they can be used either as timers or as event counters. Let us

first discuss about the timers registers and how to program the timers to generate time delays.

BASIC RIGISTERS OF THE TIMER

Both Timer 0 and Timer 1 are 16 bits wide. Since the 8051 has an 8-bit architecture, each 16-bit

timer is accessed as two separate registers of low byte and high byte.

TIMER 0 REGISTERS

The 16-bit register of Timer 0 is accessed as low byte and high byte. the low byte register is called

TL0(Timer 0 low byte)and the high byte register is referred to as TH0(Timer 0 high byte).These register can

be accessed like any other register, such as A,B,R0,R1,R2,etc.for example, the instruction MOV TL0,#4Fmoves the value 4FH into TL0,the low byte of Timer 0.These registers can also be read like any other

register.


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8-bit timer/counter THx with TLx as

5 - Bit pre-scaler.

0 1 1 16-bit timer mode

16-bit timer/counters THx with TLx are

Cascaded; there is no prescaler

1 0 2 8-bit auto reload8-bit auto reload timer/counter;THx

Holds a value that is to be reloaded into

TLx each time it overflows.

1 1 3 Split timer mode.

C/T (clock/timer)

This bit in the TMOD register is used to decide whether the timer is used as a delay generator or an event

counter. If C/T=0, it is used as a timer for time delay generation. The clock source for the time delay is the

crystal frequency of the 8051.this section is concerned with this choice. The timers use as an event counter

is discussed in the next section.

Serial Communication:

Computers can transfer data in two ways: parallel and serial. In parallel data transfers, often 8 or

more lines (wire conductors) are used to transfer data to a device that is only a few feet away. Examples of

parallel data transfer are printers and hard disks; each uses cables with many wire strips. Although in such

cases a lot of data can be transferred in a short amount of time by using many wires in parallel, the distance

cannot be great. To transfer to a device located many meters away, the serial method is used. In serial

communication, the data is sent one bit at a time, in contrast to parallel communication, in which the data is

sent a byte or more at a time. Serial communication of the 8051 is the topic of this chapter. The 8052 has

serial communication capability built into it, there by making possible fast data transfer using only a few

wires.

If data is to be transferred on the telephone line, it must be converted from 0s and 1s to audio

tones, which are sinusoidal-shaped signals. A peripheral device called a modem, which stands for

modulator/demodulator, performs this conversion.

Serial data communication uses two methods, asynchronous and synchronous. The synchronous

method transfers a block of data at a time, while the asynchronous method transfers a single byte at a time.

In data transmission if the data can be transmitted and received, it is a duplex transmission. This is

in contrast to simplex transmissions such as with printers, in which the computer only sends data. Duplex

transmissions can be half or full duplex depending on whether or not the data transfer can be simultaneous


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same time, it is full duplex. Of course, full duplex requires two wire conductors for the data lines, one for

transmission and one for reception, in order to transfer and receive data simultaneously.

Asynchronous serial communication and data framing

The data coming in at the receiving end of the data line in a serial data transfer is all 0s and 1s; it is

difficult to make sense of the data unless the sender and receiver agree on a set of rules, a protocol, on how

the data is packed, how many bits constitute a character, and when the data begins and ends.Start and stop bits

Asynchronous serial data communication is widely used for character-oriented transmissions,

while block-oriented data transfers use the synchronous method. In the asynchronous method, each

character is placed between start and stop bits. This is called framing. In the data framing for asynchronous

communications, the data, such as ASCII characters, are packed between a start bit and a stop bit. The start

bit is always one bit, but the stop bit can be one or two bits. The start bit is always a 0 (low) and the stop bit

(s) is 1 (high).Data transfer rate

The rate of data transfer in serial data communication is stated in bps (bits per second). Another

widely used terminology for bps is baud rate. However, the baud and bps rates are not necessarily equal

This is due to the fact that baud rate is the modem terminology and is defined as the number of signal

changes per second. In modems a single change of signal, sometimes transfers several bits of data. As far

as the conductor wire is concerned, the baud rate and bps are the same, and for this reason we use the bps

and baud interchangeably.

The data transfer rate of given computer system depends on communication ports incorporated into

that system. For example, the early IBMPC/XT could transfer data at the rate of 100 to 9600 bps. In recent

years, however, Pentium based PCS transfer data at rates as high as 56K bps. It must be noted that in

asynchronous serial data communication, the baud rate is generally limited to 100,000bps.

RS232 Standards

To allow compatibility among data communication equipment made by various manufacturers, an

interfacing standard called RS232 was set by the Electronics Industries Association (EIA) in 1960. In 1963

it was modified and called RS232A. RS232B AND RS232C were issued in 1965 and 1969, respectively.

Today, RS232 is the most widely used serial I/O interfacing standard. This standard is used in PCs and

numerous types of equipment. However, since the standard was set long before the advert of the TTL logic

family, its input and output voltage levels are not TTL compatible. In RS232, a 1 is represented by -3 to

-25V, while a 0 bit is +3 to +25V, making -3 to +3 undefined. For this reason, to connect any RS232 to a

microcontroller system we must use voltage converters such as MAX232 to convert the TTL logic levels to

the RS232 voltage levels, and vice versa. MAX232 IC chips are commonly referred to as line drivers.

RS232 pins

RS232 cable is commonly referred to as the DB-25 connector In labeling DB-25P refers to the plug


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cables, IBM introduced the DB-9 Version of the serial I/O standard, which uses 9 pins only, as shown in

table.

DB-9 pin connector

1 2 3 4 5

6 7 8 9

(Out of computer and exposed end of cable)

Pin Functions:

Pin Description1 Data carrier detect (DCD)2 Received data (RXD)

3 Transmitted data (TXD)4 Data terminal ready(DTR)5 Signal ground (GND)6 Data set ready (DSR)7 Request to send (RTS)8 Clear to send (CTS)9 Ring indicator (RI)

Note: DCD, DSR, RTS and CTS are active low pins.

The method used by RS-232 for communication allows for a simple connection of three lines: Tx, Rx, and

Ground. The three essential signals for 2-way RS-232

Communications are these:

TXD: carries data from DTE to the DCE.

RXD: carries data from DCE to the DTE

SG: signal ground

8051 connection to RS232

The RS232 standard is not TTL compatible; therefore, it requires a line driver such as the

MAX232 chip to convert RS232 voltage levels to TTL levels, and vice versa. The interfacing of 8051 with

RS232 connectors via the MAX232 chip is the main topic.

The 8051 has two pins that are used specifically for transferring and receiving data serially.

These two pins are called TXD and RXD and a part of the port 3 group (P3.0 and P3.1). Pin 11 of the 8051

is assigned to TXD and pin 10 is designated as RXD. These pins are TTL compatible; therefore, theyrequire a line driver to make them RS232 compatible. One such line driver is the MAX232 chip.


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MAX232 converts from RS232 voltage levels to TTL voltage levels, and vice

versa. One advantage of the MAX232 chip is that it uses a +5V power source which, is the same as the

source voltage for the 8051. In the other words, with a single +5V power supply we can power both the

8051 and MAX232, with no need for the power supplies that are common in many older systems. The

MAX232 has two sets of line drivers for transferring and receiving data. The line drivers used for TXD are

called T1 and T2, while the line drivers for RXD are designated as R1 and R2. In many applications onlyone of each is used.

Embedded

Controller

RXD

TXD

TXD

RXD2

3

5

GND

MAX 232

CONNECTING C to PC using MAX 232

INTERRUPTS

A single microcontroller can serve several devices. There are two ways to do that: INTERRUPTS or

POLLING.

POLLING:

In polling the microcontroller continuously monitors the status of a given device; when the status condition

is met, it performs the service .After that, it moves on to monitor the next device until each one is serviced.

Although polling can monitor the status of several devices and serve each of them as certain condition are

met.

INTERRUPTS:

I th i t t th d h d i d it i th d i tifi


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interrupts whatever it is doing and serves the device. The program associated with the interrupts is called the

interrupt service routine (ISR).or interrupt handler.

INTERRUPTS Vs POLLING:

The advantage of interrupts is that the microcontroller can serve many devices (not all the same time, of

course); each device can get the attention of the microcontroller based on the priority assigned to it. The

polling method cannot assign priority since it checks all devices in round-robin fashion. More

importantly, in the interrupt method the microcontroller can also ignore (mask) a device request for

service. This is again not possible with the polling method. The most important reason that the interrupt

method is preferable is that the polling method wastes much of the microcontrollers time by polling

devices that do not need service. So, in order to avoid tying down the microcontroller, interrupts are

used.

INTERRUPT SERVICE ROUTINE

For every interrupt, there must be an interrupt service routine (ISR), or interrupt handler. When an interrupt

is invoked, the microcontroller runs the interrupts service routine. For every interrupt, there is a fixed

location in memory that holds the address of its ISR. The group of memory location set aside to hold the

addresses of ISR and is called the Interrupt Vector Table. Shown below:

Interrupt Vector Table for the 8051:

S.No. INTERRUPT ROM

LOCATION

(HEX)

PIN FLAG

CLEARING

1. Reset 0000 9 Auto

2. External

hardware

Interrupt 0

0003 P3.2 (12) Auto

3 Timers 0 000B Auto


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1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on the

stack.

2. It also saves the current status of all the interrupts internally (i.e., not on the stack).

3. It jumps to a fixed location in memory called the interrupt vector table that holds the address of the

interrupts service routine.4. The microcontroller gets the address of the ISR from the interrupt vector table and jumps to it. It

starts to execute the interrupt service subroutine until it reaches the last instruction of the subroutine,

which is RETI (return from interrupt).

5. Upon executing the RETI instruction, the microcontroller returns to the place where it was

interrupted. First, it gets the program counter (PC) address from the stack by popping the top two

bytes of the stack into the PC. Then it starts to execute from that address.

Notice from step 5 the critical role of the stack. For this reason, we must be careful in manipulating thestack contents in the ISR. Specifically, in the ISR, just as in any CALL subroutine, the number of pushes

and pops must be equal.

Enabling and disabling an interrupt:

Upon reset, all interrupt are disabled (masked), meaning that none will be responded to by the

microcontroller if they are activated. The interrupt must be enabled by software in order for the

microcontroller to respond to them. There is a register called IE (interrupt enable) that is responsible for

enabling (unmasking) and disabling (masking) the interrupts.

Notice that IE is a bit-addressable register.

Steps in enabling an interrupt:

To enable an interrupt, we take the following steps:

1. Bit D7 of the IE register (EA) must be set to high to allow the reset to take effect.

If EA=1, interrupts are enabled and will be responded to if their corresponding bit in IE are high. If EA=0,

no interrupt will be responded to, even if the associated bit in the IE register is high.

Interrupt Enable Register

D7 D6 D5 D4 D3 D2 D1 D0


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EA IE.7 disables all interrupts. If EA=0, no interrupts is acknowledged.

If EA=1, each interrupt source is individually enabled disabled

By setting or clearing its enable bit.

-- IE.6 Not implemented, reserved for future use.*

ET2 IE.5 Enables or disables Timer 2 overflow or capture interrupt (8052

Only)

ES IE.4 Enables or disables the serial port interrupts.

ET1 IE.3 Enables or disables Timers 1 overflow interrupt

EX1 IE.2 Enables or disables external interrupt 1.

ET0 IE.1 Enables or disables Timer 0 overflow interrupt.

EX0 IE.0 Enables or disables external interrupt.

7.3 LCD Display

Liquid crystal displays (LCDs) have materials which combine the properties of both liquids and crystals.Rather than having a melting point, they have a temperature range within which the molecules are almost as

mobile as they would be in a liquid, but are grouped together in an ordered form similar to a crystal.

An LCD consists of two glass panels, with the liquid crystal material sand witched in between them.

The inner surface of the glass plates are coated with transparent electrodes which define the character,

symbols or patterns to be displayed polymeric layers are present in between the electrodes and the liquid

crystal, which makes the liquid crystal molecules to maintain a defined orientation angle.

One each polarisers are pasted outside the two glass panels. These polarisers would rotate the lightrays passing through them to a definite angle, in a particular direction

When the LCD is in the off state, light rays are rotated by the two polarisers and the liquid crystal,

such that the light rays come out of the LCD without any orientation, and hence the LCD appears

transparent.

When sufficient voltage is applied to the electrodes, the liquid crystal molecules would be aligned in

a specific direction. The light rays passing through the LCD would be rotated by the polarisers, which would

result in activating / highlighting the desired characters.

The LCDs are lightweight with only a few millimeters thickness. Since the LCDs consume less

h ibl i h l l i i i d b d f l d i


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The LCD s doesnt generate light and so light is needed to read the display. By using backlighting,

reading is possible in the dark. The LCDs have long life and a wide operating temperature range.

Changing the display size or the layout size is relatively simple which makes the LCDs more

customer friendly.

The LCDs used exclusively in watches, calculators and measuring instruments are the simple seven-

segment displays, having a limited amount of numeric data. The recent advances in technology have resultedin better legibility, more information displaying capability and a wider temperature range. These have

resulted in the LCDs being extensively used in telecommunications and entertainment electronics. The

LCDs have even started replacing the cathode ray tubes (CRTs) used for the display of text and graphics,

and also in small TV applications.

This section describes the operation modes of LCDs then describe how to program

and interface an LCD to 8051 using Assembly and C.

LCD operation:

In recent years the LCD is finding widespread use replacing LED s (seven-

segment LED s or other multi-segment LED s).This is due to the following reasons:

1. The declining prices of LCDs.

2. The ability to display numbers, characters and graphics. This is in contrast to LED which is limited

to numbers and a few characters.

3. Incorporation of a refreshing controller into the LCD, there by relieving the CPU of the task of

refreshing the LCD. In the case of LED s, they must be refreshed by the CPU to keep on displaying

the data.

4. Ease of programming for characters and graphics.

LCD pin description:

The LCD discussed in this section has 14 pins. The function of each pin is given in

table.


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TABLE 1: Pin description for LCD

Pin symbol I/O Description

1 Vss -- Ground2 Vcc -- +5V power supply3 VEE -- Power supply to

control contrast4 RS I RS=0 to select

command register

RS=1 to select

data register5 R/W I R/W=0 for write

R/W=1 for read6 E I/O Enable7 DB0 I/O The 8-bit data bus8 DB1 I/O The 8-bit data bus9 DB2 I/O The 8-bit data bus10 DB3 I/O The 8-bit data bus11 DB4 I/O The 8-bit data bus12 DB5 I/O The 8-bit data bus13 DB6 I/O The 8-bit data bus

14 DB7 I/O The 8-bit data bus

Th LCD di l h t f ll b l i th


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1. Matrix Keypad.

2. Linear Keypad.

1. Matrix Keypad: This Keypad got keys arranged in the form of Rows and Columns. That is why the

name Matrix Keypad. According to this keypad, In order to find the key being pressed the keypadneed to be scanned by making rows as i/p and columns as output or vice versa.

This Keypad is used in places where one needs to connect more no. of keys with less

no. of data lines.

2. Linear Keypad: This Keypad got n no. of keys connected to n data lines of microcontroller.

This Keypad is used in places where one needs to connect less no. of keys.

In this project, Linear Keypad is used with 3 switches being connected because the no. of switches is less(less than 8).

Generally, in Linear Keypads one end of the switch is connected to Microcontroller

(Configured as i/p) and other end of the switch is connected to the common ground. So whenever a key

of Linear Keypad is pressed the logic on the microcontroller pin will go LOW.

Here in this project, a linear keypad is used with switches connected in a serial manner. Linear

keypad is used in this project because it takes less no. of port pins. The Linear Keypad with 4 Keys is

shown below.

7.5 BUZZER:

A buzzer orbeeper is an audio signaling device, which may bemechanical,electromechanical,

orelectronic. Typical uses of buzzers and beepers includealarms,timers and confirmation of user input suchas a mouse click or keystroke.
http://en.wikipedia.org/wiki/Soundhttp://en.wikipedia.org/wiki/Machinehttp://en.wikipedia.org/wiki/Machinehttp://en.wikipedia.org/wiki/Machinehttp://en.wikipedia.org/wiki/Electromechanicshttp://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Alarmhttp://en.wikipedia.org/wiki/Alarmhttp://en.wikipedia.org/wiki/Timerhttp://en.wikipedia.org/wiki/Timerhttp://en.wikipedia.org/wiki/Machinehttp://en.wikipedia.org/wiki/Electromechanicshttp://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Alarmhttp://en.wikipedia.org/wiki/Timerhttp://en.wikipedia.org/wiki/Sound


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Ajoy buzzeris an example of a purely mechanical buzzer.

Electromechanical

Early devices were based on an electromechanical system identical to anelectric bell without the metal

gong. Similarly, a relay may be connected to interrupt its own actuating current, causing thecontacts to

buzz. Often these units were anchored to a wall or ceiling to use it as a sounding board. The word "buzzer"comes from the rasping noise that electromechanical buzzers made.

Electronic

Piezoelectric disk beeper

Apiezoelectric element may be driven by an oscillating electronic circuit or other audio signal source.

Sounds commonly used to indicate that a button has been pressed are a click, a ring or a beep.

Uses

Annunciator panels

Electronic metronomes

Game shows :In game shows it is also known as a "lockout system" because when one person signals

("buzzes in"), all others are locked out from signalling. Several game shows have large buzzer buttons

which are identified as "plungers". The buzzer is also used to signal wrong answers and when time

expires on many game shows.

Microwave ovens and otherhousehold appliances Sporting events such asbasketball games

Symbol
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Advanced Acoustic Technology Corp. professionally manufactures and sells all kinds of buzzers. We have twproduction lines: piezo buzzer and magnetic buzzer, both include the self drive type, external drive type and type.(Magnetic Buzzer, Transducer, Mechancial Buzzer, Beeper, Piezo Element, Buzzer, Transducer, Piezo SirenAlarm.)

There are over one thousand specifications now, the complete dimensions for you to choose, we can modify length of the pins and the wires, or even customize for your unique project.

Introduction of Piezo Buzzer- How to choose a buzzer

7.6Metal detector
http://www.buzzer-speaker.com/manufacturer/introduction%20of%20piezo%20buzzer.htmhttp://www.buzzer-speaker.com/faq/buzzer%20choose.htmhttp://en.wikipedia.org/wiki/File:Metal_Detector.jpghttp://www.buzzer-speaker.com/manufacturer/introduction%20of%20piezo%20buzzer.htmhttp://www.buzzer-speaker.com/faq/buzzer%20choose.htm


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The simplest form of a metal detector consists of an oscillatorproducing an alternating current that passes

through a coil producing an alternating magnetic field. If a piece of electrically conductive metal is close to

the coil, eddy currentswill be induced in the metal, and this produces an alternating magnetic field of its

own. If another coil is used to measure the magnetic field (acting as amagnetometer), the change in the

magnetic field due to the metallic object can be detected.

The first industrial metal detectors were developed in the 1960s and were used extensively for mining andother industrial applications. Uses include de-mining(the detection ofland mines), the detection of weapons

such as knives and guns, especially in airport security, geophysical prospecting, archaeology and treasure

hunting. Metal detectors are also used to detect foreign bodies in food, and in theconstruction industry to

detect steel reinforcing bars in concrete and pipes and wires buried in walls and floors.

History and development

Toward the end of the 19th century, many scientists and engineers used their growing knowledge of

electrical theory in an attempt to devise a machine which would pinpoint metal. The use of such a device to

find ore-bearing rocks would give a huge advantage to any miner who employed it. The German

physicist Heinrich Wilhelm Dove invented the induction balance system, which was incorporated into metal

detectors a hundred years later. Early machines were crude, used a lot of battery power, and worked only to

a very limited degree.Alexander Graham Bell used such a device to attempt to locate a bullet lodged in the

chest of American President James Garfield in 1881; the attempt was unsuccessful because the metal coil

spring bed Garfield was lying on confused the detector.

Modern developments

The modern development of the metal detector began in the 1930s. Gerhard Fisherhad developed a systemof radio direction-finding, which was to be used for accurate navigation. The system worked extremely well,

but Fisher noticed that there were anomalies in areas where the terrain contained ore-bearing rocks. He

reasoned that if a radio beam could be distorted by metal, then it should be possible to design a machine

which would detect metal using a search coil resonating at a radio frequency. In 1937 he applied for, and

was granted, the first patent for a metal detector. However, it was one Lieutenant Jozef Stanislaw Kosacki, a

Polish officer attached to a unit stationed in St Andrews,Fife, Scotland during the early years ofWorld War

II, that refined the design into a practical Polish mine detector. They were heavy, ran on vacuum tubes, and

needed separate battery packs.

The design invented by Kosacki was used extensively during the clearance of the German mine fields during

the Second Battle of El Alamein when 500 units were shipped to Field Marshal Montgomery to clear the

minefields of the retreating Germans, and later used during the Allied invasion of Sicily, the Allied invasion

of Italy and the Invasion of Normandy. As it was a wartime research operation to create and refine the

design of the detector, the knowledge that Stanislaw created the first practical metal detector was kept secret

for over 50 years.

After the war, there were plenty of surplus mine detectors on the market; they were bought up by relic

hunters who used them for fun and profit. This helped to form metal detecting into a hobby.
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Further refinements

Many manufacturers of these new devices brought their own ideas to the market. Whites Electronics of

Oregon began in the 50's by building a machine called the Oremaster Geiger Counter. Another leader in

detector technology was Charles Garrett, who pioneered the BFO (Beat Frequency Oscillator) machine.

With the invention and development of the transistor in the 50's and 60's, metal detector manufacturers and

designers made smaller lighter machines with improved circuitry, running on small battery packs.Companies sprang up all over the USA and Britain to supply the growing demand.

Modern top models are fully computerized, using integrated circuit technology to allow the user to set

sensitivity, discrimination, track speed, threshold volume, notch filters, etc., and hold these parameters in

memory for future use. Compared to just a decade ago, detectors are lighter, deeper-seeking, use less battery

power, and discriminate better.

Larger portable metal detectors are used by archaeologists and treasure hunters to locate metallic items, such

asjewelry, coins, bullets, and other various artifactsburied shallowly underground.

Discriminators

The biggest technical change in detectors was the development of the induction-balance system. This system

involved two coils that were electrically balanced. When metal was introduced to their vicinity, they would

become unbalanced. What allowed detectors to discriminate between metals was the fact that every metal

has a differentphase response when exposed to alternating current. Scientists had long known of this fact by

the time detectors were developed that could selectively detect desirable metals, while ignoring undesirable

ones.

Even with discriminators, it was still a challenge to avoid undesirable metals, because some of them havesimilar phase responses e.g. tinfoil and gold, particularly in alloy form. Thus, improperly tuning out certain

metals increased the risk of passing over a valuable find. Another disadvantage of discriminators was that

they reduced the sensitivity of the machines.

New coil designs

Coil designers also tried out innovative designs. The original Induction Balance coil system consisted of two

identical coils placed on top of one another. Compass Electronics produced a new design; the two coils were

made in a D shape, and were mounted back-to-back to form a circle. This system was widely used in the

1970s, and both concentric and D type (or Widescan as they became known) had their fans. Anotherdevelopment was the invention of detectors which could cancel out the effect of mineralization in the

ground. This gave greater depth, but was a non-discriminate mode. It worked best at lower frequencies than

those used before, and frequencies of 3 to 20 kHz were found to produce the best results. Many detectors in

the 1970s had a switch which enabled the user to switch between the discriminate mode and the non-

discriminate mode. Later developments switched electronically between both modes. The development of

the Induction Balance detector would ultimately result in the Motion detector, which constantly checked and

balanced the background mineralization.
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Pulse induction

A pulse induction metal detector with an array of coils

At the same time, developers were looking at using a different technique in metal detection called Pulse

Induction. Unlike the Beat Frequency Oscillator or the Induction Balance machines which both used a

uniform alternating current at a low frequency, the pulse induction machine simply fired a high-voltage

pulse of signal into the ground. In the absence of metal, the 'spike' decayed at a uniform rate, and the time it

took to fall to zero volts could be accurately measured. However, if metal was present when the machine

fired, a small current would flow in the metal, and the time for the voltage to drop to zero would be

increased. These time differences were minute, but the improvement in electronics made it possible to

measure them accurately and identify the presence of metal at a reasonable distance. These new machineshad one major advantage: they were completely impervious to the effects of mineralization, and rings and

other jewellery could now be located even under highly-mineralizedblack sand.

Uses

Archaeology

In England and Wales metal detecting is legal provided that permission is granted by the landowner, and that

the area is not a Scheduled Ancient Monument a site of special scientific interest (SSSI) or covered by

elements of the Countryside Stewardship Scheme. Items discovered which fall within the definition ofTreasure must be reported to the Coroner or a place designated by the Coroner for Treasure. The voluntary

reporting of finds which do not qualify as Treasure to the Portable Antiquities Scheme or the UK Detector

Finds Database is encouraged.

The situation in Scotland is very different. Under the Scots law principle ofbona vacantia, the Crown has

claim over any object of any material value where the original owner cannot be traced.There is also no 300

year limit to Scottish finds. Any artifact found, whether by metal detector survey or from an archaeological

excavation, must be reported to the Crown through the Treasure Trove Advisory Panel at the NationalMuseums of Scotland. The Panel then determines what will happen to the artifacts. Reporting is not
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As a hobby

This 156 ounce nugget was found by an individual prospector in the Southern California Desert using ametal detector

There are six major types of hobbyist activities involving metal detectors:

Coin shooting is looking for coins after an event involving many people, like a baseball game, orsimply looking for any old coins. Serious coin shooters will spend hours, days and months doing

historical research to locate long lost sites that have the potential to give up historical and collectible

coins.

Prospecting is looking for valuable metals like gold and silver in their natural forms, such as nuggets

or flakes.

Relic hunting is very similar to coin shooting except that the relic hunter is after any type of

historical artifact. Relic hunters are usually very determined and dedicated not only to the research and

hunting that they do but also to preserving historical artifacts. Coins, bullets, buttons, axe heads, and

buckles are just a few of the items that are commonly found by relic hunters.

Treasure hunting is looking for valuable items in general.

Beach combing is hunting for lost coins or jewelry on a beach. Beach hunting can be as simple or as

complicated as one wishes to make it. Many dedicated beach hunters also familiarize themselves with

tide movements and beach erosion.

Metal detecting clubs across the United States, United Kingdom and Canada exist for hobbyists to

learn from others, show off finds from their hunts and to learn more about the hobby.

Security screening

Metal detectors at an airport
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The development of these systems continued in a spin off company and systems branded as Metor Metal

Detectors evolved in the form of the rectangular gantry now standard in airports. In common with the

developments in other uses of metal detectors both alternating current and pulse systems are used, and the

design of the coils and the electronics has moved forward to improve the discrimination of these systems. In

1995 systems such as the Metor 200 appeared with the ability to indicate the approximate

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