25Gb/s 1V-driving CMOS ring modulator with integrated ...

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YONSEI UNIVERSITY YONSEI UNIVERSITY 25Gb/s 1V-driving CMOS ring modulator with integrated thermal tuning Kim, Sungjin

Transcript of 25Gb/s 1V-driving CMOS ring modulator with integrated ...

YONSEI UNIVERSITY

YONSEI UNIVERSITY

25Gb/s 1V-driving CMOS ring modulator with

integrated thermal tuning

Kim, Sungjin

YONSEI UNIVERSITY

Contents

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Introduction

Device design and fabrication

Device DC performance

Small-signal RF tests

High-speed data modulation

Conclusion

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Introduction

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Carrier-depletion Si ring modulators with thermal tuning

Advantages

- High speed modulation

- consuming low energy for modulation

Disadvantages

- Additional power consumptions occur in thermal tuning

β†’ Advanced manufacturing techniques and higher modulation speed

can reduce this penalty

Interconnect power and density issues are the

main obstacles for supercomputing

Silicon photonics is candidates incoming

systems

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Waveguide structure

rib waveguide structure for applying electrical modulation

Tradeoff in modulator design

Minimize resistance and capacitance by thicker Si slab and smaller waveguide height

↔ Increase optical loss and reduce optical confinement

Minimize optical bending loss with wider waveguide width

↔ Difficult to maintain single-mode operation

Device design and fabrication

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Ring waveguide dimensions

- 7.6ΞΌm ring radius to achieve 12.8nm of free spectral range for 8-wavelength-channel WDM link

- 380nm wide ring waveguide with 220nm etch depth and 80nm thick Si slab

- 300nm wide bus waveguide

PN junction doping

- symmetric lateral PN junction

- vertically uniform doping

- laterally increasing density from junction

- to achieve small capacitance, resistance, optical loss

- caution with impurities diffusion occurred during implantations

and multiple CMOS thermal cycles

Device design and fabrication

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Doping profile

The impurity densities decrease linearly from 𝑁𝑑 to zero at the center of the junction

PN junction doping determines the depletion width

β†’ impact to the modulation depth and optical loss

β†’ determines the quality factor and modulation bandwidth

Impact of the junction doping to the modulation depth

βˆ†πœ†π‘ π‘ π‘ π‘ π‘ βˆ†πœ†πΉπΉπΉπΉ

∝ 𝑁𝑑1 3⁄

𝛼𝑑𝑑𝑑+π›Όπ‘‘π‘ π‘ π‘œπ‘œ , 𝑀𝑀𝑀𝑀𝑀 𝛼𝑑𝑑𝑑 ∝ 𝑁𝑑

βˆ†πœ†π‘ π‘ π‘ π‘ π‘  ∢ 𝑑𝑀𝑀 π‘€π‘€π‘Ÿπ‘Ÿπ‘Ÿπ‘Ÿπ‘Ÿπ‘Ÿπ‘€ π‘€π‘Ÿπ‘€π‘€π‘€π‘€π‘Ÿπ‘€π‘‘π‘€ π‘Ÿπ‘€π‘ π‘ π‘‘ π‘’π‘Ÿπ‘’π‘€π‘€ π‘€π‘Ÿπ‘€π‘‘π‘Ÿπ‘€π‘€ π‘Ÿπ‘€π‘ π‘Ÿπ‘€

Ξ”πœ†πΉπΉπΉπΉ ∢ 𝑠𝑒𝑀𝑀 𝑀𝑠𝑒𝑑𝑀 π‘Ÿπ‘‘ π‘€π‘Ÿπ‘€π‘  π‘šπ‘Ÿπ‘šπ‘ π‘šπ‘’π‘š π‘Ÿπ‘  𝑑𝑀𝑀 π‘€π‘€π‘Ÿπ‘Ÿπ‘Ÿπ‘Ÿπ‘Ÿπ‘Ÿπ‘€ 𝑀𝑠𝑒𝑑𝑀

𝛼𝑑𝑑𝑑 ∢ π‘€π‘Ÿπ‘Ÿπ‘Ÿ π‘Ÿπ‘Ÿπ‘€π‘ π‘ π‘ π‘Ÿπ‘ π‘€π‘Ÿπ‘‘ 𝑒𝑒𝑀 π‘‘π‘Ÿ π‘—π‘’π‘Ÿπ‘Ÿπ‘‘π‘ π‘Ÿπ‘Ÿ π‘’π‘Ÿπ‘‘π‘ π‘Ÿπ‘€,π›Όπ‘‘π‘ π‘ π‘œπ‘œ ∢ π‘€π‘Ÿπ‘Ÿπ‘Ÿ π‘Ÿπ‘Ÿπ‘€π‘ π‘ π‘ π‘Ÿπ‘ π‘€π‘Ÿπ‘‘ 𝑒𝑒𝑀 π‘‘π‘Ÿ π‘Ÿπ‘‘π‘€π‘€π‘€ π‘šπ‘€π‘Ÿπ‘€π‘Ÿπ‘Ÿπ‘ π‘Ÿπ‘šπ‘Ÿ

- to maximize modulation depth, 𝛼𝑑𝑑𝑑 = 0.5π›Όπ‘‘π‘ π‘ π‘œπ‘œ

- typical π›Όπ‘‘π‘ π‘ π‘œπ‘œ is 6dB/cm, which requires junction doping of 3 Γ— 1017π‘Ÿπ‘šβˆ’3

Device design and fabrication

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Modulation bandwidth

Bandwidth is proportional to the waveguide loss

𝑠𝑑 = 𝑐𝛼 πœ‹π‘›π‘”β„

- maximized modulation depth results in small bandwidth of 5GHz

- to achieve higher modulation bandwidth, increase the junction doping density

and sacrifice the modulation depth

- to have 𝑠𝑑 > 25𝐺𝐺𝐺

𝑄 < 8000

πœ†π‘ π‘ π‘ π‘ π‘  > 40π‘‘π‘š

π‘šπ‘Ÿπ‘’π‘’π‘€π‘Ÿπ‘‘π‘Ÿπ‘€ π‘‘π‘€π‘Ÿπ‘Ÿπ‘€π‘‘π‘ > 9𝑒𝑑

Device design and fabrication

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Device layout

67% of the ring : PN diode for high-speed modulation with junction doping of 3 Γ— 1018π‘Ÿπ‘šβˆ’3

Upper-right 25% : N-type doped as a Si resistor for thermal tuning

Between the PN diode and the thermal resistor section : undoped waveguide

2πœ‡π‘š wide isolation gaps

Device design and fabrication

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DC performance

The resonance wavelength shift ∝ 𝑉𝑏 βˆ’ 𝑉 2 3⁄

Positive bias beyond 0.5V will make the diode close to turn-on condition

26pm resonance shift is achieved with voltage swing from -0.5V to 0.5V

Device DC performance

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< Resonant spectrum with different voltages applied >

< Resonance wavelength shift at different bias voltages >

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DC performance

750Ξ© of Si resistor

Tuning efficiency of 0.19nm/mW

66mW tuning power is needed to tune the 12.6nm FSR

Device DC performance

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< Resonant spectrum with different tuning power applied >

< Resonance wavelength versus tuning power >

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Circuit model

High-speed behavior of the ring modulator can be approximated by circuit model

𝐢𝑑 : capacitance between the electrodes through top dielectrics

𝑅𝑆 and 𝐢𝐽 : model the current path through the reverse-biased PN junction

𝑅𝑆𝑠 and 𝐢𝑂𝑂 : model the current path through the BOX and the Si handle

Based on the circuit model, modulation energy is 7fJ/bit with 25Gb/s pseudo-random data

Small-signal RF tests

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< fitted circuit model > < curve-fitting using the circuit model>

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Experimental results

High-speed data modulation

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Eye-diagram with 25Gb/s modulation 1Vpp voltage swing

>5dB extinction ratio

Laser wavelength is tuned over the

5.3nm

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Demonstrated an error-free 25Gb/s tunable carrier-depletion ring

modulator with 7.5ΞΌm radius

Small junction capacitance leads to 7fJ/bit modulation energy with 1V

driving at 25Gb/s

The carrier-depletion Si ring modulators can enable ultrahigh-speed

and ultralow-power WDM photonic links with compact footprint

Conclusion

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