2010-2011 ICA lab EC05301

-------------------------------------------------------------------------------------- I.C. Applications Lab

IC APPLICATIONS

LAB MANUAL

SUBJECT CODE: 07A61191

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Padmasri Dr. B.V.Raju Institute Of

Technology

Vishnupur, Narsapur, Medak (Dist)

Department of Bio-Medical Engineering

CERTIFICATE

This is to certify that the record is a bonafide work done by

Name:

Roll No:

Subject:

Year:

Total number of Experiments:

Number of Experiments done:

Signature of Internal Examiner Signature of H.O.D.

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Signature of External Examiner

INDEX

S.NO. NAME OF THE EXPERIMENT PAGENO

1. Integrator and Differentiator Using 741 op – amp

2

2. Astable multivibrator using IC 555 6

3. Monostable multivibrator using IC 555 8

4. Logic gates (AND, OR, NOR, NOT, NAND, EX-OR)

10

5. Flip - flops using IC’s 16

6. Decade counter 19

7. Half adder, Full adder and Subs tractor 21

8. BCD to 7 – segment 24

9. D/A converter 26

10. A/D converter 28

11. PLA 30

12. Voltage Regulator 34

13. Waveform generator 37

14. Three terminal regulators, VCO and PLL 39

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INTEGRATOR AND DIFFERENTIATOR

AIM: To design and construct an Integrator and Differentiator circuit using Op-Amp and to study its behavior for different input waveforms.

APPARATUS REQUIRED:

CIRCUIT DIAGRAM:

INTEGRATOR:

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S.NO

APPARATUS RANGE QUANTITY

1. IC 741 12. RESISTORS 10KΩ 1

1KΩ 14.7KΩ 1

3. CAPACITOR 0.01µF 14. CRO (0 – 20)

MHz1

5. FUNCTION GENERATOR (0 – 1) MHz

1

6. R.P.S. ±12 V 17 CRO PROBES & CONNECTING

ACCESSORIES

4


DIFFERENTIATOR:

THEORY:

INTEGRATOR CIRCUITA circuit in which the output voltage waveform is the integral of

input voltage waveform is called an Integrator circuit. Such a circuit can be realized using basic Inverting amplifier circuit in which the feedback resistor Rf is replaced by a capacitor Cf.

Vo = - 1 . Vin dt + CR1 C f

If the input of the Integrator circuit is a square wave the output waveform will be a triangular waveform, and for an input of Sine waveform the output would be a Cosine waveform.

As the frequency increase the capacitive reactance decreases and hence output signal reduces in magnitude and viceversa. So it can be inferred that the circuit allows only low frequency signals to pass through it without any attenuation. Hence it can be concluded that the Integrator circuit behaves as a Low Pass Filter circuit.

DIFFRENTIATOR CIRCUITA circuit in which the output voltage waveform is the derivative of

input voltage waveform is called a Differentiator circuit. It may be realized from the basic Inverting amplifier if the input resistor RI is followed by a capacitor CI in series.

VO = - Rf Cf d vin

dt

If the input of the Differentiator circuit is a Triangular waveform the output waveform will be a Square waveform, and for an input of Cosine waveform the output would be a Sine waveform.

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As the frequency increase the capacitive reactance decreases and hence output signal increases in magnitude and vice versa. So it can be inferred that the circuit allows high frequency signals to pass through it without any attenuation. Hence it can be concluded that the Differentiator circuit behaves as a High Pass Filter circuit.

PROCEDURE:

INTEGRATOR CIRCUIT

1. Rig up the circuit as per circuit diagram for Integrator circuit.

2. Apply the square waveform as the input waveform.

3. Observe output waveform (at pin 6) using CRO.

4. Repeat step 3 by applying Sine, Triangular waveforms as input

waveforms.

5. Tabulate the time periods and amplitudes of input and output

waveforms.

6. Plot the input and output waveforms.

DIFFERENTIATOR

1. Rig up the circuit as per circuit diagram for Differentiator circuit.

2. Apply the square waveform as the input waveform.

3. Observe output waveform (at pin 6) using CRO.

4. Repeat step 3 by applying Sine, Triangular waveforms as input

waveforms.

5. Tabulate the time periods and amplitudes of input and output

waveforms.

6. Plot the input and output waveforms

TABULAR COLUMNS:

S.NO

INPUTWAVEFORM

INPUTAMPLITUDE

INPUTTIMEPERIOD

OUTPUTWAVEFORM

OUTPUTAMPLITUDE

OUTPUTTIMEPERIOD

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MODEL WAVEFORMS:

INTEGRATOR:

DIFFERENTIATOR:

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RESULT: Integrator and Differentiator circuits have been realized and

output waveforms for Sine, Square, Triangular input waveforms are

observed and the results are tabulated and the waveforms are plotted.

QUESTIONS:

1. What are the applications of an Integrator?

2. What are the applications of a Differentiator?

3. What is the output obtained for a Differentiator if the input is

exponential?

4. Define Peaking.

5. What are the conditions for a perfect Differentiator and an

Integrator?

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ASTABLE MULTIVIBRATORAIM:

To design Astable Multivibrator and draw the output waveform

APPARATUS:

1. 555 IC2. Resistors – 10K, 100K3. Capacitors 0.01micro farad, 0.002 micro farad4. CRO

CIRCUIT:

THEORY:

It is also called as free running multivibrator. This circuit doesn't require an external trigger to change the state of output hence the name free-running. Fig shows the 555 timer connected as an astable multivibrator.

Initially when the output is high capacitor C starts charging towards Vcc through RA and RB. However as soon as voltage across the capacitor equals 2/3 Vcc comparator triggers the flip-flop and the output switches low. Now capacitor C starts discharging through RB and transistor Ql. When the voltage across C equals 1/3 Vcc, comparator 2's output triggers the flip-flop and the output goes high then the cycle repeats.

The capacitor is periodically charged and discharged below 2/3 Vcc and 1/3 Vcc

respectively. The time during which the capacitor charges from 1/3 Vcc to 2/3 Vcc is equal to Tc

=0.69 (RA+RB) C

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Where RA and RB are in Ohms and C is in farads. Similarly the time during which the capacitor discharges from 2/3 Vcc to 113 Vcc equal to the time the output is low and given by td

= 0.69(RB) C.

Where RB is in Ohms and C is in farads. Thus the total period of the output waveform is T = tc + td = 0.69(RA + 2RB) C Frequency, f= 1/T = 1.45/(RA + 2RB)C

The duty cycle is used in conjunction with the astable multivibrator. The duty cycle is the ratio of time tc during which the o/p is high to the total time period T. It is generally expressed as a percentage. In equation form

% duty cycle = tc/T x100= RA+RB

RA+2RB

PROCEDURE:

1. Connect the circuit as shown in fig.

2. Turn on your oscilloscope and adjust the knobs of CRO to get accurate output.

3. Connect the o/p of your oscilloscope to pin – 3.

4. Use the values of R1, R2, C to calculate the values of tc, td and F.

MODEL WAVE FORM:

RESULT:

The Astable multivibrator is constructed and the frequency is calculated for the output

waveform.

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MONOSTABLE MULTIVIBRATOR

AIM: TO DESIGN A MONOSTABLE MULTIVIBRATOR USING A

555 TIMER AND TO DRAW THE OUTPUT WAVEFORMS.

APPARATUS: 555 IC

Resistors – 3.9 K

Capacitors – 0.1 F, 0.01 F

Function Generator

RPS 0 – 30 V

CIRCUIT:

THEORY:

A Monostable multivibrator, often called a one – shot multivibrator, is a pulse

generating circuit in which the duration of the pulse is determined by the RC network

connected externally to the 555 timer. In a stable or standby state, the output of the circuit is

approximately zero or at logic low level. When an external trigger pulse is applied, the output

is forced to go high. The time for which the output remains high is determined by the external

RC network connected to the timer. At the end of the timing interval, the output automatically

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reverts back to its logic low stable state. The output stays low until the trigger pulse is again

applied.

The time during which the output remains high is given by

Tp = 1.1 RA C seconds

Where RA is in ohms and C is in Farads.

Once triggered, the circuit output will remain in high state until the set time Tp elapses.

The output will not change its state even if the input trigger is applied again during this time

interval Tp. However, the circuit can be reset during the timing cycle by applying a negative

pulse to the reset terminal. The output will then remain in the low state until a trigger is again

applied.

PROCEDURE:

1. Connect the circuit as shown in figure.

2. Apply negative trigger at pin2

3. Measure the output pulse width and verify its theoretical values tp=1.1RaC

4. Observe the output waveforms at pin3 and across the capacitor at pin6.

RESULT: Monostable Multivibrator using 555 Timer is constructed and the waveforms are

observed.

QUESTIONNAIRE

1. What are the applications of monostable multivibrator?2. Why pin4 and pin8 are shorted?3. What is the purpose of the capacitor connected at pin6 and pin5?4. Write the expression for the pulse width of the monostable multivibrator.5. What happens if the trigger is given before the pulse width?

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LOGIC GATES

AIM: To verify the Truth Tables of 2 input OR, AND, NOT, EX-OR, NAND & NOR Gates

APPARATUS REQUIRED:

THEORY:

A Logic gate is an electronic circuit, which takes in one or more inputs and gives single output. The possible combinations of inputs and outputs are tabulated in a table called truth table.

There are 7 different logic gates namely AND, OR, NOT, NAND, NOR, EX–OR, EX–NOR. Among them AND, OR, NOT logic gates are called Fundamental Logic Gates and NAND, NOR are called Universal Logic Gates. The NAND, NOR gates are so called as because by using them all the other basic gates can be realized i.e., we can construct any logic circuit using universal gates alone.

OR GATE:

An OR gate is one of the Fundamental logic gates. The operation of an OR gate can be described as “the output of OR gate is high if at least one of the inputs is high” or it can be restated as “the combination is true if at least one of the constituents is true”.

The OR gate is represented by addition operator (“+”). The OR operation between two inputs A and B is represented as

Y= A + B

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S.NO

APPARATUS RANGE

QUANTITY

1. IC 7400 12. IC 7402 13. IC 7404 14. IC 7408 15. IC 7432 16. IC 7486 17. DC RPS +5 V 18. LED 49. CONNECTING

ACCESSORIES

13


The symbol, Pin diagram and the Truth table of OR gate are as shown below:

PIN DIAGRAM:

SYMBOL TRUTH TABLE

AND GATE:

An AND gate is also one of the Fundamental logic gates. The operation of an AND gate can be described as “the output of AND gate is high if and only if all the inputs are high” or it can be restated as “the combination is true if and only if all the constituents are true”. The AND gate is represented by a dot operator (“.”). The AND operation between two inputs A and B is represented as

Y= A. B

The symbol, Pin diagram and the Truth table of AND gate are as shown below:

PIN DIAGRAM

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A B Y

0 0 00 1 11 0 11 1 1

14

A

B

Y = A + B


SYMBOL TRUTH TABLE

NOT GATE:

A NOT gate is another Fundamental logic gate that we have. The operation of a NOT gate can be described as “the output of NOT gate is high if the input is low and Vice versa” or it can be restated as “the output is true if the input is false and Vice versa.” The Not gate is represented by a complement operator (“~”). The Not operation on an input A is represented as

Y= A

The symbol; Pin diagram and the Truth table of NOT gate are as shown below:

PIN DIAGRAM

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A B Y0 0 00 1 01 0 01 1 1

15

A

BY= A. B


SYMBOL TRUTH TABLE

NAND GATE:

A NAND gate is one of the Universal gates. It is so called because we can realize any one of the fundamental logic gates. The operation of NAND gate can be described as “the output of NAND gate is high if any one of the input is high” or it can be restated as “the combination is true even if one of the constituents is true”. The NAND gate is represented by an “up arrow” operator (“↑”). The NAND operation between two inputs A and B is represented as

Y= A B = (A.B)|

The symbol, Pin diagram and the Truth table of NAND gate are as shown below:

PIN DIAGRAM

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A A’

0 11 0

16

A Y = A’


SYMBOL TRUTH TABLE

NOR GATE:

A NOR gate is the other Universal gate we have. It is so called because we can realize any one of the fundamental logic gates. The operation of NOR gate can be described as “the output of NOR gate is high if and only if all the inputs are low” or it can be restated as “ the combination is true if all of the constituents are false and it is false even if any one of them is true”.

The NOR gate is represented by a “down arrow” operator (“ ”). The NOR operation between two inputs A and B is represented as

Y= A B = (A+B)|

The symbol, Pin diagram and the Truth table of NOR gate are as shown below:

PIN DIAGRAM

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A B Y0 0 10 1 11 0 11 1 0

17

A

BY=A B


SYMBOL TRUTH TABLE

EX - OR GATE:

A EX - OR gate is a special gate. The operation of EX - OR gate can be described as “the output of EX - OR gate is high if and only if odd number of inputs are high” or it can be restated as “the combination is true if odd number of the constituents are true”.

The EX - OR gate is represented by an encircled plus operator (“ ”). The EX - OR operation between two inputs A and B is represented as

Y= A B

The symbol, Pin Diagram and the Truth table of EX - OR gate are as shown below:

PIN DIAGRAM

SYMBOL TRUTH TABLE

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A B Y0 0 10 1 01 0 01 1 0

A B Y0 0 00 1 11 0 11 1 0

18

A

BY= A BY= (A + B)|

A

BY=A B


EX - NOR GATE:

A EX - NOR gate is another special gate. The operation of EX - NOR gate can be described as “the output of EX - NOR gate is high if and only if even number of inputs are high” or it can be restated as “the combination is true if even number of the constituents are true”.

The EX - NOR gate is represented by an encircled dot operator (“”). The EX - NOR operation between two inputs A and B is represented as

Y= A B The symbol of EX - NOR gate is as shown below:

PROCEDURE:1. Apply the +5V to the pin 14.2. Ground the pin 7.3. Apply the possible logical input combinations to appropriate pins

and observe the output. 4. Tabulate the observations.5. Repeat the same procedure for all gates.

RESULT: The operation of fundamental logic gates, universal logic gates and special gates has been studied by applying different input combinations to the ICs and the observations are tabulated.

QUESTIONNAIRE

1. Realize basic gates using NAND gates. 2. Realize basic gates using NOR gates 3. Which gate is used to test the equality of two bits? 4. State De Morgan Laws.5. What is a gate?

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STUDY OF FLIP - FLOPS

AIM : To verify the truth tables of D,T,RS Flip-Flops.

APPARATUS: IC’s 7404, 7474, 7476 each one LED’S - 2No RPS (0-30V) - 1 No Function Generator.

Circuit Diagrams & Truth Tables :R-S Flip Flop :

D- Flip Flop

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J-K Flip Flop :

T Flip Flop :

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THEORY:

RS FLIP- FLOP: R=0 and S=0, since a ‘0’ at the input of a NOR Gate has no effect on its output. The flip flop remains in its present state.R=1 and S=1 is forbidden, as it forces the output of both gates to the Low state.

D – FLIP FLOP: When the clock goes high, input data is banded into the flip-flops and appears at the output. When the CLK goes Low, the output remains the data.

J-K FLIP FLOP: In the next +ve CLK edge, (1) Low J and K have no effect. (2) Low J and High K produce a reset high J and Low K produce a set, and high J and K result in a toggle. Toggle means switching into opposite side. Propagation delay prevents the JK flip flop from race around condition. Race around condition means toggling more than once during one clock period.

T FLIP FLOP: This can be constructed using JK Flip Flop. Both the inputs J and K are tried to ‘1’ output is going to be toggled.

PROCEDURE:

1) Connect the circuit as shown in figure.2) Apply Vcc=5V, aply clock at pin 1 and preset and clear at pin 2 and. Input is applied at J and K at pin 4 and 5

3) Check the function table of JK flip flop4) The circuit is changed for T and D flip flop and check their truth tables.

RESULT: The truth tables of D, T, RS, J-K Flip Flop has bee verified.

QUESTIONS:

1) Define a Flip flop.2) What is race around condition?3) Convert J-K into T Flip-Flop.4) Convert J-K Flip-Flop into D Flip-Flop.5) What are the applications of Flip- Flop?

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7490 COUNTER

AIM: TO CONSTRUCT DECADE COUNTER USING IC 7490 AND OBSERVE IT’S OUTPUT.

APPARATUS: IC 7490 –1 NO.BREAD BOARDRPS: 0 TO 5V

CIRCUIT DIAGRAM

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THEORY:

The counter counts the input pulses i.e. clock pulses applied at its input over a period of

time. Different types of counters are possible based on the mode of counting, number of

counts, mode of applying the clock pulses etc.

Each of these monolithic counters contain 4 master-slave flip-flops and additional

gating to provide a divide-by-two counter and a 3 stage binary counter for which the count

length is divide-by-five for 90A.The input count pulses are applied to clock A input and the

outputs are as described in the appropriate function table. A symmetrical divide -by -ten

count can be obtained from the 90 A or LS90 counters by connecting the QD output to the

circuit A input and applying the input count to the circuit B input and applying the input

count to the circuit B input which gives a divide-by-ten square wave at the output QA.

PROCEDURE:

1. Connect the circuit as shown in figure.

2. Apply Vcc=5v and apply clock pulse at pin 14 as indicated in the figure.

3. Check the truth tables by applying clock for every state.

RESULT: The truth table of decade counter using IC 7490 is verified.

QUESTIONNAIRE:

1. Define Counter.

2. Write the classification of Counter.

3. What are the applications of the counters?

4. Explain the decade counter with the help of waveforms.

5. What is the maximum count obtained from decade counters?

6. How many states does a decade counter have?

7. What is a state?

8. What is the difference between a synchronous counter and asynchronous counter?

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ADDERS AND SUBTRACTORS

AIM: To construct and study the operation of Half and Full Adders & Subtractors using logic

gates.

APPARATUS REQUIRED:

CIRCUIT DIAGRAMS:

Half Adder: Full Adder:

Half Subtractor: Full Subtractor:

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S.NO

APPARATUS RANGE

QUANTITY

1. IC 7404 12. IC 7408 13. IC 7432 14. IC 7486 15. DC RPS +5 V 16. LED 4 mm 27. CONNECTING

ACCESSORIES

25

D=X Y Z

B=X’(Y Z)+ YZ

B=X’Y

D =X Y


TRUTH TABLES:

HALF ADDER FULL ADDER

A B SUM CARRY0 0 0 00 1 1 01 0 1 01 1 0 1

Half Subtractor Full Subtractor

A B DIFFEREN

CEBORROW

0 0 0 00 1 1 11 0 1 0

1 1 0 0

THEORY:

The basic operations in a Digital Computer are Addition

&Subtraction. As a Multiplication can be treated as a repeated Addition

and Division as a repeated Subtraction binary Adders and Subtractors are

important building blocks in digital computers.

Half Adders perform the addition of two binary digits. The sum in Half Adder is

obtained by an EX_OR gate while carry is obtained by the AND gate. When the number of

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A B C SUM

CARRY

0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1

A B C DIFFERENCE

BORROW

0 0 0 0 00 0 1 1 10 1 0 1 10 1 1 0 11 0 0 1 01 0 1 0 01 1 0 0 01 1 1 1 1

26


input bits is more than 2, then the Addition is performed using Full Adder. It is used to add 3

binary bits and it gives the Sum and Carry bits as outputs. Half Subtractor is used to subtract

two binary digits and it produces Difference and Barrow as outputs. Full Subtractor takes

three bits as inputs and produces their difference and barrow obtained as output bits.

PROCEDURE:

6. Rig up the circuit as shown in circuit diagram.

7. Apply the +5V to the pin 14.

8. Ground the pin 7.

9. Apply the possible logical input combinations to appropriate pins

and observe the output.

10. Tabulate the observations.

11. Repeat the same procedure for full adder, half subtractor &

full subtarctor.

RESULT: The operation of different adders and subtactors has been

studied by realizing them using necessary logic gates and

applying different input combinations to the ICs and the

observations are tabulated.

QUESTIONNAIRE:

1. Design Full Adder using Nand gates.

2. Design Full Subtractor using Nand gates

3. Desing Full Adder using two half adders.

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BCD TO 7 SEGMENT DECODER

AIM: To construct and test a circuit that converts 4 bit BCD input to 7 segment LED.

APPARATUS:

SNO APPARATUS RANGE QUANTITY

1. IC 7447 12. LED DISPLAY LT 542 7 SEG 13. RPS 0-15V 24. CONNECTING WIRES

CIRCUIT DIAGRAM:

PIN DIAGRAM:

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THEORY:

7 LED segments are fabricated in to a dip IC packages shown in fig to form what is called a 7 segment display. The seven segment are lettered a through g and selection of various segments will produce the letters 0 through 9. The unit may contain another LED to represent decimal point & mathematical operation symbols.

Generally 7 segment LEDs are two types namely Common Anode

& Common Cathode. In Common Anode type anodes of all the seven LEDs

are connected to +5V and to -5V in case of Common Cathode type. To

code a decimal number 0 through 9 we need 4 binary bits 0000 through

1001, while 1010 through 1111 are don’t care conditions. The BCD to 7

segment circuit will accept the code 0000 through 1001 as inputs from

binary data generator and sets corresponding pin of 7 segment display to

logic 1 so as to illuminate that segment and thus displays the visual

image of corresponding decimal number.

PROCEDURE:

1. Rig up the circuit as per circuit diagram.

2. Apply the 4 bit BCD code to the input pins 7, 1, 2& 6 respectively.

3. Observe the output pattern on 7 Segment LED display.

4. Tabulate the observations.

CONVERSION TABLE:

D C B A

a b c d e f g

DIGIT PATTERN

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RESULT: The operation of IC 7447 in decoding the BCD code 0000 through 1001 to a visual pattern 0 through 9 on 7 segment LED display is observed.

QUESTIONNAIRE:

1. Write the function of a. LT b. R B I c. B I / R B O

2 . What is the technique used to reduce indicator power requirements?

3. Design a Four –decimal – digit multiplexed display.

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DIGITAL TO ANALOG CONVERTER

AIM: To construct an 4 bit Digital to analog converter(R – 2R) circuit using Op-Amp and to study its operation.

APPARATUS REQUIRED:

CIRCUIT DIAGRAM:

THEORY: Analog signal is smooth but continuous time varying signal. It is

not possible to study such changing signals. Inorder to study such signals we require discrete samples of the signal at different instances of time i.e., we require digitized signal. This discrete signal obtained by sampling analog signal is to be converted into Digital signal for the purpose of analysis. This digital signal is to be converted back into analog signal after analysis of the signal. Thus we require ADC and DAC to analyze signals.

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S.NO

APPARATUS RANGE

QUANTITY

1. IC 741 12. RESISTORS 1KΩ 4

3.3 KΩ

1

2 KΩ 53. R.P.S. ±12 V 14. DIGITAL MULTIMETER 3 ½

digit1

5. CONNECTING ACCESSORIES

31


A paragraph on R to 2R is to be written. Along with formula for theatrical value.

PROCEDURE:

1. Rig up the circuit as shown in circuit diagram.2. Apply the different 4 bit digital inputs to the input terminals ( b0 b1

b2 b3)3. Measure the analog output at pin 6 using multimeter.4. Calculate the theoretical analog voltage and compare with the

practically obtained value.5. Repeat the procedure for all possible input combinations.6. Tabulate the observations.

Wave Form and Tabular Form:

TABULAR COLUMNS:

S.NO

DIGITAL INPUT COMBINATION

THEOTRICAL ANALOGOUTPUT

PRACTICAL ANALOG OUTPUT

RESULT: 4 bit R – 2R Digital to Analog converter circuit has been constructed and output analog voltages for all 16 Digital input combinations are observed and tabulated.

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QUESTIONS:

1. What are the applications of a D / A Converters?

2. What is the function of a D/ A Converter?

3. What are the two types of D/ A Converter?

4. Write the output voltage equation for a D/A converter.

5. What are the specifications of D/A converter?

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ANALOG TO DIGITAL CONVERTER

AIM : To design and construct an analog to digital converter circuit and verify Practically.

APPARATUS:. 1. RPS (0-5V) 1no 2. A/D converter board. 1no 3. Digital multi meter 1no 4. Connecting accessories

CIRCUIT DIAGRAM:

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THEORY:

The analog to digital conversion is process to convert the analog i.e. continues signal

in to digital signal. It is some times refer to as quantization implying the individual discrete

steps, which the out put, assumes.

ADC broadly classified in to two types.

1. Direct type.

2. Integrating type.

Direct type ADC is compares a given analog signal with the internally generated equivalent

signal. Flash type, parallel conversion, countertype, tracking and successive approximation

type.

Integrating type ADC’S performs conversion is an indirect manner by first changing the

analog input signal to a linear function of a time and then to digital code.

The most used integrating type voltage to frequency ADC.

As experiment concerned successive approximation and counter type method.

PROCEDURE:

1. Connect the circuit as per circuit diagram.

2. Apply the analog input to the circuit.

3. Vary the analog voltage and observe the digital out put.

4. Plot the graph between analog input and digital output.

Tabular Form:

S.No Analog Input Voltage

Digital Output

RESULT: The analog to digital converter has been studied and observed the output.

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STUDY OF PLA’S

AIM:

To Study the PLA’S and verify the Truth table of PLA

APPARATUS:

IC’s 7408 - 3 No IC’s 7432 - 2No NOT gates - 5 No

RPS (0-30V) -1 NoFunction Generator.

Bread Board - 1No

CIRCUIT DIAGRAM:

TRUTH TABLE

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A B C F1 F20 0 0 0 00 0 1 0 0

0 1 0 0 00 1 1 0 11 0 0 1 01 0 1 1 11 1 0 0 01 1 1 1 1

MAP SIMPLIFICATION

( c) PLA program table

Product termsInputsA B C

OutputsF1 F2

1 2 3

1 0 _ 1 - 1 - 1 1

1 - 1 1 - 1

T T T/C

THEORY:

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A Combinational circuit may occasionally have don’t’ care combinations. When

implemented with ROM, a don’t care condition becomes an address input that will never

occur. For cases where the number of don’t care conditions is excessive, it is more

economical to use a second type of LSI component called Programmable logic array or

PLA.

A PLA is similar to a ROM concept; however, the PLA does not provide full decoding of the

variables and does not generate all the minterms as in the ROM.IN the PLA, the decoder is

replaced by a group of AND gates, each of which is programmed to generate a product term

of the input variables. AND and OR gates in the PLA are initially fabricated within links

among them. The specific Boolean functions are implemented in sum of product form by

opening appropriate links and leaving the desired connections.

Consider the truth table of a circuit given below. PLA implements the functions in

their sum of product form. Each product term is expressed in the AND gate. Since the no of

functions AND gates in PLA is finite, it is necessary to simplify the function to a minimum no

of product terms in order to minimize the no of AND gates used. The simplified functions in

the sum of products are obtained as

F1=AB+AC F2=AC+BC

A block Diagram of the PLA consists of n inputs, m outputs, k product terms, and m

sum terms. A product term constitute a group of k and gates and m OR gates. Links are

inserted I between all n input s and their complement values to each of the AND gates Links

are also provided in between the outputs if the and gates and the inputs if OR gates. Another

set of links in the output inverters allows the output function to be generated either in the

AND-OR form or in the AND – OR invert form

QUESTIONS:

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 38


1. Define PLD.

2. What are the different types of PLD’s?

3. Define PLA and PAL.

4. What are the advantages of using PLD’s in the design of digital systems?

5. What are the components present in PROM?

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 39


VOLTAGE REGULATOR

AIM:

To construct and study the fixed and variable D.C. voltage regulator using IC 78 series

and LM317 series.

APPARATUS:IC 7812 LM 317RPS (0- 30) VResistors and CapacitorsDecade Resistance BoxMulti Meter

CIRCUIT DIAGRAM:

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 40


THEORY:

A voltage regulator is a circuit that supplies constant voltage regardless of changes in load

currents. IC voltage regulators are of the following types.

1. Fixed out put voltage regulators: Positive and / or Negative output voltage

2. Adjustable output voltage regulators: Positive and / or Negative output voltage

3. Switching Regulators

4. Special Regulators

Performance parameters for voltage regulators are line regulation, load regulation,

temperature stability and ripple rejection.

Line or Input Regulation is defined as the change in the output voltage for a change in the

input voltage and is usually expressed in milli volts.

Load Regulation is the change in the output voltage for a change in load current and is also

expressed in milli volts.

Temperature Stability is the change in the output voltage per unit change in temperature and

is expressed in millivolts / oc

Ripple Rejection is the measure of a regulator ability to reject ripples voltages. It is usually

expressed in decibels.

The 7800 series consists of three terminal positive voltage regulators. These IC’s are

designed as fixed voltage regulators and with adequate heat sinking can deliver output

currents in excess of 1 A.

PROCEDURE:

1. Connect the circuit as shown in circuit diagram.

2. For load regulation, keep the input voltage constant and vary the load resistance

and note down the output voltage.

3. For line regulation keep the output, load constant and vary the input using

autotransformer and note the corresponding output voltage.

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 41


For ADJUSTABLE REGULATORS

1. We can adjust the pot; get different voltages at the output.

2. Repeat the steps 2 &3 of above, note the o/p voltages.

3. Plot the graph, RL Vs Vo

MODEL GRAPH:

Vo Vo

RL Vi

RESULT:

The constant output voltages are verified for variation in load resistance.

QUESTIONS:

1. What are the performance parameters for Voltage Regulators?2. What is a Voltage Regulator?3. Write the applications of the Voltage Regulators.4. What are the different types of IC voltage regulators available?5. What are the advantages of IC Voltage Regulators?6. How the output voltage is is calculated for adjustable Voltage Regulators?

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 42


WAVEFORM GENERATOR

AIM:

To generate Square wave, triangular waveforms using IC 741, op-amp.

APPARATUS:

1. RPS2. CRO3. IC 7414. Capacitors5. Connecting wires

CIRCUIT DIAGRAM:

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 43


THEORY:

Square Waveform Generator: This operated in astable mode. The op amp is operated in saturation region and

the output swings between Vsat. A Positive feedback of = R2/R1+R2 is provided to the non – inverting terminal. The output is fed back to the inverting terminal after integration through a RC network. The frequency of oscillation of the output waveform is given by fo=1/2RC .

A triangular wave is obtained by integrating a square wave. The frequency of oscillation is given by fo = R3/(4R1C1R2) = 1/(2R3C2).

PROCEDURE:

1. Connect the circuit as shown in circuit diagram2. Observe the output on CRO 3. Calculate the output frequency of square wave and verify theoretical frequency4. Connect the output of the square wave to the Integrator.5. Observe the output waveform on CRO and determine the frequency of triangular

wave.

RESULT:

The non-linear application of op – amp are studied and frequency of square and triangular waveform are verified.

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 44


VOLTAGE REGULATORS AND PHASE LOCKED LOOP

AIM: Study of three terminal regulators 7805, 7912, IC 565 PLL and IC 566 VCO.

THEORY:

A voltage regulator is a circuit that supplies constant voltage regardless of changes in load currents. IC voltage regulators are of the following types.

1. Fixed out put voltage regulators: Positive and / or Negative output voltage2. Adjustable output voltage regulators: Positive and / or Negative output voltage3. Switching Regulators 4. Special Regulators

Performance parameters for voltage regulators are line regulation, load regulation, temperature stability and ripple rejection.

Line or Input Regulation is defined as the change in the output voltage for a change in the input voltage and is usually expressed in milli volts.

Load Regulation is the change in the output voltage for a change in load current and is also expressed in milli volts.

Temperature Stability is the change in the output voltage per unit change in temperature and is expressed in mill volts / co

Ripple Rejection is the measure of a regulator ability to reject ripples voltages. It is usually expressed in decibels.

The 7800 series consists of three terminal positive voltage regulators. These IC’s are designed as fixed voltage regulators and with adequate heat sinking can deliver output currents in excess of 1 A.

The 7800 Series regulators

A) Voltage Options.

Device Type Output Voltage (V) Maximum Input Voltage (V)7805 5.07806 6.07808 8.0 357812 12.07815 15.07818 18.07824 24.0 40

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 45


The 7900 series consists of three terminal negative voltage regulators. These IC’s are designed as fixed voltage regulators and with adequate heat sinking can deliver output currents in excess of 1A.

The 7900 series voltage regulators

A) Voltage options

Device Type Output Voltage (v)

Maximum Input Voltage (v)

7902 -2.0

7905 -5.0

7906 -6.0

7908 -8.0 -35

7912 -12.0

7915 -15.0

7918 -18.0

7924 -24.0 -40

IC 565:

The Signetics SE / NE 560 Series is monolithic phase locked loop. The SE / NE 560, 561, 562, 564, 565 and 567 differs mainly in operating frequency range, power supply, frequency and bandwidth adjustment ranges.

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 46


The important electrical characteristics of the 565 PLL are:

Operating Frequency Range : 0.001 Hz to 500 kHzOperating Voltage Range : + 6 v to + 12vInput impedance : 10KOut put sink current : 1mAOutput source current : 10mA

The center frequency of the PLL is determined by the free running frequency of the VCO, which is given by the equation:

Fout = 1.2 Hz4 R1 C1

The lock Range FL and Capture Range Fc of the PLLFL = + 8 Fout / V Hz

V = (+ v) - (-v) volts

Fc =+ [ FL / ( 2 ).(3.6).(103).(C2) ]1/2

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 47


IC566:

The VCO generates an output frequency that is directly proportional to its input voltage. The frequency needs to be controlled by means of input voltage called control voltage. This function is achieved in the VCO also called a voltage- to-frequency converter. The VCO is commonly used in converting low-frequency signal such as EEG (Electro Encephalo Grams) or ECG (Electro Cardio Grams) into an audio frequency range.

QUESTIONNAIRE:

1. What are the features of the IC 565?

2. What are the performance parameters of Voltage regulators?

3. What is lock range?

4. What is capture range?

5. What is free running state?

6. Write the expressions for Lock range, capture range and free running frequency

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 48


Sample questions1. Design Monostable multibrator.2. Find out the output waveforms of Differentiator.3. Find out the output waveforms of Integrator.4. Verify the truth tables of half adder & Fullsubtractor.5. Verify the truth tables of Full adder & half subtractor.6. Verify the truth tables of Flip-Flops. (SR, JK, T, D)7. BCD to 7-Segment display.8. Decade counter.9. Verify the Truth tables of logic gates (AND, OR, NOT, NAND, NOR, EX-OR, EX-

NOR).10. Design Astable Multivibrator with duty cycle 50%.

B.V.R.I.T. Lab Manual -------------------------------------------------------------------------------- 49

2010-2011 ICA lab EC05301

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