2007 Nocs Config Slides
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Transcript of 2007 Nocs Config Slides
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Trade-Offs in the Configuration of aNetwork on Chip for Multiple Use-Cases
Andreas Hansson1, Kees Goossens2,3
May 8, 2007
1 2 3
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Outline
Introduction
Consistency
Implementation
Results
Conclusions
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Introduction
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Introduction
Systems on Chip (SoC) grow increasingly complex
Multiple applications are integrated on the same chip
Applications are started and stopped dynamically
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Reconfiguration requirements
Means for performing changes programmable architecture
control infrastructure
Ability to specify and compute configurations multiple use-case resource binding
Facilities for controlling change
software libraries hardware support
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Consistency
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Transactions
Intellectual property (IP) modules interact via transactions Typically using protocols such as DTL, APB, AHB, OCP and AXI
A transaction is composed of request and response Command, read data, write data, tags, etc
Transactions take place over a network connection Bi-directional peer-to-peer interconnection Enables end-to-end services
Comprises request channel and response channel
request
response
Master Slave
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Channels
A channel can be seen as a set of virtual wires
The mapping to physical resources is determined by
a path through the router network, a queue in the destination network interface (NI),
the associated end-to-end flow control credits for the source NI, and
a set of TDM time-slots.
Channels are modified through three basic operations Open, modify and close
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Transactions revisited
The virtual-wire view of a channel is non-trivial to uphold
request
response
Master Slave
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Transactions revisited
NI kernel
NI shell
(slave)
Router
network NI kernel
NI shell
(master)Master Slave
request
response
request
response
The virtual-wire view of a channel is non-trivial to uphold
Transactions occur on multiple levels and locations
High-level bus transactions between IP and NI protocol shell Word-level handshakes from NI shell to kernel
Flits and link-level flow control in NI kernel and router network
End-to-end flow control between NI kernel and NI kernel
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Transactions revisited
NI kernel
NI shell
(slave)
Router
network NI kernel
NI shell
(master)Master Slave
request
response
request
response
Transient state is spread across the whole interconnect
The virtual-wire view of a channel is non-trivial to uphold
Transactions occur on multiple levels and locations
High-level bus transactions between IP and NI protocol shell Word-level handshakes from NI shell to kernel
Flits and link-level flow control in NI kernel and router network
End-to-end flow control between NI kernel and NI kernel
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Implementation
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
Configuration infrastructure is provided by the network itself A dedicated NI port is looped back to its configuration port
Configuration is done via configuration connections
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
Configuration infrastructure is provided by the network itself A dedicated NI port is looped back to its configuration port
Configuration is done via configuration connections
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
Configuration infrastructure is provided by the network itself A dedicated NI port is looped back to its configuration port
Configuration is done via configuration connections
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
Configuration infrastructure is provided by the network itself A dedicated NI port is looped back to its configuration port
Configuration is done via configuration connections
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
Configuration infrastructure is provided by the network itself A dedicated NI port is looped back to its configuration port
Configuration is done via configuration connections
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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Hardware support
Run-time programmability is implemented by registers in the NI kernels and shells (possibly also in the routers), and
a memory-mapped configuration port on each NI
Configuration infrastructure is provided by the network itself A dedicated NI port is looped back to its configuration port
Configuration is done via configuration connections
NI Router
networkMaster Slave
NI
NI
ConfigMaster
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write read
wdata
write readMNIP
SNIP
rdata
rdata
wdata
wdata
livetrns
write read
Normal operation
in between transactionsslaveN
Iside
mast
erNIside
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Software support
Configuring the network involves individual registers in routers and NIs Programming is tedious and error prone
Abstraction level must be raised
We propose the thereal Run-Time library High-level (modify the topology of the application graph)
open_conn, close_conn, modify_conn
Low-level (provide hooks for e.g. a configuration manager)
set_flow_control, set_time_slots, get_live_transactions
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Results
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Setup time
Three different implementations of the configuration master Ideal processor
ARM7TDMI@100MHz with pure read/write calls
ARM7TDMI@100MHz with ART library
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Setup time
Three different implementations of the configuration master Ideal processor
ARM7TDMI@100MHz with pure read/write calls
ARM7TDMI@100MHz with ART library
Network contribution to the configuration time is negligible
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Guaranteed setup time
Configuration is traditionally done using best-effort services Latency of configuration transactions is inherently unpredictable
Guaranteed service configuration connections
enable tight bounds on time for opening and modifying a connection at a very limited hardware cost (
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Variation in tear-down time
Opening and modifying connections is done without involving the IPs Enabled by buffers in NIs together with end-to-end flow control
Time required can be bound by guaranteed service configuration connections
Closing a connection involves finishing in flight transactions The IPs inherently affect the reconfiguration time
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Conclusions
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Conclusions
There is a need for a systematic approach to (re-)configuration of NoCs Multiple use-case applications is a fact
Reusing the NoC to also carry configuration data
avoids instantiating a dedicated configuration interconnect has limited performance cost
Reconfiguration hardware and software can be reused for debug purposes
Guaranteed configuration connections
enable predictable open and modify operations with a low hardware cost
Connection closing is inherently dependent on the IP behaviour Bounding the configuration time requires insertion and analysis of
configuration points
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Binary size
Varying the number of NIs and the number of connections