1_vlsi-flow
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Transcript of 1_vlsi-flow
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What Is VLSI
The field which involves packing more and more logic
devices into smaller and smaller areas .
Circuits that would have taken board full of space can
now be put into a small space few millimeters across!
VLSI has been around for a long time, there is nothingnew about it ... but as a side effect of advances in the
world of computers, there has been a dramatic
proliferation of tools that can be used to design VLSI
circuits .
The capability of an IC has increased exponentially , in
terms of computation power, utilization of available
area, yield.
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Design Methods
Type of IC chips (based on packing density) :
Small-scale integration (SSI): up to 12 gates
Medium-scale integration (MSI): 12-99 gates
Large-scale integration (LSI): 100-9999 gates
Very large-scale integration (VLSI): 10,000-99,999 gates
Ultra large-scale integration (ULSI): > 100,000 gates
Main objectives of circuit design:
(i) reduce cost
reduce number of gates (for SSI circuits)
reduce IC packages (for complex circuits)
(ii) increase speed
(iii) design simplicity (reuse blocks where possible)
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DEALING WITH VLSI CIRCUITS
All the miniaturization involves new things to consider.
Circuit Delays. Large complicated circuits running at very highfrequencies have one big problem to tackle - the problem ofdelays in propagation of signals through gates and wires
Power. Another effect of high operation frequencies is increasedconsumption of power. This has two-fold effect
Devices consume batteries faster, and
Heat dissipation increases.
Coupled with the fact that surface areas have decreased, heat
poses a major threat to the stability of the circuit itself.
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Design Flow
Design entryusing a hardware description language
(VHDL) or Schematic entry
Logic synthesisproduces a netlist logic cells and their
connections
System partitioningdivide a large system into functional
blocks
Prelayout simulationcheck to see if the design functions
correctly
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DESCRIPTION of digital systems for designpurposes
At a high-level, use hardware-descriptionlanguage (HDL)
At the binary level, use HDLs to describe thesystem structure
Editors used to produce HDL programs
Graphical forms - logic diagrams also usedfor structure
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SYNTHESIS AND OPTIMIZATION
{ Semi-automated
SIMULATION tools generate behavior
of a system for given input
{ Logic simulation
{ Timing simulation
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Design Engineer:
Takes specifications
defines architecture,
does circuit design,
runs simulations,
supervises layout,
tapes out the chip to the foundry,
evaluates the prototype once the chip comes back from the fab.
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Product Engineer: Gets involved in the project during the design phase,
ensures manufacturability, develops characterization plan,
assembles guidelines,
develops quality and reliability plan,
evaluates the chip with the design engineer,
evaluates the chip through characterization,reliability qualification and
manufacturing yield point of view (statistical data analysis).
He is responsible for production release and is therefore regarded as a
team leader on the project.
Post production, he is responsible for customer returns, failure
analysis, and corrective actions including design changes.
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Test Engineer:
Develops test plan for the chip based on specifications and data sheet
creates characterization and production program for the bench test or
the ATE (Automatic Test Equipment),
designs test board hardware,
correlates ATE results with the bench results to validate silicon to
compare with simulation results.
He works closely with the product engineer to ensure smooth release
to production and post release support.
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Applications Engineer:
Defines new products from system point of view at the customers
end, based on marketing input.
His mission is to ensure the chip works in the system designed or used
by the customers, and complies with appropriate standards (such as
Ethernet, SONET, WiFi etc.). He is responsible for all customer technical support,
firmware development,
evaluation boards, data sheets
all product documentation such as application notes, trade shows,
magazine articles, evaluation reports, software drives and so on.
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Process Engineer: wafer process development,
device modeling, and lots of research and development projects.
If you are R&D oriented, highly trained in semiconductor devicephysics area,
do not mind wearing bunny suits (clean room uniforms used in allfabs),
Packaging Engineer:
He develops precision packaging technology, new package designs for the chips,
does the characterization of new packages,
does electrical modeling of the new designs.
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CAD Engineer:
This is an engineering function that supports the designengineering function.
He is responsible for acquiring, maintaining or developing allCAD tools used by a design engineer.
Most companies buy commercially available CAD tools for
schematic capture, simulation, synthesis, test vector generation,layout, parametric extraction, power estimation, and timingclosure; but in several cases, these tools need some type ofcustomization.
A CAD engineer needs to be highly skilled in the use of these
tools,
Be able to write software routines to automate as many functionsas possible
have a clear understanding of the entire design flow.
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