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    Wil l iam St al l ings

    Compute r Organ iza t ion

    and Arch i tec tu re

    Chapter 14

    Cont ro l Uni t Operat ion

    Micro-Operat ions

    !A computer executes a program

    !Fetch/execute cycle

    !Each cycle has a number of steps

    "see pipelining

    !Called micro-operations

    !Each step does very little

    !Atomic operation of CPU

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    Const i t uent Element s o f

    Program Ex ec ut ion

    Fe tc h - 4 Regis te rs

    !Memory Address Register (MAR)

    "Connected to address bus

    "Specifies address for read or write op

    !Memory Buffer Register (MBR)

    "Connected to data bus

    "Holds data to write or last data read

    !Program Counter (PC)

    "Holds address of next instruction to be fetched

    !Instruction Register (IR)

    "Holds last instruction fetched

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    Fet c h Sequence

    !Address of next instruction is in PC

    !Address (MAR) is placed on address bus

    ! Control unit issues READ command

    ! Result (data from memory) appears on data bus

    ! Data from data bus copied into MBR

    ! PC incremented by 1 (in parallel with data fetch frommemory)

    !

    Data (instruction) moved from MBR to IR!MBR is now free for further data fetches

    Fet c h Sequence (sym bol ic)

    ! t1: MAR

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    Rules for Cloc k Cyc le Grouping

    !Proper sequence must be followed

    "MAR

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    In te r rup t Cyc le

    !t1: MBR

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    Ex ec ut e Cyc le (ISZ)

    !ISZ X - increment and skip if zero

    "t1: MAR

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    Func t iona l Requi rement s

    !Define basic elements of processor

    !Describe micro-operations processor performs

    !Determine functions control unit must perform

    Basic E lem ent s o f Proc essor

    !ALU

    !Registers

    !Internal data pahs

    !External data paths!Control Unit

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    Types of Micro -operat ion

    !Transfer data between registers

    !Transfer data from register to external

    !Transfer data from external to register

    !Perform arithmetic or logical ops

    Func t ions of Cont ro l Uni t

    !Sequencing

    "Causing the CPU to step through a series of micro-operations

    !Execution

    "Causing the performance of each micro-op

    !This is done using Control Signals

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    Cont rol Signals (1)

    !Clock"One micro-instruction (or set of parallel micro-

    instructions) per clock cycle

    !Instruction register

    "Op-code for current instruction

    "Determines which micro-instructions are performed

    Cont rol Signals (2)

    !Flags

    "State of CPU

    "Results of previous operations

    !From control bus

    "Interrupts

    "Acknowledgements

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    Cont ro l Signals - ou tput

    !Within CPU

    "Cause data movement

    "Activate specific functions

    !Via control bus

    "To memory

    "To I/O modules

    Ex am ple Cont ro l SignalSequence - Fe tc h

    !MAR

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    In t ernal Organizat ion

    !Usually a single internal bus

    !Gates control movement of data onto and offthe bus

    !Control signals control data transfer to and fromexternal systems bus

    !Temporary registers needed for properoperation of ALU

    Hardw i red Im plementa t ion (1 )

    !Control unit inputs

    !Flags and control bus

    "Each bit means something

    !

    Instruction register"Op-code causes different control signals for each

    different instruction

    "Unique logic for each op-code

    "Decoder takes encoded input and produces singleoutput

    "nbinary inputs and 2noutputs

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    Hardw i red Im plementa t ion (2 )

    !Clock

    "Repetitive sequence of pulses

    "Useful for measuring duration of micro-ops

    "Must be long enough to allow signal propagation

    "Different control signals at different times withininstruction cycle

    "Need a counter with different control signals for t1,t2 etc.

    Problem s Wit h Hard WiredDesigns

    !Complex sequencing & micro-operation logic

    !Difficult to design and test

    !Inflexible design

    !Difficult to add new instructions

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