12 wp5 slides_authors_dp_dec_26_2012
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Transcript of 12 wp5 slides_authors_dp_dec_26_2012
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JANUARY 28-31, 2013 SANTA CLARA CONVENTION CENTER
Innovative Defense Techniques for Damping Digital to RF Crosstalk
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Contributors
• Davy Pissoort; KU Leuven: [email protected]
• Hany Fahmy, Jan Van Hese; Agilent Technologies: [email protected] [email protected]
• Mehdi Mechaik, Henry Zeng, Charlie Shu, Charles Jackson; NVIDIA Corporation: [email protected] [email protected] [email protected] [email protected]
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Background
• Design of multiple antennas for mobile device communications on PCBs are major tasks due to the many sources of noise:
– Skew, rise-fall time mismatch, delays
– Reflections
– Crosstalk
– Delta-I noise
– Radiation
• Tasks above can be overcome by adopting early simulations in pre-layout stage of PCB designs
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Purpose
• This presentation will show:
– An analysis of the main noise sources on a PCB
– How to reduce the noise coupling
– How to make the communication link more immune to EMI problems
• Reducing the EMI radiation effects induced on the PCB antennas is a major challenge due to:
– Difficulty of containing radiation at high frequencies
– Small space available to design necessary circuits
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PCB Antenna Design Challenges
• PCB antennas need to be small in size at frequencies of interest for multiple bands: – BT – GSM, …
• They rely heavily on ground planes: – Shape of ground plane affects antenna performance – Size of ground plane affects resonance frequencies
• This has important consequences wrt EMI: – ‘Antenna currents’ can spread over total ground plane – Unwanted noise coupling caused by overlapping antenna
and return currents
• PCBs contain high speed buses
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PCB Antenna Design (Contn’d)
• Coupling exists between analog and digital interfaces on PCBs
• In receive mode antenna sensitivity is further degraded by: – Low voltage input level (microvolts) – Coupling from digital interfaces – FCC power level limitations
• In transmit mode antenna performance is further degraded by: – Coupling between output high RF power and digital
PCB interfaces – Antenna mismatches
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PCB Antenna Design Solutions
• Partition PCB area by component interfaces
• Analyze the return current distribution for both RF and digital interfaces
• Place noisy digital interfaces away from analog parts to reduce coupling
• Minimize return path discontinuities in ground plane
• Minimize ground plane sharing between RF and digital interfaces
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EMI Design process at NVIDIA
• Simulate design early on to predict EMI problems
• Estimate non-measurable quantities like current distribution
• Identify performance failure points
• Optimize design though multiple simulation iterations with accelerated computations using NVIDIA GPU hardware
• Measure and certify product
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PCB Antenna Geometry
• The antenna used is a folded, multiband planar monopole antenna
• Antenna is optimized for 900MHz, 1.7GHz-2.5GHz
• It is 20mm x 8mm x 4mm
• It is placed on one side of a ground plane
• Antenna support material is a low dielectric ~ 2.2 dk
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Influence of Solid Ground Plane Shape
Width is kept at 5 cm Length is varied from 6cm to 11.5cm
Length is kept at 8 cm Width is varied from 4.5cm to 6cm
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Influence of Antenna Offset
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Influence of U-Shaped Ground Plane M
ovin
g Edge In
ward
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Influence of U- to Γ-Shaped Ground Plane
Sho
rtenin
g Leg Length
x mm
from
full size
The 53mm and 73mm cases correspond to actual PCB designs
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Influence of Γ-Shaped Ground Plane
Current distribution on GP at 900 MHz Current distribution on GP at 2.4GHz
• Plotting current distribution shows hot spot regions where not to place digital components
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Coupling between Antenna and Other Interfaces
Digital interfaces are routed within yellow areas
• Shown is a real PCB which is representative of wireless applications and allows study of coupling effects
• PCB has 4-bit DDR memory buses and other differential IO interfaces
• The two legs on both sides are ground extensions to other antennas and components
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Coupling between Antenna and Other Interfaces
• Four main coupling mechanisms that could cause the crosstalk between digital signals and on-board antennas:
– Near-field coupling “through the air” above the PCB
– Coupling by waveguide modes between the different ground planes of the PCB
– Coupling by the return currents of signal interfaces and currents induced in the ground-planes by antennas
– Coupling by currents induced on the PCB by power and ground pins of active components/chips
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Influence of Shielding on Antenna Coupling
• To look at near-field coupling and coupling by waveguide modes:
– A perfect PEC shielding-can is placed above all traces on the PCB top side (shorted to ground plane)
– A perfect PEC guard-ring inside the PCB substrate and around all traces (shorted to ground planes)
Transfer function from trace input to Antenna Port
Shielding does not affect antenna coupling
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Influence of GP on Antenna Coupling
Current profiles for full GP
Antenna currents Return current trace
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Influence of GP on Antenna Coupling
Coupling antenna/traces for full GP
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Influence of GP on Antenna Coupling
Antenna currents for GP with slot
Antenna currents Return current trace
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Influence of GP on Antenna Coupling
Coupling antenna/traces for GP with slot
±15 dB increase in coupling!
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Influence of GP on Antenna Coupling
Time domain noise voltage (in V) at antenna port. Traces are excited with a pseudo-random bit sequence of 2Gbit/s
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Influence of GP on Antenna Coupling
• Coupling between the traces’ and antenna’s current paths is the main contributing factor of noise
• Hence, during the placement stage of components on the PCB one has to carefully select the place where digital interfaces are placed
• Need to avoid any current return path discontinuities to prevent large current coupling
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Reduction of Antenna and Bus Coupling
• To reduce coupling between antenna and digital buses, four Bytes are excited differently:
– Group1: input ports on left side of top layer, time delay = 0
– Group2: input ports on right side of top layer, time delay = Δ
– Group3: input ports on left side of bottom layer , time delay = 2Δ
– Group4: input ports on right side of bottom layer , time delay = 3Δ
• Δ can have different values for different cases
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Reduction of Antenna and Bus Coupling
• Coupling between traces and antenna are significantly reduced by about 50% up to 2.5 GHz by choosing appropriate values of Δ (delay) among the various groups.
Transfer function from all trace inputs to Antenna Port
Blue Green Red Cyan
Group1 0 0 0 0
Group2 0 235 470 705
Group3 0 470 940 1410
Group4 0 705 1410 2115
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Conclusions • Coupling between PCB antennas and digital interfaces should be carefully studied
for the overall performance of a PCB
• Interaction between the return currents of digital interfaces and antenna current profiles in ground planes is the main contributor to coupling. This allows for a successful component placement
• In receive mode, the crosstalk from the digital interface to the antenna reduces the sensitivity of the receiving module
• In transmit mode, the crosstalk from the antenna to the digital interfaces deteriorates the eye diagram and leads to higher bit error rates
• Designs can be simulated and optimized by placing digital interface components outside regions of crowded current distribution and path discontinuities
• Coupling caused by digital buses on PCB antennas can be reduced by about 50% by applying an appropriate phase shift between different bytes
• A field solver augmented by CUDA acceleration can be used to solve for fields for large problem sizes to identify potential design problems