110001011010011110100111011011010011110011 Bitvis Utility Library Concepts and usage Your partner...

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110001011010011110100111011011010011110011 Bitvis Utility Library Concepts and usage Your partner for SW and FPGA www.bitvis.no

Transcript of 110001011010011110100111011011010011110011 Bitvis Utility Library Concepts and usage Your partner...

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Bitvis Utility LibraryConcepts and usage

Your partner for SW and FPGAwww.bitvis.no

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Bitvis

About BitvisAbout Bitvis

Leading Vendor Independent Design Centre in NorwayLeading Vendor Independent Design Centre in Norway FPGA and Embedded SW services for customersFPGA and Embedded SW services for customers From specification to final product – or any phase in betweenFrom specification to final product – or any phase in between Good overview of pitfalls, time wasters and risksGood overview of pitfalls, time wasters and risks Focus on methodology, quality, efficiency and customersFocus on methodology, quality, efficiency and customers Located in Asker outside OsloLocated in Asker outside Oslo

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Products and courses from BitvisProducts and courses from Bitvis

Products from BitvisProducts from Bitvis 'Bitvis Utility Library' (Free and Open source, Directly downloadable)'Bitvis Utility Library' (Free and Open source, Directly downloadable)

- Currently being used world wide- Currently being used world wide 'UVVM' (Universal VHDL Verification Methodology) (UVL for VHDL)'UVVM' (Universal VHDL Verification Methodology) (UVL for VHDL)

To be released 2014, Q4To be released 2014, Q4 'RegisterWizard', 'RegisterWizard',

For generation of SW, Doc. and VHDL (bus IF, regs, etc.)For generation of SW, Doc. and VHDL (bus IF, regs, etc.)To be released 2014, Q4To be released 2014, Q4

Courses from BitvisCourses from Bitvis 'FPGA Development Best Practices' - A two day course'FPGA Development Best Practices' - A two day course

- A pragmatic approach to improving quality and efficiency.- A pragmatic approach to improving quality and efficiency.- So far Denmark, Sweden and Norway. May be held anywhere on request- So far Denmark, Sweden and Norway. May be held anywhere on request

See our website for more offersSee our website for more offershttp://bitvis.no/services/fpga-courses/

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Prerequisites Prerequisites for understanding this presentationfor understanding this presentation

This presentation assumes that the audience/reader is This presentation assumes that the audience/reader is familiar with our presentation familiar with our presentation ''Making a Simple, Structured and EfficientMaking a Simple, Structured and EfficientVHDL Testbench, Step-by-step'VHDL Testbench, Step-by-step' See bitvis.no for link to PPT and Webinar for this.See bitvis.no for link to PPT and Webinar for this. PPT also provided with Bitvis Utility Library downloadPPT also provided with Bitvis Utility Library download

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AgendaAgenda

Introduction Introduction Verbosity control and alertsVerbosity control and alerts Checks and awaitsChecks and awaits String handling and RandomisationString handling and Randomisation Adaptations Adaptations BFM code and Advanced verbosity controlBFM code and Advanced verbosity control RestrictionsRestrictions Package hierarchy & Compilation and scriptsPackage hierarchy & Compilation and scripts Documentation Documentation Modifying the libraryModifying the library MaintenanceMaintenance

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Scope for Bitvis Utility LibraryScope for Bitvis Utility Library

A library to support the most fundamental functionality A library to support the most fundamental functionality of any structured VHDL testbenchof any structured VHDL testbench Sufficient for simple testbenchesSufficient for simple testbenches An essential plattform for more advanced TBsAn essential plattform for more advanced TBs

A library to be used by Bitvis internally and externally A library to be used by Bitvis internally and externally (unless otherwise requested by customer)(unless otherwise requested by customer)

An open source library – available to anyoneAn open source library – available to anyone

A library to be used as a platform forA library to be used as a platform for Add-ons like BFMs, Monitors, Analysers, etcAdd-ons like BFMs, Monitors, Analysers, etc Assertion librariesAssertion libraries Multi-interface TB systems, using UVM-like methodologyMulti-interface TB systems, using UVM-like methodology

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PurposePurpose

Standardise and qualify a set of good proceduresStandardise and qualify a set of good procedures Improve TB readability, modifiability and extendabilityImprove TB readability, modifiability and extendability Significantly reduce TB code sizeSignificantly reduce TB code size Allow a more uniform TB methodologyAllow a more uniform TB methodology Improve reuseImprove reuse Make it easy to generate good simulation transcriptsMake it easy to generate good simulation transcripts

Force a more uniform log of eventsForce a more uniform log of events

Promote more single source (and less work) Promote more single source (and less work) Same code used as e.g.:Same code used as e.g.: Verification spec.Verification spec. Testbench commentsTestbench comments Transcript to logTranscript to log

Improve quality and efficiencyImprove quality and efficiency

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Rocket science?Rocket science?

This is NOT rocket science, This is NOT rocket science, BUT....BUT....

This is This is SimpleSimple StructuredStructured FlexibleFlexible A working systemA working system A platformA platform DocumentedDocumented Built on a well definedBuilt on a well defined

PhilosophyPhilosophy

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Philosophy and focusPhilosophy and focus

Simplicity is essential Simplicity is essential

Possible to use in a very simple way for simple TBsPossible to use in a very simple way for simple TBs Immediately after this course Immediately after this course Just by going through the presentations and QRJust by going through the presentations and QR

More advanced usage – after detecting the needMore advanced usage – after detecting the need Typically through more parametersTypically through more parameters

Possibility for adaptation of layout and behaviourPossibility for adaptation of layout and behaviour

Quick Reference (QR) provided as documentationQuick Reference (QR) provided as documentation

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ConceptsConcepts

Three main parts Three main parts Logging mechanism and verbosity control conceptLogging mechanism and verbosity control concept Alert handling conceptAlert handling concept Methods based on one or both of the above conceptsMethods based on one or both of the above concepts

Additional featuresAdditional features Randomisation – as simple as possibleRandomisation – as simple as possible String handlingString handling BFM supportBFM support

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Concepts are important to fully understand.The various methods are very easy to understand First focus on concepts

Logging mechanism is intended for informative messages that require no attention.Main purpose: Simulation progress reportingAlso very good support for debugging, when required.

Alerts are intended for messages that need or may need attention.Could be any severity.

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Verbosity control - overviewVerbosity control - overview

Used directly on all log() methodsUsed directly on all log() methods

Used indirectly via burried log-methods Used indirectly via burried log-methods on all provided check-routineson all provided check-routines

Alert switches may also be seen as verbosity controlAlert switches may also be seen as verbosity control But is intended as direct alert-controlBut is intended as direct alert-control

Verbosity control is dynamicVerbosity control is dynamic

Verbosity control is only allowed from test sequencerVerbosity control is only allowed from test sequencer

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The log methodThe log method

log(msg_id, msg, [scope]) -- Simple versionlog(msg_id, msg, [scope]) -- Simple version

log(ID_HDR, "log(ID_HDR, "Check defaults on output portsCheck defaults on output ports");");

log(ID_BFM, "SBI write is completed");log(ID_BFM, "SBI write is completed");

enable_log_msg(ID_BFM); -- allows messageenable_log_msg(ID_BFM); -- allows message

disable_log_msg(ID_BFM); -- blocks messagedisable_log_msg(ID_BFM); -- blocks message

report_msg_id_panel(VOID); -- reports enabling for all IDsreport_msg_id_panel(VOID); -- reports enabling for all IDs

ID is mandatory in log methodID is mandatory in log method

Scope is an optionScope is an option

Predefined, but extendable set of IDsPredefined, but extendable set of IDs

Enable/disable work on a predefined, common message ID panelEnable/disable work on a predefined, common message ID panel Panel elements are set to ENABLED or DISABLEDPanel elements are set to ENABLED or DISABLED

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IRQCTB

Logfile

SBIbfm

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log-method special featureslog-method special features

May set default ENABLED/DISABLED for all IDs in May set default ENABLED/DISABLED for all IDs in adaptation packageadaptation package

Layout control via switches in adaptation packageLayout control via switches in adaptation package Widths of various fieldsWidths of various fields Optional fields: Scope and IDOptional fields: Scope and ID Programmable Prefix Programmable Prefix

Line wrapping and alignmentLine wrapping and alignment All messages are left aligned All messages are left aligned Wrapping is automatic or by linefeed (char 'lf') or '\n'Wrapping is automatic or by linefeed (char 'lf') or '\n'

Special purpose IDsSpecial purpose IDs ID_HDR:ID_HDR: Written as a header (blank line, header, underline)Written as a header (blank line, header, underline) ALL_MESSAGES:ALL_MESSAGES: enable/disable all messages in one operationenable/disable all messages in one operation ID_NEVER: Always disabled. (Typ. used as ID in burried checks)ID_NEVER: Always disabled. (Typ. used as ID in burried checks)

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Alerts and severitiesAlerts and severities

alert(severity, msg, [scope]) -- Simple versionalert(severity, msg, [scope]) -- Simple version

warning(msg, [scope]);warning(msg, [scope]);

tb_error("address value does not fit target");tb_error("address value does not fit target");

Directly initiates an alertDirectly initiates an alert

Normally not used stand-alone, but as a part of a methodNormally not used stand-alone, but as a part of a method

Superset of VHDL severities (t_alert_level)Superset of VHDL severities (t_alert_level) note, warning, error, failure,note, warning, error, failure,

» Standard severities Standard severities tb_note, tb_warning, tb_error, tb_failure,tb_note, tb_warning, tb_error, tb_failure,

» Use when certain the alert is caused by the TBUse when certain the alert is caused by the TB manual_checkmanual_check

» To indicate that a manual check is requiredTo indicate that a manual check is required

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IRQCTB

Logfile

SBIbfm

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Alert handling and reportingAlert handling and reporting

All alert severities are counted separatelyAll alert severities are counted separately Correct counting is assured by using protected variables (2002)Correct counting is assured by using protected variables (2002)

set_alert_attention(alert_level, IGNORE|REGARD)set_alert_attention(alert_level, IGNORE|REGARD) Ignored alerts are not shown. Counted as IGNORED only.Ignored alerts are not shown. Counted as IGNORED only. Dynamic & Applies globally (always)Dynamic & Applies globally (always)

set_alert_stop_limit(alert_level, N>=0)set_alert_stop_limit(alert_level, N>=0) 0 means no stop0 means no stop Dynamic & Applies globally (always)Dynamic & Applies globally (always)

increment_expected_alerts(alert_level, N)increment_expected_alerts(alert_level, N) counted must equal expected for report_alert_counters()counted must equal expected for report_alert_counters()

report_alert_counters(VOID)report_alert_counters(VOID)

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check_value()check_value()

checks value against expected (or boolean)checks value against expected (or boolean) Mandatory severity and messageMandatory severity and message Triggers alert if fail – and reports mismatch + messageTriggers alert if fail – and reports mismatch + message Positive acknowledge depending on verbosity controlPositive acknowledge depending on verbosity control Default ID = ID_POS_ACKDefault ID = ID_POS_ACK

Overloads for sl, slv, u, s, int, bool, timeOverloads for sl, slv, u, s, int, bool, time

Provided as both a procedure and a function Provided as both a procedure and a function

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IRQCTB

Logfile

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other checksother checks

check_value_in_rangecheck_value_in_range minimum <= value <= maximumminimum <= value <= maximum overloads for u, s, int, time, realoverloads for u, s, int, time, real

check_stablecheck_stable checks signal stable for minimum the given timechecks signal stable for minimum the given time overloads for sl, slv, u, s, bool, intoverloads for sl, slv, u, s, bool, int

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IRQCTB

Logfile

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await_*await_*

await_change()await_change() expects (and waits for) a change on the given signalexpects (and waits for) a change on the given signal

» inside the given time windowinside the given time window» otherwise timeoutotherwise timeout

a real change (event) is required on the signala real change (event) is required on the signal

await_value()await_value() expects (and waits for) a given value on the signalexpects (and waits for) a given value on the signal

» inside the given time windowinside the given time window» otherwise timeoutotherwise timeout

accepts value if already present and min = 0nsaccepts value if already present and min = 0ns

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IRQCTB

Logfile

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string handlingstring handling

justify(string, width, justified, format)justify(string, width, justified, format) Format: AS_IS, TRUNCATE, SKIP_LEADING_SPACEFormat: AS_IS, TRUNCATE, SKIP_LEADING_SPACE

find_leftmost(char, string)find_leftmost(char, string)

find_leftmost_non_zero(string)find_leftmost_non_zero(string)

to_upper(string)to_upper(string)

fill_string(char, width)fill_string(char, width)

replace(string, old char, new char)replace(string, old char, new char)

to_string()to_string() for various new typesfor various new types for missing variants in ieee_proposed for missing variants in ieee_proposed

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randomisationrandomisation

slvslv := random(7);:= random(7);

intint := random(2,8); -- also for real:= random(2,8); -- also for real

procedure: random(seed1, seed2, slv);procedure: random(seed1, seed2, slv);

procedure: random(2, 8, seed1, seed2, int); -- +realprocedure: random(2, 8, seed1, seed2, int); -- +real

procedure: randomize(seed1, seed2);procedure: randomize(seed1, seed2);

For more advanced randomisation features we recommend For more advanced randomisation features we recommend to use OSVVM.to use OSVVM.

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Re-cap: Major BFM quality differences

Inside a ”normal” BFM» Pure Read, Write or Check transaction

Additionally - Inside some BFMs» Syncronization of access to the relevant clock

Additionally - Inside good BFMs» Normalisation of inputs » Sanity-check on inputs» Configuration of behaviour» Logging of all accesses – with parameters and

result» User message option for alle BFMs» Severity control and alert handling» Verbosity control to potentially suppress log

bitvis_vip_sbisbi_bfm_pkg

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Advanced verbosity controlAdvanced verbosity control

Multiple message ID panelsMultiple message ID panels For simple use, a global shared panel is usedFor simple use, a global shared panel is used

» invisible to the user (as a default parameter)invisible to the user (as a default parameter) For multiple message ID panelsFor multiple message ID panels

» Define new message ID panel in relevant scopeDefine new message ID panel in relevant scope» Use log(msg_id, msg, scope, Use log(msg_id, msg, scope, my_msg_id_panelmy_msg_id_panel););» Use enable_log_msg(msg_id, Use enable_log_msg(msg_id, my_msg_id_panelmy_msg_id_panel););

E.g. allows a dedicated panel per process or entity E.g. allows a dedicated panel per process or entity handling an interface. handling an interface. I.e. ID_BFM may be set differently for various BFMsI.e. ID_BFM may be set differently for various BFMs

Most methods support a dedicated panelMost methods support a dedicated panel

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Important usage restrictionsImportant usage restrictions

Recommended: Recommended: Never use VHDL assert statementsNever use VHDL assert statements May ruin important parts of alert handling mechanism May ruin important parts of alert handling mechanism

Recommended:Recommended:Never use writelineNever use writeline May ruin important parts of logging and May ruin important parts of logging and verbosity mechanism verbosity mechanism

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Package hierarchyPackage hierarchy

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Library ieee_proposed (needed for VHDL '93 and 2002)standard_additions, standard_textio_additions, std_logic_1164_additions, numeric_std_additions

types

adaptations

string_methods

protected_typeslicense_open

methods

bfm_common

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Compilation and scriptsCompilation and scripts

Simulator compatibilitySimulator compatibility Compatible with all simulatorsCompatible with all simulators Separate versions provided for VHDL 93, 2002, 2008Separate versions provided for VHDL 93, 2002, 2008

Scripts are provided for ModelsimScripts are provided for Modelsim May use scripts directly May use scripts directly May open provided project filesMay open provided project files Scripts are hierarchicalScripts are hierarchical For other simulatorsFor other simulators

» Compilation order given in Quick ReferenceCompilation order given in Quick Reference» May also look at Modelsim scriptsMay also look at Modelsim scripts

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DocumentationDocumentation

'Making a simple, structured and efficient...' 'Making a simple, structured and efficient...' will be available as PPT and Aldec Webinarwill be available as PPT and Aldec Webinar

'Bitvis Utility Library – Concepts and usage''Bitvis Utility Library – Concepts and usage'(This PPT)(This PPT)

Quick Reference available as PDFQuick Reference available as PDF Single page overviewSingle page overview Plus full overview of all methodsPlus full overview of all methods

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Modifying Bitvis Utility Library?Modifying Bitvis Utility Library?

May modify anything in Bitvis Utility Library – apart fromMay modify anything in Bitvis Utility Library – apart from Copyright headingCopyright heading License fileLicense file Any call to the license fileAny call to the license file

Recommended approachRecommended approach Make any change to the adaptation packageMake any change to the adaptation package Do not make any changes to the other filesDo not make any changes to the other files

» Will make future updates more difficultWill make future updates more difficult» Try to make modification/amendments outside the libraryTry to make modification/amendments outside the library

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Bitvis Utility Library - MaintenanceBitvis Utility Library - Maintenance

Updates are planned for Updates are planned for More overloadsMore overloads More functions and proceduresMore functions and procedures Improving functionality and user friendliness even furtherImproving functionality and user friendliness even further

Updates will also occur Updates will also occur when needed for our projectswhen needed for our projects on request from customers - if feasibleon request from customers - if feasible if bugs are detectedif bugs are detected

New versions will be released at regular intervalsNew versions will be released at regular intervals

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Bitvis Utility LibraryConcepts and usage

The end.

Your partner for Embedded SW and FPGAwww.bitvis.no

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