100 Objective Questions

31
Multiple choice question 1. The internal RAM memory of the 8051 is: A. 32 bytes B. 64 bytes C. 128 bytes D. 256 bytes 2. This program code will be executed continuously: STAT: MOV A, #01H JNZ STAT A. True B. False 3. The 8051 has ________ 16-bit counter/timers. A. 1 B. 2 C. 3 D. 4 4. The address space of the 8051 is divided into four distinct areas: internal data, external data, internal code, and external code.

Transcript of 100 Objective Questions

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Multiple choice question

1.           The internal RAM memory of the 8051 is:

A.            32 bytes

B.            64 bytes

C.            128 bytes

D.            256 bytes

2.            This program code will be executed continuously:

STAT:     MOV A, #01H

                JNZ STAT

A.            True       B.            False

3.            The 8051 has ________ 16-bit counter/timers.

A.            1              B.            2

C.            3              D.            4

4.            The address space of the 8051 is divided into four distinct areas: internal data, external

data, internal code, and external code.

A.            True       B.            False

5.            Data transfer from I/O to external data memory can only be done with the MOVX

command.

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A.            True       B.            False

 6.            The 8051 can handle ________ interrupt sources.

A.            3              B.            4

C.            5              D.            6

7.            The special function registers are maintained in the next 128 locations after the general-

purpose data storage and stack.

A.            True       B.            False

8.            This statement will set the address of the bit to 1 (8051 Micro-controller):

SETB 01H

A.            True       B.            False

9.            MOV A, @ R1 will:

A.            copy R1 to the accumulator

B.            copy the accumulator to R1

C.            copy the contents of memory whose address is in R1 to the accumulator

D.            copy the accumulator to the contents of memory whose address is in R1

10.          A label is used to name a single line of code.

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A.            True       B.            False

11.          The following program will receive data from port 1, determine whether bit 2 is high,

and then send the number FFH to port 3:

READ: MOV A,P1

ANL A,#2H

CJNE A,#02H,READ

MOV P3,#FFH

A.            True       B.            False

12.          Device pins XTAL1 and XTAL2 for the 8051 are used for connections to an external

oscillator or crystal.

A.            True       B.            False

13.          When the 8051 is reset and the line is HIGH, the program counter points to the first

program instruction in the:

A.            internal code memory

B.            external code memory

C.            internal data memory

D.            external data memory

14.          An alternate function of port pin P3.4 in the 8051 is:

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A.            Timer 0

B.            Timer 1

C.            interrupt 0

D.            interrupt 1

15.          Both registers TL0 and TL1 are needed to start Timer 0.

A.            True       B.            False

16.          The I/O ports that are used as address and data for external memory are:

A.            ports 1 and 2

B.            ports 1 and 3

C.            ports 0 and 2

D.            ports 0 and 3

17.          The last 96 locations in the internal data memory are reserved for general-purpose data

storage and stack.

A.            True       B.            False

18.          Microcontrollers often have:

A.            CPUs

B.            RAM

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C.            ROM

D.            all of the above

19.          The 8051 has ________ parallel I/O ports.

A.            2              B.            3

C.            4              D.            5

20.          The total external data memory that can be interfaced to the 8051 is:

A.            32K         B.            64K

C.            128K      D.            256K

21.          Which of the following instructions will load the value 35H into the high byte of timer

0?

A.            MOV TH0, #35H

B.            MOV TH0, 35H

C.            MOV T0, #35H

D.            MOV T0, 35H

22.          Bit-addressable memory locations are:

A.            10H through 1FH

B.            20H through 2FH

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C.            30H through 3FH

D.            40H through 4FH

23.          The 8-bit address bus allows access to an address range of:

A.            0000 to FFFFH

B.            000 to FFFH

C.            00 to FFH

D.            0 to FH

24.          The contents of the accumulator after this operation

MOV A,#0BH

ANL A,#2CH

will be

A.            11010111             B.            11011010

C.            00001000             D.            00101000

25.          The following command will rotate the 8 bits of the accumulator one position to the

left:

RL A

A.            True       B.            False

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26.          This program code will be executed once:

STAT:     MOV A, #01H

                JNZ STAT

A.            True       B.            False

27.          Which of the following instructions will move the contents of register 3 to the

accumulator?

A.            MOV 3R, A

B.            MOV R3, A

C.            MOV A, R3

D.            MOV A, 3R

28.          Which of the following statements will add the accumulator to register 3?

A.            ADD @R3, @A

B.            ADD @A, R3

C.            ADD R3, A

D.            ADD A, R3

29.          Data transfer from I/O to external data memory can only be done with the MOV

command.

A.            True       B.            False

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30.          Which of the following commands will move the number 27H into the accumulator?

A.            MOV A, P27

B.            MOV A, #27H

C.            MOV A, 27H

D.            MOV A, @27

31.          This program code will read data from port 0 and write it to port 2, and it will stop

looping when bit 3 of port 2 is set:

STAT:     MOV A, PO

                MOV P2,A

                JNB P2.3, STAT

A.            True       B.            False

32.          Which of the following commands will move the value at port 3 to register 2?

A.            MOV P2, R3

B.            MOV R3, P2

C.            MOV 3P, R2

D.            MOV R2, P3

33.          The number of data registers is:

A.            8              B.            16

C.            32           D.            64

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34.          An alternate function of port pin P3.0 (RXD) in the 8051 is:

A.            serial port input

B.            serial port output

C.            memory write strobe

D.            memory read strobe

35.          When the 8051 is reset and the line is LOW, the program counter points to the first

program instruction in the:

A.            internal code memory

B.            external code memory

C.            internal data memory

D.            external data memory

36.          The designs of a centigrade thermometer and a PWM speed-control circuit can be

implemented by the 8051.

A.            True       B.            False

37.          What is the difference between the 8031 and the 8051?

A.            The 8031 has no interrupts.

B.            The 8031 is ROM-less.

C.            The 8051 is ROM-less.

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D.            The 8051 has 64 bytes more memory.

38.          The I/O port that does not have a dual-purpose role is:

A.            port 0

B.            port 1

C.            port 2

D.            port 3

39.          To interface external EPROM memory for applications, it is necessary to demultiplex

the address/data lines of the 8051.

A.            True       B.            False

40.          The contents of the accumulator after this operation

MOV A,#02H

MOV RO,#04H

MUL A,RO

will be:

A.            02H        B.            04H

C.            06H        D.            08H

41.          The following command will copy the accumulator to the location whose address is

23H:

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MOV 23H,A

A.            True       B.            False

42.          The special function registers can be referred to by their hex addresses or by their

register names.

A.            True       B.            False

43.          The contents of the accumulator after this operation

MOV A,#2BH

ORL A,00H

will be:

A.            1B H

B.            2B H

C.            3B H

D.            4B H

44.          The following program will cause the 8051 to be stuck in a loop:

LOOP:   MOV A, #00H

                JNZ LOP

A.            True       B.            False

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45.          Which of the following commands will copy the contents of RAM whose address is in

register 0 to port 1?

A.            MOV @ P1, R0

B.            MOV @ R0, P1

C.            MOV P1, @ R0

D.            MOV P1, R0

46.          The statement CALL READ passes control to the line labelled READ.

A.            True       B.            False

47.          Which of the following commands will copy the contents of location 4H to the

accumulator?

A.            MOV A, 04H

B.            MOV A, L4

C.            MOV L4, A

D.            MOV 04H, A

48.          The microcontroller is useful in systems that have nonvariable programs for dedicated

applications.

A.            True       B.            False

49.          The total amount of external code memory that can be interfaced to the 8051 is:

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A.            32K         B.            64K

C.            128K      D.            256K

50.          The ADC0804 has ________ resolution.

A.            4-bit       B.            8-bit

C.            16-bit    D.            32-bit

  

51.          A HIGH on which pin resets the 8051 microcontroller?

A.            RESET    B.            RST

C.            PSEN     D.            RSET

52.          An alternate function of port pin P3.1 in the 8051 is:

A.            serial port input

B.            serial port output

C.            memory write strobe

D.            memory read strobe

53.          Which of the following instructions will move the contents of the accumulator to

register 6?

A.            MOV 6R, A

B.            MOV R6, A

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C.            MOV A, 6R

D.            MOV A, R6

54. The fundamental conceptual unit in a computer is:

a. CPU

b. Hard Drive

c. Operating System

d. (Transistor)

55. In a 8086/8088 Microprocessor, the unit responsible for getting the instructions from

memory and loading in the Queue is.

a. Execution Unit

b. Registers

c. Stack

d. (Bus Interface Unit)

56. When you transfer the record from a Big Endian system to a Little Endian system

over the network in order to get the original value, you must:

a. reverse the byte within a word

b. reverse the bytes in an integer

c. reverse the characters in a word

d. (there is no simple solution)

57. To transmit data bits 1011, the correct even parity seven bit Hamming Code is

a. 0101101

b. (1010101)

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c. 1100111

d. 0110111

58. The cause of propagation delay is the time it takes a pulse to get through a logic device

a. (True)

b. False

59. If CS= 24F6 and IP =634A, the physical address is

a. 24F6: 634A

b. 34F5F

c. (2B2AA)

d. 24F60

60. The instruction MOV CL, [BX][DI]+8 represents the following addressing mode

a.based relative

b.(based indexed)

c.indexed relative

d.register indirect

61. The amount of time required to read a block of data from a disk into memory is composed of

seek time, rotational latency, and transfer time. Rotational latency refers to

a. the time it takes for the platter to make a full rotation

b. the time it takes for the read-write head to move into position over the appropriate track

c. (the time it takes for the platter to rotate the correct sector under the head)

d. none of the above

62. If a magnetic disc has 100 cylinders, each containing 10 tracks of 10 sectors, and each sector

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can contain 128 bytes, what is the maximum capacity of the disk in bytes?

a. 128,000

b. 12,800,000

c. 12,800

d. (1,280,000)

63. According to the specifications of a particular hard disk a seek takes 3 msecs (thousandths of

a second) between adjacent tracks. If the disk has 100 cylinders how long will it take for the head

to move from the innermost cylinder to the outermost cylinder.

a. 30 microseconds

b. (300 msecs)

c. 3000 msecs

d. 3 microseconds

64. What characteristic of RAM memory makes it not suitable for permanent storage?

a. too slow

b. unreliable

c. (it is volatile)

d. too bulky

65. Part of the operating system is usually stored in ROM so that it can be used to boot up the

computer. ROM is used rather than RAM because

a. ROM chips are faster than RAM

b. (ROM chips are not volatile)

c. ROM chips are cheaper than RAM chips

d. none of the above

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66. A given memory chip has 12 address pins and 4 data pins. It has the following number of

locations.

a. 2^4

b. (2^12)

c. 2^48

d. 2^16

67. RAM is called DRAM(Dynamic RAM) when

a. it is always moving around data

b. (it requires periodic refreshing)

c. it can do several things simultaneously

d. none of the above

68. Which of the following is Non-Volatile memory?

a. (EEPROM)

b. SRAM

c. DRAM

d. None of the above

69. Two’s complement notation is frequently used for internal representation of

a. fractions

b. (integers)

c. True and False values

d. floating point numbers

70. If the ASCII code for A is 1000001, B is 1000010, and C is 1000011 then the string

100001110000011000010 represents:

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a. (CAB)

b. BAC

c. CCB

d. ABC

71. Which of the following started out as separate program from operating systems but usually is

included as part of the OS later on?

a. (Text Editor)

b. Command processor

c. Resource allocator

d. Dispatcher

72. An operating system that allows several processors to perform computation as the same time

is call

a. Single program

b. Multitasking

c. (Multiprocessing)

d. Real time processing

73. The kind of interface with icons and menu bars for user to point at with mouse instead of

entering commands for operating system to perform certain tasks is called

a. (GUI)

b. Command line interface

c. User friendly programming

d. None of the above

74. he prime targets of software pirates are

a. programs written for mainframes

b. (games and application programs for microcomputers)

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c. programs in the public domain

d. none of the above

75. Considering the impacts computer technology has on modern society, which of the following

is negative?

a. People can communicate with each other without geographical limitations

b. Stock brokers do not need to be in a central place for trading

c. (More people totally rely on computers when doing their works)

d. Information can reach different area and people at light speed

76. A student retrieve a copy of a program assignment from the recycle bin in the computer lab

and use the code to complete his own program assignment. His action is considered

a. (legal but unethical)

b. illegal and unethical

c. legal and ethical

d. illegal but ethical 

 77. The instructions like MUL AB and DIV AB instruction uses the registers

        a. A      b. B         c. C             d. D

78. ________ is often used to store 2-byte values which have nothing to do with memory

locations.

     a. stack pointe       b. data pointer       c. program counter        d. timer

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79. RD and WR as needed during ________ memory accesses.

    a. internal         b. external data            c. input data          d. internal program

80. The two’s complement representation of –10 is:

a. (11110110)

b. 11011001

c. 00001010

d. 11111100

81. The binary representation of 15 is:

a. 01010

b. (011110

c. 10011

d. 00101

82. Floating point representation is used to store

a. Boolean values

b. whole numbers

c. (real numbers)

d. integers

83. Binary numbers can be used to represent

a.Integers only

b.Fractions only

c.Both fractions and integers

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d. (both fractions and integers.)

84. In order to execute a program instructions must be transferred from memory along a bus to

the CPU. If the bus has 8 data lines, at most one 8 bit byte can be transferred at a time. How

many memory access would be needed in this case to transfer a 32 bit instruction from memory

to the CPU.

a. 1

b. 2

c. 3

d. (4)

85. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data.

The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to

125 nsecs and the number of cycles required for transfer stayed the same what would the

bandwidth of the bus?

a. 1 Megabyte/sec

b. (4 Megabytes/sec)

c. 8 Megabytes/sec

d. 2 Megabytes/sec

86. A computer’s memory is composed of 8K words of 32 bits each. How many bits are required

for memory address if the smallest addressable memory unit is a word?

a. (13)

b. 8

c. 10

d. 6

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87. A computer’s memory is composed of 4K words of 32 bits each. How many total bits in

memory?

a. 12800

b. 1280000

c. 1310720

d. (131072)

88. A computer’s memory is composed of 8K words of 32 bits each, and a byte is 8 bits. How

many bytes does this memory contain?

a. 8K

b. (32K)

c. 16K

d. 4K

89. A computer’s memory is composed of 8K words of 32 bits each, and the smallest addressable

memory unit is an 8 bit byte. How many bits will be required for the memory address?

a. 12

b. (15)

c. 13

d. 10

90. A “word” is the natural unit of organization of memory. Different computer types may have

different word lengths (in bits) .

a. (True)

b. False

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91. Cache memory refers to

a. cheap memory that can be plugged into the mother board to expand main memory

b. (fast memory present on the processor chip that is used to store recently accessed data)

c. a reserved portion of main memory used to save important data

d. a special area of memory on the chip that is used to save frequently used constants

92. Registers contain data and instructions needed by the CPU.

a. (True)

b. False

93. A computer that is advertised as having a 96K byte DRAM memory and a 2.1 Gigabyte hard

drive has

a. (96 K bytes of primary memory and 2.1 Gigabytes of secondary memory)

b. 2.1 Gigabytes of primary memory and 96K bytes of secondary memory

c. 96 bytes of cache, 2.1 gigabytes of primary memory

d. 96K bytes of cache, 96 K bytes of primary memory , and 2.1 Gigabytes of secondary memory

94. A memory management technique used to improve computer performance is

a. selecting memory chips based on their cost

b. storing as much data as possible on disk

c. (using the cache to store data that will most likely be needed soon)

d. preventing data from being moved from the cache to primary memory

95. The fetch-decode-execute cycle refers to the process by which data is read from the hard

drive and stored in memory.

a. True

b. (False)

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96. Interrupts can be generated in response to

a. detected program errors such as arithmetic overflow or division by zero

b. detected hardware faults

c. Input/Output activities

d. Internal timers

e. b, c, and d

f. (a, b, c, and d)

97. Virtually all computer designs are based on the von Neumann architecture. A high level view

of this architecture has the following three components:

a. Buses, memory, input/output controllers

b. Hard disks, floppy disks, and the CPU

c. memory, the CPU, and printers

d. (memory, input/output modules, and the CPU)

98. Which of the following programming languages has an instruction set closest to the machine

language of a computer?

a. BASIC

b. Fortran

c. (Assembly Language)

d. C++

99. The first person who published paper on using computers to perform tasks other than

computations is

a. Charles Babbage

b. Lady Lovelace

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c. (Alan Turing)

d. Konrad Zuse

100. What was the name of the government funded computer used during World War II to

compute firing tables?

a. VAX computer

b. IBM computer

c. Colossus computer

d. (ENIAC computer)