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The Designs and Analysis of a The Designs and Analysis of a Scalable Optical Packet Scalable Optical Packet Switching ArchitectureSwitching Architecture
Speaker: Chia-Wei TuanSpeaker: Chia-Wei Tuan
Adviser: Prof. Ho-Ting WuAdviser: Prof. Ho-Ting Wu
3/4/20093/4/2009
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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Contention resolution in switchesContention resolution in switches
Contention resolution is an important issue when several Contention resolution is an important issue when several packets contend for a common network resource. packets contend for a common network resource.
When two input packets are destined for the same output port When two input packets are destined for the same output port simultaneously, packet contention occurs.simultaneously, packet contention occurs.
When contention occurs, storing packets into the switch When contention occurs, storing packets into the switch buffers becomes the most general technique.buffers becomes the most general technique.
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Contention resolution in switchesContention resolution in switches
At present, optical storage technology is not available.At present, optical storage technology is not available. Thus, switching operations are done electronically, forcing the Thus, switching operations are done electronically, forcing the
optical signal to be converted to an electronic format. optical signal to be converted to an electronic format. But, in all-optical networks, packets are switched optically But, in all-optical networks, packets are switched optically
until they reach their destination. until they reach their destination. That is, switching must also be optical in all-optical networks. That is, switching must also be optical in all-optical networks.
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How to store packetsHow to store packets in all-optical networks?in all-optical networks?
Switched delay lines (SDL). Switched delay lines (SDL). Storing of packets in fiber DLs act as Storing of packets in fiber DLs act as transient optical bufferstransient optical buffers.. Quadro is a Quadro is a single-buffersingle-buffer DL switching architecture. DL switching architecture.
M-Quadro is a M-Quadro is a multi-buffermulti-buffer Quadro architecture that uses a longer DL to Quadro architecture that uses a longer DL to increase the buffering capacity. increase the buffering capacity.
SW1 SW2 SW3
I1
I2
O1
O2
DL1 DL2
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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B-Quadro Switching ArchitectureB-Quadro Switching Architecture
The length of DLThe length of DLii is m is mii..
The (mThe (m22-m-m11)th slot in DL)th slot in DL22 counting from left to right is termed “ counting from left to right is termed “virtualvirtual
slotslot” , if m2 > m1.” , if m2 > m1.
SW1 SW2 SW3
DL1 DL2
Outgoing (Incoming)
slot 1
Incoming
slot 2
Outgoing
slot 2Virtual
slot
1111
Virtual-slot control strategy (VCS)Virtual-slot control strategy (VCS) VCS is to ensure, whenever possible, that outgoing state 1 be VCS is to ensure, whenever possible, that outgoing state 1 be
different from outgoing state 2.different from outgoing state 2. Deflection:Deflection:
Internal blocking:Internal blocking:
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Virtual-slot control strategy (VCS)Virtual-slot control strategy (VCS) Ex1:Ex1:
VCS applied:VCS applied:
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Virtual-slot control strategy (VCS)Virtual-slot control strategy (VCS)
Ex2:Ex2:
VCS applied:VCS applied:
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The M-B-Quadro ArchitectureThe M-B-Quadro Architecture
The packets through the bypass line (BL) are carried The packets through the bypass line (BL) are carried without delay. (No buffering capability)without delay. (No buffering capability)
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Multi-stage Multi-buffer Bypass Quadro Multi-stage Multi-buffer Bypass Quadro (M(M22-B-Quadro) Switch Architecture -B-Quadro) Switch Architecture
3 x 3 switch:3 x 3 switch:
n x nn x n
switch:switch:
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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The Comparsion between M-Qdadro and The Comparsion between M-Qdadro and M-B-Qdadro with Symmetrical TrafficM-B-Qdadro with Symmetrical Traffic
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The Parameter of Asymmetrical TrafficThe Parameter of Asymmetrical Traffic
The load of each input is The load of each input is ρρ.. Let Let XX be a random variable that indicates the state of be a random variable that indicates the state of
a input port. a input port. P(X=i)P(X=i) represents the probability of the packet represents the probability of the packet
destined for output port destined for output port ii at specific time slot. at specific time slot. P(X=0) = 1- P(X=0) = 1- ρρ.. P(X=1) = P(X=1) = RR11* * ρρ.. P(X=2) = P(X=2) = RR22* * ρρ..
• where where RRii is the ratio of total packets to the packets is the ratio of total packets to the packets destined for output port destined for output port ii. .
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The Comparsion between M-Qdadro and The Comparsion between M-Qdadro and M-B-Qdadro with Nonbursty and Asymmetrical TrafficM-B-Qdadro with Nonbursty and Asymmetrical Traffic
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The Comparsion between M-Qdadro and The Comparsion between M-Qdadro and M-B-Qdadro with Bursty and Asymmetrical TrafficM-B-Qdadro with Bursty and Asymmetrical Traffic
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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Bursty Traffic ModelBursty Traffic Model Pa: The probability of no packet arriving in the next slot, given Pa: The probability of no packet arriving in the next slot, given
the current slot is idle.the current slot is idle. Pb: The probability of the next arrival will be part of the Pb: The probability of the next arrival will be part of the
burst. (i.e., destined to the same destination). burst. (i.e., destined to the same destination).
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The properties of Bursty Traffic ModelThe properties of Bursty Traffic Model
Expected bursty length = Expected bursty length =
Offered load at each input port = Offered load at each input port =
1L
1 bP
1
1a
a b
P
P P
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Asymmetric Traffic ModelAsymmetric Traffic Model In realistic networks, the traffic is not only bursty but In realistic networks, the traffic is not only bursty but
also asymmetric. also asymmetric.
Back to P32
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How to determine the value of PHow to determine the value of P0101 and P and P0202?? Calculus the steady state Calculus the steady state
distribution:distribution:
P(X=i) can be derived by P(X=i) can be derived by summing the steady-state summing the steady-state probability in {bursty1, probability in {bursty1, destination i} and {bursty2, destination i} and {bursty2, destination i} states.destination i} states.
After rearranging, After rearranging,
we obtain:we obtain:
Back to P32
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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Exact Analytical ModelExact Analytical Model is the state (i.e., destination) of slot is the state (i.e., destination) of slot jj at DL at DL ii.. The state of input port The state of input port ii is represented as is represented as xxii.. The state definition of exact DTMC. The state definition of exact DTMC.
( )ims j
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Control StrategiesControl Strategies Let and are two instances of .Let and are two instances of .
Define control strategy as , where is part of Define control strategy as , where is part of control strategy which determine the next incoming slot control strategy which determine the next incoming slot ii..
Assuming is the next state of , the relation of them is:Assuming is the next state of , the relation of them is:
pS��������������
qS��������������
S��������������
1 2( , ,..., )n i
qS��������������
pS��������������
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The General Formula of State Transition Matrix The General Formula of State Transition Matrix
, is the conditional probability that next traffic state of being ,
given the current traffic state of being .
P
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State Transition Matrix In Non-bursty Traffic Case State Transition Matrix In Non-bursty Traffic Case
In non-bursty traffic case, In non-bursty traffic case,
Thus, state transition probability in can be reduced toThus, state transition probability in can be reduced to
The non-bursty case can be further divided into The non-bursty case can be further divided into 1)1) Symmetrical case: Set to 1/n for k=1,2,…, n. Symmetrical case: Set to 1/n for k=1,2,…, n. 2)2) Asymmetrical case: Set to some probability greater or Asymmetrical case: Set to some probability greater or
smaller than 1/n for k=1,2,…, n smaller than 1/n for k=1,2,…, n
,1 1
( )
where ( ) is the destination distribution for input port , for {1, 2, ..., }.
jik k
n nj
ij kx xk k
jk
T P P x
P x k k n
, (next input traffic state= | current input traffic state= )
(next input traffic state= )
( )
P P
P
P x
( )jkP x
( )jkP x
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State Transition Matrix In Bursty Traffic CaseState Transition Matrix In Bursty Traffic Case
In bursty traffic case, it can also be further divided into In bursty traffic case, it can also be further divided into
1)1) Symmetrical case: Set P(x=1) = P(x=2).Symmetrical case: Set P(x=1) = P(x=2).
2)2) Asymmetrical case: Set P(x=1) Asymmetrical case: Set P(x=1) ≠≠ P(x=2). P(x=2).
where is the transition probability in the where is the transition probability in the traffic model traffic model diagramdiagram..
,1
jik k
n
ij x xk
T P
, ji
k kx xP
in the equation
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Calculus Steady StateCalculus Steady State Let be steady state distribution.Let be steady state distribution. where is the space size.where is the space size.
Compute iteratively Compute iteratively
untiluntil
Deflection probability: Deflection probability:
1 2= , , ,
SS S S S
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��������������������������������������������������������
1 2 nm +m +...+m=(n+1) (# of traffic states)nS ��������������
( 1) ( )
(0)
.
1 1 1Initial: , , , .
n n
S S
S
T
S S S
����������������������������
��������������
��������������
������������������������������������������
( 1) ( )
1
where is a predefined constant.S
n n
S Sh
��������������
����������������������������
11 1 1 1
( )h j
S n nnh hm jS
h i j j
L u s m i x i
��������������
��������������
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Approximate Asymptotic ModelApproximate Asymptotic Model Goal: get the lowest bound of deflection probability.Goal: get the lowest bound of deflection probability. Unlimited delay line size.Unlimited delay line size. The approximate asymptotic model assume that The approximate asymptotic model assume that
m1 = m2 = … = mm1 = m2 = … = mn-1n-1 = 1 and m = 1 and mnn = ∞. = ∞.
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EstimationEstimation Redefine the state definition of DTMC asRedefine the state definition of DTMC as
Estimation:Estimation:
(1), (2)
( )| ( ) ( )| ( )(2)
(1), (2
1 1 2
)1
(2)1
( , )( , ) ( , )
( )
where ( , ) ( (1) ) ( (2) )
and ( ) (2)
n
m mn n
m m m mn n n n
mn
n nhm mn n
n
n
hmn
S S
S S S SS
S
h hm mS S S
h
S
hmS S
h
m m
f x yf x y f x y
f y
f x y s x s y
f y s y
��������������
������������� �
��������������
������������� �
1 2 1 1 2(1), (1),..., (1), (1), (2), ( ), , ,...,
n n n nm m m m m m n nS s s s s s s m x x x
��������������
Back
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An Iterative Method to calculus the steady state distribution An Iterative Method to calculus the steady state distribution
1)1) Initial: Initial:
2)2) Calculus state transition probability matrix: Calculus state transition probability matrix:
1
1, 1, 2, ,
Si S
S ��������������
����������������������������
( 1)| ( )
1( , ) , , {0,1, , }
1m n m nn nS m S m
f x y x y nn
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An Iterative Method to calculus the steady state distribution An Iterative Method to calculus the steady state distribution
3)3) Calculus the next state distribution vectors.Calculus the next state distribution vectors.
4)4) Check the convergence condition.Check the convergence condition.
If the condition holds, stop the program and compute If the condition holds, stop the program and compute deflection probability.deflection probability.
Otherwise, calculus the new Otherwise, calculus the new estimateestimate conditional conditional probability and go to step 2)probability and go to step 2)
( 1) ( )
(0)
1 1 1with initial condition , , ,
n n
S S
S
T
S S S
����������������������������
��������������
��������������
������������������������������������������
( 1) ( )
1
where is a predefined constant.S
n n
S Sh
��������������
����������������������������
( 1)| ( )( , )
m n m nn nS m S m
f x y
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OutlineOutline
IntroductionIntroduction Switching Architecture and Control StrategiesSwitching Architecture and Control Strategies Performance ResultsPerformance Results Input Traffic ModelInput Traffic Model Queueing Analysis Queueing Analysis Numerical Results for Queueing Analysis ModelNumerical Results for Queueing Analysis Model
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Exact model and simulation Exact model and simulation for Symmetrical Trafficfor Symmetrical Traffic
MM11=1, M=1, M22=4.=4. Using LAVS control strategy.Using LAVS control strategy.
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Exact model and simulation Exact model and simulation for Asymmetrical Trafficfor Asymmetrical Traffic
MM11=1, M=1, M22=4.=4. Using LAVS control strategy.Using LAVS control strategy. Expected bursty length = 20.Expected bursty length = 20.
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Lowest bound of deflection probability.Lowest bound of deflection probability. Under a specific traffic condition, we obtain the lowest bound of deflection Under a specific traffic condition, we obtain the lowest bound of deflection
prob.prob. bursty length = 5 and offered load = 0.6 :bursty length = 5 and offered load = 0.6 :
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ConclusionsConclusions
M-B-Quadro can achieve lower packet deflection M-B-Quadro can achieve lower packet deflection probability.probability.
The analytical model can evaluate the system The analytical model can evaluate the system performances under non-bursty, bursty, symmetrical, performances under non-bursty, bursty, symmetrical, and asymmetrical conditions. and asymmetrical conditions.
The numerical results show the analytical model is The numerical results show the analytical model is successful to reveal the lowest bound of deflection successful to reveal the lowest bound of deflection probability in this switching architecture. probability in this switching architecture.
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ReferenceReference [1][1] Chlamtac, I. and Fumagalli, and Suh, C. J., 2000, “Multibuffer Delay Chlamtac, I. and Fumagalli, and Suh, C. J., 2000, “Multibuffer Delay
Line Line Architecture for Architecture for Efficient Contention Resolution in Optical Efficient Contention Resolution in Optical Switching Switching Nodes,” Nodes,” IEEE Transactions on CommunicationsIEEE Transactions on Communications, Vol. 48, No. , Vol. 48, No. 12, pp. 2089-12, pp. 2089- 2098.2098.
[2][2] Haas, Z., 1993, “The Staggering Switch - An Electronically Controlled Haas, Z., 1993, “The Staggering Switch - An Electronically Controlled Optical Packet Switch,” Optical Packet Switch,” IEEE/OSA Journal of Lightwave TechnologyIEEE/OSA Journal of Lightwave Technology, ,
Vol. Vol. 11, No. 5/6, pp. 925-936. 11, No. 5/6, pp. 925-936. [3][3] Wang-Rong Chang, Ho-Ting Wu, Kai-Wei Ke, and Hui-Tang Lin, “The Wang-Rong Chang, Ho-Ting Wu, Kai-Wei Ke, and Hui-Tang Lin, “The
Designs of a Scalable Optical Packet Switching Architecture”, Designs of a Scalable Optical Packet Switching Architecture”, Journal of Journal of the the Chinese Institute of EngineersChinese Institute of Engineers, vol. 31, no. 3, pp. 469-479, 2008. , vol. 31, no. 3, pp. 469-479, 2008.