1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4...
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Transcript of 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4...
![Page 1: 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.](https://reader036.fdocuments.net/reader036/viewer/2022082816/56649f495503460f94c6b4c5/html5/thumbnails/1.jpg)
1G.Pessina, RICH Elec Upg, 11 April 2010
Analog Channels per chip 4 to 8
Digital channel per chip 4 to 8
Wire-bond pitch (input channels)
Input capacitance on channel 1 -2 pF
Input resistance < 50
AC or DC coupling to sensor? DC
Maximum leakage current per channel
<1 – 10 nA
Noise < 50 KelRMS (TOF option)< 100 KelRMS (no TOF)
Maximum crosstalk < 1 – 2 %
Signal polarity of input signal Negative
Signal polarity of output signal Positive (not so stringent)
Dynamic range (input charge) < 10 Mel (PMT)< 4 Mel (MCP)
Linearity < 5 %
Power consumption per channel
total
< 3 mW (very front-end)< 8 mW (very front-end,
shaper and discriminator)
Specifications for PMT/MCP readout (I)
![Page 2: 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.](https://reader036.fdocuments.net/reader036/viewer/2022082816/56649f495503460f94c6b4c5/html5/thumbnails/2.jpg)
2G.Pessina, RICH Elec Upg, 11 April 2010
Specifications for PMT/MCP readout (II)
Pre-amp peaking time < 2 ns
Pre-amp rise time < 0.5 ns
Pre-amp recovery time < 10 ns
Shaper peaking time 5 – 10 ns
Shaper recovery time 25 – 50 ns
Pulse spill-over ???
Gain 25 mV/Mel (Selectable with 2 bits)
Total ionizing radiation dose
Die size
Packaging for Analog DIL
Packaging for Digital PLCC
Readout scheme (analog, digital, binary)
Digital: ADC bits 6 - 8
Input range
ADC sampling rate
ADC power consumption/channel
Binary: Threshold range
Threshold Uniformity
Timewalk
![Page 3: 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.](https://reader036.fdocuments.net/reader036/viewer/2022082816/56649f495503460f94c6b4c5/html5/thumbnails/3.jpg)
3G.Pessina, RICH Elec Upg, 11 April 2010
Specifications for PMT/MCP readout (III)
Questions:
Which acquisition philosophy:
Trigger or trigger-less?
Analog or binary?
Analog and binary (namely analog just for diagnostic, then digital in running)?
![Page 4: 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.](https://reader036.fdocuments.net/reader036/viewer/2022082816/56649f495503460f94c6b4c5/html5/thumbnails/4.jpg)
4G.Pessina, RICH Elec Upg, 11 April 2010
Specifications for HPD with external readout (I)
Analog Channels per chip 8 to 16
Digital channel per chip 8 to 16
Wire-bond pitch (input channels)
Input capacitance on channel 1 -2 pF
AC or DC coupling to sensor? DC
Maximum leakage current per channel
<1 – 10 pA
Noise < 200 elRMS (TOF option) <400 elRMS (no TOF)
Maximum crosstalk < 0.5 – 1 %
Signal polarity of input signal Positive
Signal polarity of output signal Positive (not so stringent)
Dynamic range (input charge) < 30 Kel
Linearity < 1 %
Power consumption per channel total
< 3 mW (very front-end)< 8 mW (very front-end, shaper and discriminator)
![Page 5: 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.](https://reader036.fdocuments.net/reader036/viewer/2022082816/56649f495503460f94c6b4c5/html5/thumbnails/5.jpg)
5G.Pessina, RICH Elec Upg, 11 April 2010
Specifications for HPD with external readout (II)
Pre-amp peaking time < 2 ns
Pre-amp rise time < 0.5 ns
Pre-amp recovery time < 10 ns
Shaper peaking time 5 – 10 ns
Shaper recovery time 25 – 50 ns
Pulse spill-over ???
Gain 10 mV/Kel
Total ionising radiation dose
Die size
Packaging for Analog DIL
Packaging for Digital PLCC
Readout scheme (analog, digital, binary)
Digital: ADC bits 8 - 10
Input range
ADC sampling rate
ADC power consumption/channel
Binary: Threshold range
Threshold Uniformity
Timewalk
![Page 6: 1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.](https://reader036.fdocuments.net/reader036/viewer/2022082816/56649f495503460f94c6b4c5/html5/thumbnails/6.jpg)
6G.Pessina, RICH Elec Upg, 11 April 2010
Specifications for HPD with external readout (III)
Same questions as before:
Which acquisition philosophy:
Trigger or trigger-less?
Analog or binary?
Analog and binary (namely analog just for diagnostic, then digital in running)?