1 Electrical Engineering 2 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse) Lecture...

1

Electrical Engineering 2

Microelectronics 2

Dr. Peter Ewen

(Room G08, SMC; email - pjse)

Lecture 4

ELECTRICAL ENGINEERING 2

Microelectronics 2

Dr. P.J.S. Ewen

LECTURES: Mondays 12.10-13.00 Swann 7.20 Fridays 10.00-10.50 JCMB 5327

TUTORIALS: Mondays 11.10-12.00 Eng. CR 4(Monday Lab Group)

Tuesdays 11.10-12.00 Eng. CR 4(Friday Lab Group)

N.B. Tutorials run in weeks 3, 5, 7, 9, 11

3

Fig. 20

Si Si Si

+ve charge associated with vacancy the vacancy is mobile

Electric field-ve +ve

the vacancy acts like a mobile +ve charge

+-Semiconductor

Electron-hole pair

4

ni – intrinsic carrier concentration

(N.B. ni ≠ n + p)

At 300K: ni = 1.5x1016 m-3 for Sini = 2.5x1019 m-3 for Ge

INTRINSIC SEMICONDUCTORS Pure semiconductors are termed “intrinsic”:

n = p = nin – free electron concentration; p – hole concentration

Si Si Si

5

CARRIER LIFETIME - : 10-9 < < 10-6 s

C.B.

V.B.

GENERATION RECOMBINATION

Fig. 21

Eg

6

n-type

pentavalent

donoratoms

p-type

trivalent

acceptoratoms

Substitutional impurities – they can be incorporated into the semiconductor lattice without distorting it.

Typical doping concentrations:

1020 – 1026 m-3

EXTRINSICSEMICONDUCTORS

7

Fig. 22

Si As Si

Si

Si Donoratom

En

erg

y

~0.01 eV

n-type Si

C.B.

V.B.

Donor levels

8

Fig. 22

Si B Si

Si

Si Acceptor

atom

En

erg

y

~0.01 eV

p-type Si

C.B.

V.B.

Acceptor levels

9Fig. 23: Typical range of conductivities/resistivities

for metals insulators and semiconductors.

i

i

i

i

i

10

The effect of increasing temperature on resistance/resistivity.

MetalIntrinsic

semiconductorInsulator Extrinsic

semiconductor

As T R R R R or R or R constant

TCR +ve -ve -ve +ve, -ve or ~0

Fig. 24

dT

dR

RTCR

1def

Temperature Coefficient of Resistance

11

LECTURE 4

Influence of temperature on carrier concentrations in semiconductors

Majority and minority carriers

The Fermi-Dirac distribution function

12Temperature / K

(Fre

e) e

lect

ron

co

nce

ntr

atio

n,

n

/ m

-3Fig. 25: Free electron concentration vs. temperature for

intrinsic and extrinsic silicon

1021

2×1021

3×1021

ni

Intrinsic Si

100 200 300 400 500 600

n-type Si doped with ND = 1021 m-3

EXTRINSIC REGION

IONISATION REGION

INTRINSIC REGION

0

13

Si Si Si

Si

Si

Donoratom

Si As Si

Si

Si

Energy required to break a silicon bond is ~1.1ev

Intrinsic Si

Energy required to detach a donor electron is ~0.01ev

n-type Si

14

Same considerations apply to p-type Si (p = NA in saturation region)

Extrinsic material effectively becomes intrinsic above a certain transition temperature – bad news for devices!

Temperature, T / K

(Fre

e) e

lect

ron

co

nce

ntr

atio

n,

n

/ m

-3

1021

2×1021

3×1021

ni

100 200 300 400 500 600

H

ole

co

nce

ntr

atio

n,

p

/ m

-3

Ge Si GaAs

ni ni

15

8. Maximum working temperature for a semiconductor device

The maximum temperature, Tmax, at which a device can operate is fixed by the semiconductor material from which it is made. At Tmax, ni = ND for n-type material and ni = NA for p-type material.

If ni = C exp (-Eg / 2kT)

where Eg is the energy gap, T the temperature in degrees K, C is a constant and k is Boltzmann's constant, determine Tmax for a GaAs sample doped with 1020 donors m-3, given that for GaAs, Eg = 1.42 eV and C = 18.1x1023 m-3.

16

8. Maximum working temperature for a semiconductor device

For an n-type semiconductor, by definition the (approximate) maximum working temperature, Tmax, is the temperature at which

ni = ND.

Temperature, T / KTemperature, T / K

10102121

22××10102121

33××10102121

nnii

100 200 300 400 500 6100 200 300 400 500 60000

Fre

e el

ectr

on

co

nce

ntr

atio

n, n

/ m

Fre

e el

ectr

on

co

nce

ntr

atio

n, n

/ m

-- 33

MaximumMaximumWorkingWorking

temperaturetemperature

NNDD==

nnii=N=NDD

Temperature, T / KTemperature, T / K

10102121

22××10102121

33××10102121

nnii

100 200 300 400 500 6100 200 300 400 500 60000100 200 300 400 500 6100 200 300 400 500 60000

Fre

e el

ectr

on

co

nce

ntr

atio

n, n

/ m

Fre

e el

ectr

on

co

nce

ntr

atio

n, n

/ m

-- 33

MaximumMaximumWorkingWorking

temperaturetemperature

NNDD==

nnii=N=NDD

)2

exp(kT

ECn g

i

kT

E

C

n gi

2)ln(

17

]/ln[2

]/ln[2

:side hand-lefton Tget togRearrangin2

)ln(

i

g

i

g

gi

nCk

E

Cnk

ET

kT

E

C

n

)570(840]

10101.18

ln[1038.12

106.142.1

20

2323

19

max CKT

So for a GaAs sample doped with 1020 donors m-3:

(The 1.610-19 in the above converts eV to joules.)

]/ln[2 Hence max

D

g

NCk

ET

But at T = Tmax, ni = ND

18

Fig 19: Variation of the energy bands with Fig 19: Variation of the energy bands with interatomicinteratomicspacing for silicon (and also germanium and carbon).spacing for silicon (and also germanium and carbon).

Energy levels of the

isolated atom

Equilibrium spacingEquilibrium spacing INTERATOMIC SPACINGINTERATOMIC SPACING

ELECTRON ELECTRON ENERGYENERGY

As temperature increases,structure expands

Valence electrons

Fig 19: Variation of the energy bands with Fig 19: Variation of the energy bands with interatomicinteratomicspacing for silicon (and also germanium and carbon).spacing for silicon (and also germanium and carbon).

Energy levels of the

isolated atom

Equilibrium spacingEquilibrium spacing INTERATOMIC SPACINGINTERATOMIC SPACING

ELECTRON ELECTRON ENERGYENERGY

As temperature increases,structure expands

Valence electrons

This calculation ignores the change in Eg due to temperature:

Eg decreases from 1.42 to 1.2eV over this temperature range. However,

even if you correct for this, the maximum working temperature for GaAs is still greater than 450oC, much higher than for Si.

19

Majority and Minority Carriers

For intrinsic semiconductors:

n = p = ni

np = ni2

For extrinsic semiconductors:

nn >> pn for n-type pp >> np for p-type

For extrinsic semiconductors it also turns out that:

np = ni2

ni – the intrinsic carrier concentration

n – the free electron concentration

p – the hole concentration

*

Temperature, T / K

Car

rier

co

nce

ntr

atio

n

/ m

-3

1021

2×1021

3×1021

ni

100 200 300 400 500 600

*Provided semiconductor is in this temperature

range

20

So for extrinsic semiconductors:

nnpn = ni2 for n-type

nppp = ni2 for p-type

Temperature, T / K

Car

rier

co

nce

ntr

atio

n

/ m

-3

1021

2×1021

3×1021

ni

100 200 300 400 500 600


rangenn ≈ ND for n-type

pp ≈ NA for p-type

ND – donor concentrationNA – acceptor concentration

*

Thus for n-type: nn ≈ ND ; pn ≈ ni2 / ND

for p-type: pp ≈ NA ; np ≈ ni2 / NA

Electrons in n-type – majority carriers Holes in n-type – minority carriers Holes in p-type – majority carriers Electrons in p-type – minority carriers

21

9. Carrier concentrations (Bogart, 4th Edition, Ex. 2-18, p.41)

A silicon wafer is doped with 1.8x1020m-3

atoms of As. If ni = 1.6x1016m-3 determine the electron and hole concentrations, n and p.

(Assume the temperature is in the extrinsic region of operation.)

Temperature, T / K

Ele

ctro

n c

on

cen

trat

ion

/

m-3

4×1020

6×1020

ni

100 200 300 400 500 600


range

2×1020

22

320108.1 mNn D

31220

21622

1042.1108.1

)106.1(

mN

n

n

np

D

ii

9. Carrier concentrations

Arsenic is an n-type dopant hence:

nn--typetype

pentavalentpentavalent

donordonoratomsatoms

pp--typetype

trivalenttrivalent

acceptoracceptoratomsatoms

SubstitutionalSubstitutional impurities impurities ––they can be incorporated they can be incorporated into the semiconductor into the semiconductor lattice without distorting it.lattice without distorting it.

Typical doping Typical doping concentrations:concentrations:

10102020 –– 10102626 mm--33

EXTRINSICEXTRINSICSEMICONDUCTORSSEMICONDUCTORS

nn--typetype



nn--typetype



pp--typetype

trivalenttrivalent


pp--typetype

trivalenttrivalent


SubstitutionalSubstitutional impurities impurities ––they can be incorporated they can be incorporated into the semiconductor into the semiconductor lattice without distorting it.lattice without distorting it.

Typical doping Typical doping concentrations:concentrations:

10102020 –– 10102626 mm--33

EXTRINSICEXTRINSICSEMICONDUCTORSSEMICONDUCTORS

23

Which of the following statements is true:

Holes in an n-type semiconductor are…

A) Majority carriers that are thermally produced

B) Minority carriers that are produced by doping

C) Minority carriers that are thermally produced

D) Majority carriers that are produced by doping

24

En

erg

y

C.B.

V.B.

Donor levelsEg

Statisticalprocesses

E

N(E)

Total number of electrons at energy E

Probability that a state at energy E is occupied

Total number of states at energy E

The Fermi-Dirac Distribution Function

F(E) x n(E) =

25

kTEE FkT

EE F if)(exp

)(exp11)(

kT

EE FEF

F(E) is the Fermi-Dirac Distribution Function

EF – the Fermi Level

2

1)0(exp1

1)(

FEF

A state at the Fermi level, EF, has a 50-50 chance of being occupied

26

Fig. 26E

ner

gy,

E

C.B.

V.B.

E

EC

EF

EV

½EG

½EG

0 ½ 1 F(E)

F(E) for an INTRINSIC semiconductor

THE FERMI-DIRAC DISTRIBUTION

27

Fig. 27E

ner

gy,

E

C.B.

V.B.

E

EC

EF

EV

0 ½ 1 F(E)

F(E) for an n-type semiconductor


donor levels

For n-type semiconductors the Fermi level lies closer to the conduction band edge, Ec

28

Fig. 28E

ner

gy,

E

C.B.

V.B.

E

EC

EF

EV

0 ½ 1 F(E)

F(E) for a p-type semiconductor


acceptor levels

For p-type semiconductors the Fermi level lies closer to the valence band edge, Ev

29

Fig. 29E

ner

gy

C.B.

V.B.

Donor levels

EF

C.B.

V.B.

C.B.

V.B.EF

EF

Metal

Degenerate n-type Degenerate p-type

Degenerate Semiconductors

Acceptor levelsEG

EG

30

For a semiconductor sample at 0 K, what is the probability that a state at the top of the valence band is occupied by anelectron?

A. 0

B. 1

C. ½

D. Between 1 and ½

31

The Fermi level, EF, for a silicon sample lies 0.8eV above the valence band edge. If the energy gap for silicon is 1.1eV, is this sample

A. p-type

B. n-type

C. intrinsic

32

SUMMARYINFLUENCE OF TEMPERATURE ON CARRIER

CONCENTRATIONS

Temperature / KTemperature / K

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

-- 33

Fig. 25: Free electron concentration vs. temperature forFig. 25: Free electron concentration vs. temperature forintrinsic and extrinsic siliconintrinsic and extrinsic silicon

10102121

22××10102121

33××10102121

nnii

Intrinsic Intrinsic SiSi

100 200 300 400 500 6100 200 300 400 500 60000

nn--type type SiSi doped with Ndoped with NDD = 10= 102121 mm--33

EXTRINSIC REGIONEXTRINSIC REGION

IONISATIONIONISATIONREGIONREGION

INTRINSIC INTRINSIC REGIONREGION

00Temperature / KTemperature / K

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

-- 33


10102121

22××10102121

33××10102121

nnii


100 200 300 400 500 6100 200 300 400 500 60000100 200 300 400 500 6100 200 300 400 500 60000





00

For intrinsic semiconductors the carrier concentrations increase steadily as T increases. In Si, ni is small below 400K but increases rapidly above this temperature.

33

For extrinsic semiconductors the concentration vs. T plot has three regions:

1. Ionisation region – the impurities are being ionised2. Extrinsic region – all the impurities are ionised; few electron hole pairs3. Intrinsic region – electron-hole pairs produced in large numbers – material effectively becomes intrinsic

There is a transition temperature below which devices must operate, otherwise pn junctions will be lost.

33

Temperature / KTemperature / K

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

-- 33


10102121

22××10102121

33××10102121

nnii


100 200 300 400 500 6100 200 300 400 500 60000





00Temperature / KTemperature / K

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

(Fre

e) e

lect

ron

co

nce

ntr

atio

n, n

/ m

-- 33


10102121

22××10102121

33××10102121

nnii


100 200 300 400 500 6100 200 300 400 500 60000100 200 300 400 500 6100 200 300 400 500 60000





00

34

MAJORITY AND MINORITY CARRIERS

Majority carriers - electrons in n-type and holes in p-type

Minority carriers - electrons in p-type and holes in n-type

np = ni2

In n-type: nn ≈ ND ; pn ≈ ni

2 / ND

In p-type: pp ≈ NA ; np ≈ ni2 / NA

35

THE FERMI-DIRAC DISTRIBUTION FUNCTIONThis is a statistical function giving the probability

that a state at energy E is occupied by an electron

EF is the FERMI LEVEL - the energy at which a state has a 50-50 chance of occupancy.

)(exp11)(

kT

EE FEF

36

Fig. 26Fig. 26

En

erg

y, E

En

erg

y, E

C.B.C.B.

V.B.V.B.

EE

EECC

EEFF

EEVV

½½EEGG

½½EEGG

0 0 ½½ 1 F(E) 1 F(E)

F(E) for anF(E) for an INTRINSICINTRINSIC semiconductorsemiconductor

THE FERMITHE FERMI--DIRAC DISTRIBUTIONDIRAC DISTRIBUTION

Fig. 26Fig. 26

En

erg

y, E

En

erg

y, E

C.B.C.B.

V.B.V.B.

EE

EECC

EEFF

EEVV

½½EEGG

½½EEGG

0 0 ½½ 1 F(E) 1 F(E)

F(E) for anF(E) for an INTRINSICINTRINSIC semiconductorsemiconductor

THE FERMITHE FERMI--DIRAC DISTRIBUTIONDIRAC DISTRIBUTION

The Fermi Level is approximately in the middle of the gap for an intrinsic semiconductor.

The position of the Fermi Level is a measure of how n-type or p-type the material is.

A degenerate semiconductor is one which is very heavily doped.

1 Electrical Engineering 2 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse) Lecture...

Documents

Transcript of 1 Electrical Engineering 2 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse) Lecture...