1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week:...

15
1 Computer Computer Organization Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today: First Hour: Computer Organization Section 11.1 of Katz’s Textbook In-class Activity #1 Second Hour: Test Review

Transcript of 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week:...

Page 1: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

1

Computer OrganizationComputer OrganizationNotes: Test 2 on Thursday

TA office hours moved from Fri to Wed this week:

Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119

Today:

• First Hour: Computer Organization–Section 11.1 of Katz’s Textbook

– In-class Activity #1

• Second Hour: Test Review

Page 2: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

2

RegisterRegister

Register

Data In(N bits)

Load

Data Out(N bits)

Output Enable

N N

(we have Tri-state outputs)

Basic Building Blocks (1)Basic Building Blocks (1)

Page 3: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

3

Basic Building Blocks (2)Basic Building Blocks (2)

ShiftRegister

Data In

Load

Data Out

Output Enable

N N

Shift Controls(left/right/no shift)

Shift RegisterShift Register

Page 4: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

4

Basic Building Blocks (3)Basic Building Blocks (3)Combinational ShifterCombinational Shifter

Shifter

N

N

ShiftControlSignals

Edge Inputs

Edge Outputs

Page 5: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

5

Basic Building Blocks (4)Basic Building Blocks (4)Arithmetic-Logic UnitArithmetic-Logic Unit

N N

A B

ALUOperation

N

Flags(carry out, overflow, etc.)

Result

Keep in mind:

The ALU is a combinational

circuit.

Keep in mind:

The ALU is a combinational

circuit.

Page 6: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

6

BusesBuses

Data Lines (two-way) N

Address Lines (one-way) M

Control Lines (mix of 1 and 2-way lines)C

A shared collection of wires for exchanging data, with some defined rulesA shared collection of wires for exchanging data, with some defined rules

Rule 1: Only one device can write to a bus at any time

Rule 2: Multiple devices can read the bus at any time

Rule 3: There is usually a bus protocol that is followed strictly by all devices sharing the bus

Rule 1: Only one device can write to a bus at any time

Rule 2: Multiple devices can read the bus at any time

Rule 3: There is usually a bus protocol that is followed strictly by all devices sharing the bus

Page 7: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

7

3 Registers Sharing a Bus3 Registers Sharing a BusN

M

C

Register 1 Register 2 Register 3

OE1 OE2 OE3

LOAD1 LOAD2 LOAD3

Only one of these OE’scan be true

at once

Several of thesecan be true

at once

OE’s and LOAD’s

generally determined

by the control lines

Page 8: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

8

Register-to-Register Data TransferRegister-to-Register Data Transfer

N

OE1

M

C

Register 1 Register 2 Register 3

OE2 OE3

LOAD1 LOAD2 LOAD3

Register 1 Register 3Register 1 Register 3

Page 9: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

9

RAMRAM

RandomAccessMemory

MAR

MemoryAddressRegister

(we provide address here)

MBR

MemoryBuffer

Register(we exchange data here)

Request (Chip Select)

Read/Write

Wait

MemoryControlSignals

MemoryControlSignals

Slow RAMsusually ask

Processor to wait

Page 10: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

10

Note: This is not the onlyNote: This is not the onlyway to build a computer,way to build a computer,

but is the most common one.but is the most common one.

Note: This is not the onlyNote: This is not the onlyway to build a computer,way to build a computer,

but is the most common one.but is the most common one.

I want to build a computer!I want to build a computer!Basic Idea #1: The Stored Program Computer ConceptBasic Idea #1: The Stored Program Computer Concept

This is an instruction-controlled digital system with a memory

A sequence of instructions are stored in memory

This set of instructions constitute the program that defines the machine’s behavior

The same memory also holds the data needed to execute the program

The same memory also holds the outputs produced by the program, as well as any intermediate results

The memory is large (ideally, infinite)

Page 11: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

11

The processor executes the following “infinite loop” forever:

Step 1. Fetch the next instruction from memory to a registerThe register is usually called the instruction registerThe address of the next instruction is usually stored in a register called the program counter.

Step 2. Decode the instruction

Step 3. Fetch any operands needed

Step 4. Execute the instruction

Step 5. Do internal housekeeping, and Go to Step 1One important chore is to change the address in the program counter to point to the next instruction.

The Cycle of LifeThe Cycle of LifeBasic Idea #2: The Instruction CycleBasic Idea #2: The Instruction Cycle

Page 12: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

12

Structure of a ComputerStructure of a ComputerProcessor Memory

System

Control Datapath

Address

Read/Write

Data

ControlSignals

Data Inputs

The Datapath Unit, also called the execution unitexecution unit. It is analogous to the flesh and bones in the human body.

Main parts: Registers, Shifter, ALU, Buses.

The Control Unit, also called the instruction unitinstruction unit. It is analogous to the brain and nervous system in the human body.

Main parts: Finite-State Machine

The Datapath Unit, also called the execution unitexecution unit. It is analogous to the flesh and bones in the human body.

Main parts: Registers, Shifter, ALU, Buses.

The Control Unit, also called the instruction unitinstruction unit. It is analogous to the brain and nervous system in the human body.

Main parts: Finite-State Machine

The Processor consists

of two major parts:

The Processor consists

of two major parts:

CentralProcessing

Unit(CPU)

CentralProcessing

Unit(CPU)

In its simplest form, a computer consists of a processor (CPU) and a memory system.

In its simplest form, a computer consists of a processor (CPU) and a memory system.

Page 13: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

13

The BUSBUS is likea highway for

transferring data from one point to

any other point

Program CounterProgram Counter(Holds address of NEXT instruction) Instruction RegisterInstruction Register

(Holds the fetchedinstruction)

AccumulatorAccumulatorInvolved in most

instructions

Note that this one has two outputs

Put Them Together!Put Them Together!Single Bus DesignSingle Bus Design

The Datapath Unit

Memory Address

Bus

Memory Data BusM

A R

P C

I R

A C

A

B

M B R

BUS

Page 14: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

14

Do Activity #1 NowDo Activity #1 NowThe Datapath Unit

Memory Address

Bus

Memory Data BusM

A R

P C

I R

A C

A

B

M B R

BUS

RandomAccessMemory

MAR

MBR

Request (Chip Select)

Read/Write

Wait

Page 15: 1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:

15

RETAIN THE LAST PAGE(S) (#3 onwards)!!

For Next Class:• Bring Randy Katz Textbook, & TTL Data Book

• Required Reading:– Sec 11.3, skim 11.2 of Katz, omit the ABEL and ASM

descriptions

• This reading is necessary for getting points in the Studio Activity!