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current-controlled source. The generalized instantaneous reactive power theory which is valid for sinusoidal or non-
sinusoidal and balanced or unbalanced three-phase power systems with or without zero-sequence currents were later
proposed [8]. The construction controller of the D-STATCOM is used to operate the inverter in such a way that the phase
angle between the inverter voltage and the line voltage is dynamically adjusted so that the D-STATCOM generates or absorbs the desired VAR at the point of connection. The phase of the output voltage of the thyristor-based inverter, V i, is
controlled in the same way as the distribution system voltage, V s.
The DSTATCOM is based on the instantaneous real-power theory; it provides good compensation characteristics
in steady state as well as transient states [11]. The instantaneous real-power theory generates the reference currents
required to compensate the distorted line current harmonics and reactive power. It also tries to maintain the dc-bus voltage
across the capacitor constant. Another important characteristic of this real-power theory is the simplicity of the
calculations, which involves only algebraic calculation [12].
A multilevel inverter can reduce the device voltage and the output harmonics by increasing the number of outputvoltage levels. There are several types of multilevel inverters: cascaded H-bridge (CHB), neutral point clamped, flying
capacitor [2-5]. In particular, among these topologies, CHB inverters are being widely used because of their modularity
and simplicity. Various modulation methods can be applied to CHB inverters. CHB inverters can also increase the number
of output voltage levels easily by increasing the number of H-bridges. This paper presents a DSTATCOM with a
proportional integral controller based CHB multilevel (five level and seven level) inverter for the harmonics and reactive
power mitigation of the nonlinear loads. This type of arrangements have been widely used for PQ applications due to
increase in the number of voltage levels, low switching losses, low electromagnetic compatibility for hybrid filters and
higher order harmonic elimination.
PROPOSED SYSTEM
Figure 1: Schematic Diagram of DSTATCOM
Instantaneous real-power theory based cascaded multilevel inverter based DSTATCOM is connected in the
distribution network at the PCC through filter inductances and operates in a closed loop. The DSTATCOM system
contains a cascaded inverter, RL-filters, a compensation controller (instantaneous real-power theory) and switching signalgenerator (proposed triangular-sampling current modulator) as shown in the Figure 1. The three-phase supply source
connected with non-linear load and these nonlinear loads currents contains fundamental and harmonic components. If the
active power filter provides the total reactive and harmonic power, i s (t) will be in phase with the utility voltage and would
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Cascaded Multilevel Inverter Based DSTATCOM for Power Line Conditioners 3Using Instantaneous Real-Power Theory
be sinusoidal. At this time, the active filter must provide the compensation current therefore; active power filter estimates
the fundamental components and compensating the harmonic current and reactive power.
Cascaded H-Bridge Inverter Topologie
The N-level cascaded H-bridge, multilevel inverter comprises series connected single phase H-bridges per
phase, for which each H-bridge has its own isolated dc source. Figure 2 shows one phase of a n-level cascaded H-bridge
inverter.
Figure 2: Single-Phase Structure of a Multilevel Cascaded H-Bridge Inverter
The cascaded H-bridge multilevel inverter is based on multiple two level inverter outputs (each H-bridge), with
the output of each phase shifted. Despite four diodes and switches, it achieves the greatest number of output voltage levels
for the fewest switches. Its main limitation lies in its need for isolated power sources for each level and for each phase,although for VA compensation, capacitors replace the dc supplies, and the necessary capacitor energy is only to replace
losses due to inverter losses. Its modular structure of identical H-bridges is a positive feature.
The number of levels in the line-to-line voltage waveform Will be k= 2N-1
while the number of levels in the line to load neutral of a star (wye) load will be p = 2k 1
The number of capacitors or isolated supplies required per phase is N cap = (N 1)
The number of possible switch states is n states = N phases
The number of switches in each leg is
Sn = 2(N 1)
Half H-Bridge
Vout
Vdc/2
Vdc/2
S1
S2
Figure 3: Half Bridge
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Figure 3 shows the Half H-Bridge Configuration. By using single Half H-Bridge we can get 2 voltage levels. The
switching table is given in Table 1
Table 1: Switching Table for Half Bridge
Switches Turn ON Voltage LevelS2 Vdc/2S1 -Vdc/2
B Full H-Bridge- Two Level Inverter
Vout
S3
S2
S4
S1
Vdc
Figure 4: Full H-Bridge
Table 2: Switching Table for Full H-Bridge
Switches Turn ON Voltage LevelS1,S2 Vdc/2S3,S4 -Vdc/2
Figure 4 shows the Full H-Bridge Configuration. By using single H-Bridge we can get 2 and 3 voltage levels. The
number output voltage levels of cascaded Full H-Bridge are given by 2n+1 and voltage step of each level is given byVdc/n. Where n is number of H-bridges connected in cascaded. The switching table is given in Table II and III.
Full H-Bridge- Three Level Inverter
Table 3 Shows the Switching Table for Full H-Bridge for Three Level Inverter
Table 3: Switching Table for Full Bridge Three Level
Switches Turn ON Voltage LevelS1,S2 Vdc/2S3,S4 VdcS2,S4 0
Five Level CHB Inverter
Figure 5: Five Level CHB Inverter
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Cascaded Multilevel Inverter Based DSTATCOM for Power Line Conditioners 5Using Instantaneous Real-Power Theory
Figure 5 Shows the five level multilevel inverter and Table IV shows the switching states of the 5 level inverter.
Here even though we have eight switches at any switching state only two switches are on/off at a voltage level of Vdc/2, so
switching losses are reduced. In three levels inverter dv/dt is Vdc, but in five level inverter dv/dt is Vdc/2. As dv/dt reduces
the stress on switches reduces and EMI reduces.
Table 4: Switching Table for Full H-Bridge of Five Level Inverter
Switches Turn ON Voltage Level
S1,S2,S6,S8 Vdc/2S1,S2,S5,S6 VdcS2, S4,S6,S8 0S3,S4,S6,S8 -Vdc/2S3,S4,S7,S8 -Vdc
E Seven Level CHB Inverter
Figure 6: Seven Level CHB Inverter
Figure 6 Shows the seven level multilevel inverter and Table shows the switching states of the seven level inverter
Table 5: Switching Table for Full H-Bridge of Seven Level Inverter
Switches Turn ON Voltage LevelS1,S2,S6,S8,S10,S12 Vdc/3S1,S2,S5,S6,S10,S12 2Vdc/3S1,S2,S5,S6,S9,S10 Vdc
S2,S4,S6,S8,S10,S12 0S3,S4,S6,S8 S10,S12 -Vdc/3S3,S4,S7,S8,S10,S12 -2Vdc/3S3,S4,S7,S8,S11,S12 -Vdc
Reference Current Control Strategy
The control scheme of the shunt active power filter must calculate the current reference signals from each phase
of the inverter using instantaneous real-power compensator. The block diagram as shown in Figure 4, that control scheme
generates the reference current required to compensate the load current harmonics and reactive power. The PI controller istried to maintain the dc-bus voltage across the capacitor constant of the cascaded inverter. This instantaneous real- power
compensator with PI-controller is used to extracts reference value of current to be compensated.
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Figure 7: Reference Current Generator Using Instantaneous Real-Power Theory
These reference currents i sa*, i sb* and i sc* are calculated instantaneously without any time delay by using the
instantaneous coordinate currents. The required references current derivate from the inverse Clarke transformation and
it can be written as
(1)The reference currents *, i sb* and i sc are compared with actual source current i sa , i sb and i sc that facilitates
generating cascaded multilevel inverter switching signals using the proposed triangular-sampling current modulator. The
small amount of real-power is adjusted by changing the amplitude of fundamental component of reference currents and the
objective of this algorithm is to compensate all undesirable components. When the power system voltages are balanced and
sinusoidal, it leads to constant power at the dc bus capacitor and balanced sinusoidal currents at AC mains simultaneously.
PROPOSED INSTANTANEOUS POWER THEORY
The instantaneous power theory or p-q theory was introduced by Akagi in 1983. This method uses algebra
transformation also know as Clarke transform for three phase voltage and current. The three phase voltage and current are
converted into - us ing eq. (3) and eq. (4), where i abc are three phase line current and v abc are three phase line
voltage.[2].The proposed instantaneous real-power (p) theory derives from the conventional p-q theory or instantaneous
power theory concept and uses simple algebraic calculations. It operates in steady-state or transient as well as for generic
voltage and current power systems that allowing to control the active power filters in real-time. The active filter should
supply the oscillating portion of the instantaneous active current of the load and hence makes source current sinusoidal.
Figure 8: - Coordinates Transformation
The p-q theory performs a Clarke transformation of a stationary system of coordinates a b c to an orthogonal
reference system of coordinates In a b c coordinates axes are fixed on the same plane, apart from each other by
120that as shown in Figure 8. The instantaneous space vectors voltage and current V a , i a are set on the a-axis, V b , i b are on
the b axis, and V c , ic are on the c axis. These space vectors are easily transformed into coordinates. The instantaneous
source voltages v sa, v sb, v sc are transformed into the coordinates voltage by Clarke transformation as follows:
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Cascaded Multilevel Inverter Based DSTATCOM for Power Line Conditioners 7Using Instantaneous Real-Power Theory
= (2)
Similarly, the instantaneous source current i sa, i sb, i sc also transformed into th coordinates current by Clarketransformation that is given as;
= (3)
Where and axes are the orthogonal coordinates. They V , i are on the -axis, and V , i are on the -axis.
Real-Power (p) Calculation
The orthogonal coordinates of voltage and current V* , i* are on the -axis and v , i are on the -axis. Let the
instantaneous real-power calculated from the -axis and - axis of the current and voltage respectively. These are given by
the conventional definition of real-power as:
Pac = V i+V i (4)
This instantaneous real-power p ac is passed to first order Butterworth design based 50 Hz low pass filter (LPF) for
eliminating the higher order components; it allows the fundamental component only. These LPF indicates ac components
of the real- power losses and its denoted as pac
The DC power loss is calculated from the comparison of the dc-bus capacitor voltage of the cascaded inverter and
desired reference voltage. The proportional and integral gains (PI Controller) are determining the dynamic response and
settling time of the dc-bus capacitor voltage. The DC component power losses can be written as
PDC (loss) = [v DC, ref - vDC][k p+ ] (5)
The instantaneous real-power P is calculated from the AC component of the real-power loss pac and the DC
power loss P DC (Loss)); it can be defined as follows;
P = P ac + P DC (Loss) (6)
The instantaneous current on the coordinates of Ic and ic are divided into two kinds of instantaneouscurrent components; first is real-power losses and second is reactive power losses, but this proposed controller computes
only the real-power losses. So the coordinate currents i c*, i c* are calculated from the V , V voltages with
instantaneous real power p only and the reactive power q is assumed to be zero. This approach reduces the calculations and
shows better performance than the conventional methods. The coordinate currents can be calculated as
=
(7)
From this equation, we can calculate the orthogonal coordinates active -power current. The -axis of the
instantaneous active current is written as:
ip =
(8)
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Similarly, the -axis of the instantaneous active current is
Written as:
ip =
(9)
Let the instantaneous powers p(t) in the -axis and the - axis is represented as p and p respectively. They are
given by the definition of real-power as follows
P(t) = v p(t)i p(t) +v p(t)i p(t) (10)
The AC and DC component of the instantaneous power p(t ) is related to the harmonics currents. The
instantaneous real power generates the reference currents required to compensate the distorted line current harmonics and
reactive power.
PWM TECHNIQUE FOR CHB INVERTER
The PWM techniques used for CHB inverter is Level Shifted Carrier PWM (LSCPWM).
Level Shifted Carrier PWM (LSCPWM)
Figure 9: Level Shifted Carrier PWM (IPD)
Figure-9 shows the LSCPWM. The frequency modulation index is given by
m f = f cr / f m,
where f m is modulating frequency and f cr are carrier waves frequency. The amplitude modulation index m a is
defined by m a = V m / V cr (m-1) for 0 m a 1
Where V m is the peak value of the modulating wave and V cr is the peak value of the each carrier wave [1]. The
amplitude modulation index, m a is 1 and the frequency modulation index, m f is 6. The triggering circuit is designed based
on the three phase sinusoidal modulation waves V a, V b, and V c.
The sources have been obtained with same amplitude and frequency but displaced 120 out of the phase with each
others. For carriers signals, the time values of each carrier waves are set to [0 1/600 1/300] while the outputs values are set
according to the disposition of carrier waves.
After comparing, the output signals of comparator are transmitted to the IGBTs. Figures 9, 10 and 11show the
waveforms based on three schemes of LSCPWM: (a) in phase disposition (IPD) figure 9, where all carriers are in phase;
(b) alternative phase opposite disposition (APOD) figure 10, where all carriers are alternatively in opposite disposition; and
(c) phase opposite disposition (POD) figure 11, where all carriers above zero reference are in phase but in opposition withthose below the zero reference [1]. Out of IPD, APOD and POD; the authors studied that, IPD give better harmonic
performance.
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Cascaded Multilevel Inverter Based DSTATCOM for Power Line Conditioners 9Using Instantaneous Real-Power Theory
Figure 10: Alternative Phase opposite Disposition (APOD)
Figure 11: Phase opposite Disposition (POD)
MATLAB/SIMULINK MODELING AND SIMULATION RESULTS
Here MATLAB/Simulink model is developed for two cases. In case one DSATCOM with Linear load and in case
two DSTATCOM with nonlinear load are simulated.
Case One (Level Shifted)
Figure 12 shows the MATAB/Simulink power circuit model of DSTATCOM (level shifted). It consists of five
blocks named as source block, non linear load block, control block, DSTATCOM block and measurements block.
Figure 12: MATLAB/Simulink Power Circuit Model of DSTATCOM for Level Shift
Figure 13: Source Voltage, Current and Load Current with DSTATCOM
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Figure 14: Phase-A Source Voltage and Current
Figure 13 shows the phase-A source voltage and current, even though the load is non linear RL load the source
power factor is unity.
Figure 15: 5- Level Shift Output of D-STATCOM
Case Two (Phase Shifted)
Figure 16: MATLAB/Simulink Power Circuit Model of DSTATCOM for Phase Shift
Figure 15 shows the phase-A voltage of five level output of phase shifted carrier PWM inverter.
Figure 17: Five Levels PSCPWM Output
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Cascaded Multilevel Inverter Based DSTATCOM for Power Line Conditioners 11Using Instantaneous Real-Power Theory
Figure 16 shows the three phase source voltages, three phase source currents and load currents respectively
without DSTATCOM. It is clear that without DSTATCOM load current and source currents are same.
Figure 18: Source Voltage, Current and Load Current without DSTATCOM
Figure 18 shows the three phase source voltages, three phase source currents and load currents respectively with
DSTATCOM. It is clear that with DSTATCOM even though load current is non sinusoidal source currents are sinusoidal.
Figure 19 shows the DC bus voltage. The DC bus voltage is regulated to 11kv by using PI regulator.
Figure 19: DC Bus Voltage
Figure 20 shows the phase-A source voltage and current, even though the load is non linear RL load the source
power factor is unity.
Figure 20: Phase-A Source Voltage and Current
Figure 21 shows the harmonic spectrum of Phase A Source current without DSTATCOM. The THD of source
current without DSTACOM is 36.89%.
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Figure 21: Harmonic Spectrum of Phase-A Source Current without DSTATCOM
Figure 22 shows the harmonic spectrum of Phase A Source current with DSTATCOM. The THD of source
current without DSTACOM is 4.35%
Figure 22: Harmonic Spectrum of Phase-A Source Current with DSTATCOM
CONCLUSIONS
A DSTATCOM is a fast response, solid-state power controller that provides flexible voltage control at the point
of connection (PCC) to the utility distribution feeder for power quality (PQ) improvements. It can continuously generate
reactive power by varying the amplitude of the inverter voltage with respect to the line bus voltage so that a controlled
current flows through the tie reactance between the DSTATCOM and the distribution network. This enables the
DSTATCOM to mitigate voltage fluctuations such as sags, swells, transients and to provide voltage regulation, power
factor correction and harmonics compensation This paper studied a five level inverter used in a DSTATCOM in PS and has
been successfully demonstrated in MATLAB/Simulink. The befits of five level inverter has low harmonics distortion,reduced number of switches to achieve the seven- level inverter output over the cascaded seven level inverter and reduced
switching losses. Mathematical model for single H-Bridge inverter is developed which can be extended to multi H-Bridge.
The source voltage , load voltage , source current, load current, power factor simulation results under non-linear loads are
presented. Finally MATLAB/Simulink based model is developed and simulation results are presented for both linear and
non linear loads.
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