1 A Model-Based Approach to System Specification for Distributed Real-time and Embedded Systems *...

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A Model-Based Approach to System A Model-Based Approach to System Specification for Distributed Real-time Specification for Distributed Real-time

and Embedded Systems *and Embedded Systems *

Radu CorneaRadu Cornea11, Shivajit Mohapatra, Shivajit Mohapatra11, Nikil Dutt, Nikil Dutt11, Rajesh Gupta, Rajesh Gupta22, , Ingolf KruegerIngolf Krueger22, Alex Nicolau, Alex Nicolau11, Doug Schmidt, Doug Schmidt33, Sandeep Shukla, Sandeep Shukla44, ,

Nalini VenkatasubramanianNalini Venkatasubramanian11

1 1 UC IrvineUC Irvine2 2 UC San DiegoUC San Diego

3 3 VanderbiltVanderbilt4 4 Virginia TechVirginia Tech

**This work is supported in part by NSF award ACI-0204028This work is supported in part by NSF award ACI-0204028

FORGE: RTAS MDES 2003 FORGE: RTAS MDES 2003 22

OutlineOutline

FORGE: DRE System DesignFORGE: DRE System Design

System SpecificationSystem Specification

Compiler-Runtime InteractionCompiler-Runtime Interaction

Case StudiesCase Studies• Automatic Target RecognitionAutomatic Target Recognition

• Quality-driven Video StreamingQuality-driven Video Streaming


MotivationMotivation

New portable devicesNew portable devices• Substantial capabilitiesSubstantial capabilities• DRE applicationsDRE applications

Video StreamingVideo Streaming AvionicsAvionics BiomedicalBiomedical Remote sensingRemote sensing Space explorationSpace exploration Command and controlCommand and control

Autonomous systemsAutonomous systems• Networked, heterogeneousNetworked, heterogeneous• Performance, power, and reliability constraintsPerformance, power, and reliability constraints

DRE development processDRE development process• Mostly manually drivenMostly manually driven• Evolving end-to-end software architectures for complex Evolving end-to-end software architectures for complex

systemssystems


FORGE: DRE System DesignFORGE: DRE System Design

Systematic method for DRE application Systematic method for DRE application developmentdevelopment• Integrated specification of system requirementsIntegrated specification of system requirements

Behavior, performance/QoS/Power/RT constraintsBehavior, performance/QoS/Power/RT constraints Specification of heterogeneous platforms across levelsSpecification of heterogeneous platforms across levels Formalized through description languagesFormalized through description languages

• Flexible and optimized middleware solutions and Flexible and optimized middleware solutions and operating systemsoperating systems

Adaptive and reflective middlewareAdaptive and reflective middleware Integration with application codeIntegration with application code

• Compiler/runtime tools for hardware abstraction layersCompiler/runtime tools for hardware abstraction layers Particularly critical for power/performance managementParticularly critical for power/performance management


Application Development ModelApplication Development Model

Capture Platform architecture

Heterogeneous computing platform

DSP -proc DBXscale

ADL capturing the platform architecture RDL describing resource constraints

Application Functional Specification (including timing, power and other constraints)

Service objects

Compiler

Capture resource constraintsMiddleware


Middleware: Adaptation and ReflectionMiddleware: Adaptation and Reflection

AdaptiveAdaptive• StaticallyStatically

Reduce memoryReduce memory Minimize dependenciesMinimize dependencies

• DynamicallyDynamically Optimize responseOptimize response

ReflectiveReflective• Self-adjust capabilitiesSelf-adjust capabilities

QoSQoS• Reallocate resources/change strategies for Reallocate resources/change strategies for

desired QoSdesired QoS Need integration with lower levels!Need integration with lower levels!


Hardware Abstraction Layer Hardware Abstraction Layer SpecificationSpecification

Processor ADLsProcessor ADLs• Traditionally used for synthesizing compilers Traditionally used for synthesizing compilers

and simulatorsand simulators• Abstractions for micro-architectural resourcesAbstractions for micro-architectural resources

StructureStructure BehaviorBehavior

• E.g., EXPRESSIONE.g., EXPRESSION

Need System-Level Extensions!Need System-Level Extensions!• Interfaces with OS and middlewareInterfaces with OS and middleware

EXPRESSIONBehavior Specification Structure

SpecificationOperation Specification

Instruction Description

Operation Mappings

Arch. Components

Pipelining, Data Routing

Memory Subsystem


Resource and Architecture DescriptionResource and Architecture Description Extend Processor ADL to complex systemsExtend Processor ADL to complex systems

• Heterogeneous hardware/abstractionHeterogeneous hardware/abstraction• Communication StructureCommunication Structure• System Constraints/RequirementsSystem Constraints/Requirements

power, reliability,..power, reliability,.. deadlines, periodicity,…deadlines, periodicity,…

• Constructs for system compositionConstructs for system composition• Couple with middleware abstractionCouple with middleware abstraction

Use Extended ADLUse Extended ADL• Generate service specifications Generate service specifications • Check feasibility of meeting constraintsCheck feasibility of meeting constraints• Code mapping, given constraints/tradeoffsCode mapping, given constraints/tradeoffs


Interactions Between LevelsInteractions Between Levels

OS/hardware -> MiddlewareOS/hardware -> Middleware• Computing powerComputing power• Available memoryAvailable memory• Specialized functional units (coprocessors)Specialized functional units (coprocessors)• Power budget (efficient discharge profile)Power budget (efficient discharge profile)

Middleware -> OS/hardwareMiddleware -> OS/hardware• Part of the global view made available to OSPart of the global view made available to OS• Better profiling (time, power)Better profiling (time, power)• Future schedule changesFuture schedule changes• Relative task importanceRelative task importance

=> Hardware can then make better decisions=> Hardware can then make better decisions

=> Middleware can then make better decisions=> Middleware can then make better decisions


Case Study 1: ATRCase Study 1: ATR

ATR: Automatic Target RecognitionATR: Automatic Target Recognition• 4 main tasks per frame4 main tasks per frame

Mainly independentMainly independent• Can be parallelizedCan be parallelized• Pipelined versionPipelined version

• Distributed worldDistributed world Hundreds of nodes (drones)Hundreds of nodes (drones) Geographically distributedGeographically distributed Heterogeneous networkHeterogeneous network Various capabilitiesVarious capabilities

• WirelessWireless• Sensors (IR, visible)Sensors (IR, visible)• Motion capableMotion capable

• Complex decisions at runtimeComplex decisions at runtime

Target Detection

FFT

Filter/IFFT

Compute Distance

Application pipelineApplication pipeline


ATR System SpecificationATR System Specification

ApplicationApplication• Task decompositionTask decomposition

Main tasks: TARG, FFT, IFFT, DISTMain tasks: TARG, FFT, IFFT, DIST

• System level constraintsSystem level constraints Task characterization (requirements) Task characterization (requirements)

Resource descriptionResource description• NodesNodes

Capabilities (processing power, memory)Capabilities (processing power, memory) Timing and power profiles (per each task)Timing and power profiles (per each task)

• Network layoutNetwork layout


ATR Specification ExampleATR Specification Example

(Application ATR (Contains TARG FFT IFFT DIST) (Paths (TARG FFT) (FFT IFFT) (IFFT DIST) ) (Deadline 16ms) ... (Task TARG (FloatingPoint NO) (Scalable YES) (Memory 1Mb) ... ) (Task FFT (FloatingPoint YES) (Scalable YES) (Memory 1Mb) ... ) ...)

(Node MOBILE1 (Processor 400MIPS) (Memory 32Mb) (DPMCapable NO) (DVSCapable YES) (DVSModes (m0 600Mhz 2.2V) (m1 500Mhz 1.8V) (m2 400Mhz 1.5V) (m3 300Mhz 1.1V) ) (PowerSource (Battery 50Wh) (SolarCell 5Wh (Period 24h) (Duration 9h) ) ) (TaskProfile (Task TARG (m0 0.66ms 7W) (m1 0.79ms 4W) (m2 0.99ms 2W) (m3 1.32ms 0.9W) ) (Task FFT (m0 0.29ms 6W) (m1 0.34ms 3.5W) (m2 0.43ms 1.8W) (m4 0.57ms 0.75W) ) ... ) (Sensors (Video (Spectra Visible) ) ) ...)

(Node MAIN1 (Processor 800MIPS 800MIPS) (Memory 1000Mb) (DPMCapable NO) (DVSCapable NO) (PowerSource (Line NOLIMIT) ) (TaskProfile ... ))

SpecificationSpecification(applicationand node

description)


ATR Decision TradeoffsATR Decision Tradeoffs

Reflective middleware: global viewReflective middleware: global view• Decides on migrating components to free Decides on migrating components to free

resources on constrained nodesresources on constrained nodes Reshape network topologyReshape network topology Requires info from architecture (OS) levelRequires info from architecture (OS) level

• Receives periodic status updates from lower Receives periodic status updates from lower levellevel

OS/Hardware level: local viewOS/Hardware level: local view• Handles operating modes, DVSHandles operating modes, DVS• Interacts with higher levels for control Interacts with higher levels for control

decisionsdecisions


ATR ScenariosATR Scenarios

Component migration between nodesComponent migration between nodes• Middleware decision (decrease load)Middleware decision (decrease load)

Information about hardware helpsInformation about hardware helps• E.g. Integer/FP tasks vs node FP capabilitiesE.g. Integer/FP tasks vs node FP capabilities

Network activationNetwork activation• Target identified by a nodeTarget identified by a node• Middleware wakes up nodes in the regionMiddleware wakes up nodes in the region

Sends commands to OS/hardware level (global info)Sends commands to OS/hardware level (global info)

• OS/hardware decides on new power stateOS/hardware decides on new power state Low OoS - power saving, high QoS – full powerLow OoS - power saving, high QoS – full power Dependent on target proximityDependent on target proximity


Case Study 2:Case Study 2: Quality Driven Video Streaming Quality Driven Video Streaming

MPEG4 streams to mobile handhelds (iPAQs)MPEG4 streams to mobile handhelds (iPAQs) Problem: high energy requirementsProblem: high energy requirements

• Short lifetime, user experience greatly affectedShort lifetime, user experience greatly affected Video stream cannot be viewed to completionVideo stream cannot be viewed to completion Partly affected by interference w/ other usersPartly affected by interference w/ other users

Goal: tradeoff quality vs power for the best Goal: tradeoff quality vs power for the best user experienceuser experience• Maximize QoS while ensuring full serviceMaximize QoS while ensuring full service• Main objective is not power minimization!Main objective is not power minimization!

Problem: Human perception of video qualityProblem: Human perception of video quality Subjective, different perception on small devicesSubjective, different perception on small devices


Middleware/Hardware IntegrationMiddleware/Hardware Integration Aggregate techniques at different levels, for Aggregate techniques at different levels, for

cumulative joint power gainscumulative joint power gains

Middleware: coarse grainMiddleware: coarse grain• Controls quality of multimedia content and network Controls quality of multimedia content and network

transmissiontransmission Proxy-based admission control + video transcodingProxy-based admission control + video transcoding Intelligent network streamingIntelligent network streaming

Hardware/OS: fine tuningHardware/OS: fine tuning• Architectural adaptationArchitectural adaptation

Low-level performance knobsLow-level performance knobs• Optimized cache configurationOptimized cache configuration• Dynamic voltage scalingDynamic voltage scaling

Compiler techniques at deviceCompiler techniques at device

Integration: feedback based QoS controlIntegration: feedback based QoS control


Experimental Results: CPU + MemoryExperimental Results: CPU + Memory

Setup:Setup:• Wattch/SimplescalarWattch/Simplescalar• Berkeley MPEG toolsBerkeley MPEG tools• 8 video qualities8 video qualities• Video contentVideo content

Slow “news” to fast Slow “news” to fast “action” type content“action” type content

• 30 point cache search space30 point cache search space Size: 4-64Size: 4-64 Associativity: 1-32Associativity: 1-32

Cache ResultsCache Results• 10-15% energy savings10-15% energy savings

Cache + DVSCache + DVS• Up to 60% savingsUp to 60% savings

Quality Best Best Initial Best Savings(News) Size Assoc MHz Voltage Energy EnergyQ1 8 8 100 1 1.30 0.77 47.54%Q2 8 8 100 1 1.10 0.65 47.83%Q3 8 8 100 1 0.96 0.57 48.07%Q4 32 2 66 0.9 0.55 0.26 57.67%Q5 32 2 66 0.9 0.49 0.23 57.85%Q6 32 2 33 0.9 0.43 0.21 58.07%Q7 8 8 33 0.9 0.29 0.14 57.30%Q8 8 8 33 0.9 0.24 0.12 57.58%

Cache

Search Space for Cache Optimization

Cache/DVS Best Operating Points + Savings


Experimental Results: Experimental Results: Network Card & SystemNetwork Card & System

Network card:Network card:• Burst transmissionBurst transmission• ““Sleep” between Sleep” between

transmissionstransmissions• Other users in the network Other users in the network

modeled as noisemodeled as noise• Savings: 70%Savings: 70%

Integrated frameworkIntegrated framework• Utility factor improvement Utility factor improvement

by a few quality levelsby a few quality levels ConclusionConclusion: improved : improved

user experience from user experience from integrated approachintegrated approach

Optimizing Burst Time

Integrated QoS Based Simulation


SummarySummary FORGE:FORGE:

• Brings together advances inBrings together advances in Architecture/Hardware abstraction modelingArchitecture/Hardware abstraction modeling Software architectureSoftware architecture Distributed / real-time systemsDistributed / real-time systems

• Provides capabilities for DRE developmentProvides capabilities for DRE development Conceptualization of design knowledgeConceptualization of design knowledge Exploitation of design knowledge across development Exploitation of design knowledge across development

phases for DRE systemsphases for DRE systems

• Cross-optimization across disjoint abstractionsCross-optimization across disjoint abstractions Current focus on Hardware and Middleware AbstractionsCurrent focus on Hardware and Middleware Abstractions Particularly critical for meeting power and QoS in DRE Particularly critical for meeting power and QoS in DRE

applications using mobile devicesapplications using mobile devices

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