הנכות / הרמוח תוכרעמ ףס תפש תונכתו · 2020. 7. 24. · Hardware/Software...

1Dr. Martin Land — Hadassah College — Fall 2014OverviewHardware/Software Systems and Assembly Programming

תוכנ ה / מע רכות חומר ה ותכנו ת שפ ת סף

Hardware/Software Systems and Assembly Programming

ה " תשע—' סמסטר ב


חומרה בתוכנית הלימודים בהדסה מ ער כות ספרתיות•

שיטות פורמליות ואבני היסוד של חומרה•

תוכנה ו תכנות שפת ס ף / מערכות חומ רה • מ אורגן ופועלPCכיצד מ חש ב •

מ ער כות הפע לה•שירותי תיווך בין חומרת המחשב והמשתמש•

אר כי ט ק טו רות של מחשב י ם•ביצועים במחשבים ושיטות מודרניות בתכנון מחשבים•

תקשורת•חיבור בין מחשבים בתוכנה ובחומרה •


?כיצד לימוד ארכ יטק טור ה עוזר ל מתכנ ת :ת/הבנת פעולות החומרה ב ע יבוד תוכנה עוז רת למתכנת

לכתוב תוכניות מהירות וקוד יעיל יותר1.

להבין את ה פעולות של מ ערכות הפעלה 2.

להבין את ה פעולות וה שיקולים של ה מ ה דרי ם 3.

כמו ( וקוד שמיו עד למע רכות משובצות hardware driversלכתוב 4.

)מש ח קים למכשירים ה ניידי ם

ולכתוב קוד שמשתלב ע ם high-tech -למ צו א מקום טוב בתחו ם ה 5.

חו מ ר ה


דוגמא למס ק נ ה למתכנ ת מארכיט ק טור ה C code for calculating 10!

Compiled code runs in 250 nanoseconds on 4 GHz Pentium 4Efficient assembly language program runs 30% fasterSpeed-up important to userUnderstanding why important to programmer

main(){ int i,j = 10; i = factorial(j); } int factorial(n) int n; { if (n == 0) return 1; else return n * factorial(n-1); }


Basic Computer

Organization


Western Computing Before 1940Mechanical device for performing arithmetic

Mechanical Adding MachineAdd, Subtract, Multiply, Divide for business recordsBased on work by Charles Babbage (1821)

Slide RuleMultiply, Divide, Logarithm, TrigonometryBased on work by Napier, Gunter, Oughtred (1614)


Slide Rule ArithmeticMultiply / Divide

Logarithmic scales C and D

Examples: 2 × 15 = 302 × 2 = 4

( ) ( ) ( )log log logxy x y= +

distance = log (2)distance = log (3)


Features of Slide Rule Calculating

Analog computation

Based on lengths of scales

User is operating system

Keeps track of data

Performs each operation

Keeps track of steps

Reads off result

http://arch.ced.berkeley.edu/kap/1998_images/Background/slide%20rule.JPG


End of Slide Rule Calculating Before 1975

Slide rule was standard calculating instrument for scientists

In 1970US astronaut flying to moon finished complex calculation by slide

rule faster than NASA mainframe in Houston

In mid-1970sMicroprocessor-based calculators and personal computers introduced

In 1980Slide rules no longer manufactured


Von Neumann's "Computing Instrument"John von Neumann and others specified (1947) features for an

electronic digital computer:

Digital computation in Arithmetic/Logic Unit (ALU)

Internal storage of data

Programmable via standard set of instructions

Internal storage of program

Input/Output

Automatic sequencing of instruction execution

ArithmeticLogicUnit

(ALU)

input memory output

control

data/instruction path

control path


Von Neumann Example — 1

Programming:

a = 3b = 5c = a + bprint c

ArithmeticLogicUnit

(ALU)

input memory output

control


control path

print c; c = a + b; b = 5; a = 3programming



Automatic Execution:

ALU ← 3ALU ← 5ADDMemory ← 8

ArithmeticLogicUnit

(ALU)

input memory output

control

5

3

8


control path



Output:

Output ← c = 8 ArithmeticLogicUnit

(ALU)

input memory output

control

8


control path


Memory Hierarchy

Bank Wallet Pocket Hand

HardDisk

Main Memory(RAM) Cache Register

All Filesand Data

Running Programsand Data

Next FewInstructionsand Data

CurrentData


Organizing the Pieces — 1

mainmemory

memorycontrol

Main Memory Unit

cachememory

cachecontrol

Cache Memory Unit

ArithmeticLogicUnit

(ALU)

registermemory

processorcontrol

CPU

input

output

I/Ocontrol

I/O System

long-termstorage

network

memory

Processor package


Organizing the Pieces — 2Physical components of von Neumann machine organized into 3

groups:

Microprocessor – Central Processing Unit (CPU) Arithmetic/Logic Unit (ALU)Registers – Small and fast memory elementsControl Unit – Instruction decoding/execution Internal cache (optional)

Main Memory Unit (MMU)Stores data and programLarge Random Access Memory (RAM)External cache (optional)

Input/Output System (IOS)Controls peripheral equipmentInterface with the userInterface with long-term data storage


Basic Types of Digital SystemsCombinational Logic Gates

Output = Boolean function of InputsAND, OR, NOT, XOR, coders, decoders

Sequential Logic GatesOutput = Boolean function of Inputs and previous OutputsRegisters, Flip-Flops, Shift Registers, Counters, State Machines

Bill GatesControls all other digital systems


Physical Components of a Digital ComputerArithmetic/Logic Unit (ALU)

Add, Subtract, Multiply, Divide, AND, OR, XOR, Shift, Compare Combinations of aboveBuilt from combinational and sequential logic

MemoryMain Memory

Random Access Memory (RAM)Internal RegistersRead Only Memory (ROM)

Built from sequential logic devices

Input/Output and ControlBuilt from

Combinational logic (coders and decoders) Sequential logic (state machines)


ALU Example: Full Adder

01110

10001

01101

01011

11111

0

0

0

cout

0

0

0

cin

1

1

0

s

01

10

00

ba

out in in

in

c a b a c b cs a b c

= + +

= ⊕ ⊕

Full Adder

a b cin

cout s


Memory Example: Latching Register

Level-Sensitive LatchWhen Level = 1, Q = D (a change in D causes a change in Q)When Level = 0, Q = stored value (changes in D do not effect Q)

Edge-Sensitive LatchWhen CLK makes 0-to-1 transition, latch stores DQ = stored value (changes in D do not effect Q until next CLK

transition)Registers and Random Access Memory (RAM) built from latches

D

Level

QD

CLK

Q

Level-Sensitive Latch Edge-Sensitive Latch


General Registers

Register holds n-bit number

Read state — read n bits on Qi

Write state — write n bits on Di

...RegisterSelect

...D0D1

Dn - 1

Q0Q1

Qn - 1

S0S1

Sr - 1

Register 0

Register 1

Register 2

Register 3

Register 4

Register

...

DecodeLogic

...read/write

r −2 1

R = 2r

Independentregistersr select lines

choose register


Data Reference — Finding Stored Data

Long term storage

Complex organization depends on hardware design

Usually requires OPERATING SYSTEM support

Main memory (RAM)

Random access based on a PHYSICAL ADDRESS

Every byte is stored at an address

Cache

Same as main memory

Registers

Random access based on REGISTER NAMES in CPU

Information stored in a named register

Data stored is width of standard integer


Physical Memory OrganizationPhysical memory (main memory — RAM)

Real device (circuit) to store data

Stores one byte at each physical address

Physical Address = AN-1 AN-2 … A1 A0

N-bit address space

2N addresses from 0 to (2N-1)

Flat address CPU

Programs use physical addresses

Logical address CPU

Programs use some other address format

CPU converts logical address to physical address before RAM access

Data Byte 11111…111 Data Byte 11111…110 Data Byte 11111…101 Data Byte 11111…100

… … Data Byte 00000…111 Data Byte 00000…110 Data Byte 00000…101 Data Byte 00000…100 Data Byte 00000…011 Data Byte 00000…010 Data Byte 00000…001 Data Byte 00000…000

Memory Location Address


Segmented Memory Addressing — 1

PhysicalBase

Address

Offset(Relative Address)

Segment

AddressedByte

PhysicalAddress

RAMRelative addressing


Segmented Memory Addressing — 2Segment

Block of data bytes in memory

Physical base address — physical address of first byte in segment

Offset

Relative address

Location of byte relative to start of segment

Physical address = Physical base address + Offset

Programs use logical address for memory reference

Logical address written as SEGMENT:OFFSET

SEGMENT and OFFSET stored in separate registers

CPU converts logical address to physical address for RAM access


Register NamingRegisters are part of CPU design

Features determined by CPU designers

General Purpose (GP) registersHold data for instructionsWidth of data is width of standard integerUsually similar to one anotherReferenced by names or numbers

Standard names: R0, R1, … , R15Intel names: EAX, EBX, ECX, EDX,

ESI, EDI, EBP, ESP, EIP

Special Purpose registersMachine status registersOperating system registers


Example — 8086 Microprocessor

AddressBus

Controller

Decoderand

ControlALU

Main Memory

System Bus

DataBus

Controller

PhysicalAddress

DataControl

PhysicalAddress

Unit

GeneralRegisters

AddressRegisters

CPU

Logical Address

Physical Address


Simplified PC Organization — 1

זיכרון ר א שי

Main Memory(RAM)

א פיק מת אם Bus Adapter

א פי ק זיכ ר וןMemory Bus

פ לט / א פי ק קלט I/O Bus

פ לט / בקר קלט I/O Controller



Disk ממשק משתמש

רשת תקש ורת communications

network

זיכרון מט מוןcache memory

ליבת עיבוד ואוגרים

Processor Coreand

Registers

) ליבות-דו ( י חידת החי שוב המר כזי Dual Core Central Processing Unit (CPU)


Processor Coreand

Registers

Front Side Bus


Computer Organization — 2Central Processing Unit (CPU)

Microprocessor core(s)

Includes ALU, internal registers, control

Cache MemoryA copy of a small part of Main Memory

Allows fast access to important memory data

Main MemoryRandom Access Memory

Stores data and program

Bus AdapterConnects CPU to Memory Bus and I/O Bus

I/O ControllerConverts I/O bus data to peripheral device instructions


Program Load

Load operation

Copy program


Main Memory(RAM)









network



Processor Coreand

Registers



Processor Coreand

Registers

Front Side Bus


Instruction FetchSend instruction address

Copy instruction


Main Memory(RAM)









network



Processor Coreand

Registers



Processor Coreand

Registers

Front Side Bus


Load DataSend address of input data

Copy data to register


Main Memory(RAM)









network



Processor Coreand

Registers



Processor Coreand

Registers

Front Side Bus


Store Result

Copy data to RAM

Send address to store output dataזיכרון ר א שי

Main Memory(RAM)









network



Processor Coreand

Registers



Processor Coreand

Registers

Front Side Bus


Display Result

Displayoperation

Data to display


Main Memory(RAM)









network



Processor Coreand

Registers



Processor Coreand

Registers

Front Side Bus


Machine Language Instructions Instruction

Describes one OPERATION and its OPERANDS

Operation Action performed on data

Operand SOURCE — input data for operationDESTINATION — output result of operation

Operand descriptionADDRESSING MODE

Location of data in register, memory, or instructionDATA TYPE

Integer, Long, Floating Point, Decimal, String, Constant, etc.


Instruction Set Architecture General machine instruction is data structure:

Typical machine instruction:ADD destination, source_1, source_2destination ← source_1 + source_2

Language is range of data structure INSTRUCTION for:

Operation ∈ {legal actions}

Operand ∈ {legal Addressing Modes}

Operand...OperandOperandOperation


Typical OperationsData transfer

Load (r ← m), store (m ← r), move (r/m ← r/m), convert data types

Arithmetic/Logical (ALU)Integer arithmetic (+ – × ÷ compare shift) and logical (AND, OR, NOR, XOR)

DecimalInteger arithmetic on decimal numbers

Floating point (FPU)Floating point arithmetic (+ – × ÷ sqrt trig exp …)

StringString move, string compare, string search

ControlConditional and unconditional branch, call/return, trap

Operating SystemSystem calls, memory management instructions

MultimediaPixel operations, compression/decompression operations


ImmediateConstant = IMM = numerical value coded into instruction

Register operandsregister name = fast storage location in CPUREGS[register name] = value stored in registerREGS[EBX] = value stored in register EBX = 00001230

Memory operandsaddress = slow storage location in main memory (RAM)MEM[address] = value stored in memory = *(address)MEM[00001234] = value stored at address 00001234 = 45

Effective Address (EA) — pointer arithmeticREGS[EBX] ← &(variable) = 00001230MEM[REGS[EBX]+4] = *(&(variable)+4)

= *(REGS[EBX]+4)= *(1230+4) = *(1234) = 45

Addressing Modes for Operands

00001230

EBX

45

00001234


Variables, Pointers, Memory, RegistersVariable allocation

int a&a = address_a

Allocation assigns pointer to some address in RAMAddress depends on program structure and OS

Assignmenta = 1

[address_a] = *(address_a) ← 1Stores value 1 into RAM at address allocated to variable a


Software Hierarchies

Application Programs

Operating System Programming Layers

Machine Language

High-Level Language Instruction Layers Machine Language


Machine LanguageMachine Language = processor instruction set

Elementary operations for CPUCPU reads instructions as binary codes

Assembly LanguageUser-friendly form of machine languageEach binary code is represented in words

INC EBX ≡ 01000011 ≡ 43 ≡ REGS[EBX] ← REGS[EBX]+1

Instruction Set Architecture (ISA)Considerations for choosing a particular set of instructions"Family" of processors using same instruction set

Pentium, P-II, P-III, P-4, Centrino, Core, i5, i7, Atom


High‐Level LanguagePowerful instructions and syntax

Control blocksFunction callsData structuresObjects

High-level program compiled to machine code1 line of high-level code compiled to many lines of machine codeCompiler efficiency as important as good coding


Program Loaded into MemoryProgram data

ConstantsVariablesTablesStructures

Procedures / functionsControl blocksData access — load / storeCalculation — arithmetic / logic

Machine LanguageInstructions

Compiled from high level program

Assembled from assembly language

program

DataStructured by

relative location

Main Memory


Running Machine Language ProgramProgram list

Instruction 1Instruction 2Instruction 3Instruction 4Instruction 5Instruction 6

…

CPUFetches next instruction in listDecodes fetched instructionExecutes decoded instruction

Instruction 1

Instruction 2

Instruction 3

Instruction 4

Instruction 5

Abyte

A+1byte

A+2byte

A+3byte

A+4byte

A+5byte

A+6byte

A+7byte

A+8byte

A+9byte

A+10byte

A+11byte

Instructions in RAM

Address


Programming LayersMachine Language

CPU can only run machine language codeCPU switches between application code and operating system code

Operating SystemStores, loads, and runs executablesOrganizes hardware resources and permits sharing Organizes user accessOS code

Mostly compiled from high-level codeParts written in machine language

Application ProgramsIndividual task-oriented user programs


Assembler ProgramsProgrammer codes

Labels, mnemonics, operands, and comments

Assembler does all routine workRemoves comments and mnemonicsProvides HEX code translationsHandles line addressesResolves internal references

Output called Object CodeMay contain UNRESOLVED EXTERNAL REFERENCES

Branches to labels in external modules

Linker produces final executable codeResolves external references


Types of General Purpose ComputerGeneral Purpose Computer

Based on von Neumann architectureOperating System and I/O System permit users to write, store and

run Application ProgramsWorkstation

Optimized for single user running input-intensive software for graphical presentation

File ServerOptimized for multiple users running output-intensive networking

softwareMainframe

Optimized for multiple users running input/output-intensive networking software (storage and transaction)

High availability, reliability, scaling, securityMay support multiple OS


Enhancements for High Power Computers

Multiple graphics processorsMemory management processorsCommunications processorsSpecial processors for Java, encryption, error detection

Single graphic processorMemory management on CPU and PCI

Specialized Hardware

High efficiency specialized versions of Unix-inspired OSWindows/LinuxOperating

System

Multiple I/O controllers for multiple simultaneous data flowsHigh speed I/O channels

Single PCI I/O controller integrated with main board

Input/Output System

Fast (expensive) chip technology64-bit RISC multiprocessor system

4 core (Pentium type) 64-bit CISC processor

CPU Architecture

$10,000 Workstation$1000 PC

CISC (Complex Instruction Set Computer) — old style (pre-1990) machine languageRISC (Reduced Instruction Set Computer) — new style (post-1990) machine languagePCI (Peripheral Component Interface) — I/O controller on most PC systems

הנכות / הרמוח תוכרעמ ףס תפש תונכתו · 2020. 7. 24. · Hardware/Software...

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