ICRTEDC Conference Proceeding

Efficient Design of Differential Trans- Conductance Amplifier with Sub-Threshold Biasing Stabilizati

A Hetero-Spacer-Dielectric Double-Gate Junctionless Transistor for Enhanced Analog Performance

Binary Division Algorithms based on Vedic Mathematics: A Review

Performance Analysis of Full Adder Based 2- Bit Comparator using Different Design Modules

Layout Design Implementation of NOR Gate

Area Efficient 4-Bit Full Adder Design using CMOS 90 nm Technology

A Review of Multi Resonant Slotted Micro Strip Patch Antenna (MPA) for IMT, WLAN &

A Review Report on Existing Routing Protocols in Vehicular Ad Hoc Networks (VANETS)

T- Shape Antenna Design for Microwave Band Applications

Blind Audio Source Separation (Bass): An Unsuperwised Approach

A Survey on Low Power VLSI Designs

A Flexible Scheme for Transmission Line Fault Identification Using Image Processing For a Secure

Semi-custom Layout Design and Simulation of CMOS NAND Gate

Design Analysis and Simulation of 25 TAP FIR Raised Cosine Filter

Smart System using Fuzzy, Neural and FPGA for Early Diagnosis of Renal Disease

An Implementation and Comparison of IO Expander on Zed Board and Spartan 3E for Low Cost & Area Effi

OCR optimization for vehicle number plate Identification based on Template matching

Gait Recognition using MDA, LDA, BPNN and SVM

Optimized Layout Design of Priority Encoder using 65nm Technology