Post on 04-Jun-2022
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Meets or Exceeds the Requirements ofANSI Standard EIA/TIA-422-B and ITURecommendation V.11
Designed to Operate up to 20 Mbaud
3-State TTL Compatible
Single 5-V Supply Operation
High Output Impedance in Power-OffCondition
Complementary Output-Enable Inputs
Improved Replacement for the AM26LS31
description
The four differential line drivers are designed for data transmission over twisted-pair or parallel-wiretransmission lines. They meet the requirements of ANSI Standard EIA/TIA-422-B and ITURecommendations V.11 and are compatible with 3-state TTL circuits. Advanced low-power Schottkytechnology provides high speed without the usual power penalties. Standby supply current is typically only26 mA, while typical propagation delay time is less than 10 ns.
High-impedance inputs maintain low input currents, less than 1 µA for a high level and less than 100 µA for alow level. Complementary output-enable inputs (G and G) allow these devices to be enabled at either a highinput level or low input level. The SN75ALS192 is capable of data rates in excess of 20 Mbit/s and is designedto operate with the SN75ALS193 quadruple line receiver.
The SN75ALS192 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE(each driver)
INPUT ENABLES OUTPUTSA G G Y Z
H H X H L
L H X L H
H X L H L
L X L L H
X L H Z Z
H = high level, L = low level, X = irrelevant,Z = high impedance (off)
Copyright 1998, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1A1Y1ZG
2Z2Y2A
GND
VCC4A4Y4ZG3Z3Y3A
D OR N PACKAGE(TOP VIEW)
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol †
3Y10
3Z11
4Y14
4Z13
93A
154A
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1Y2
1Z3
2Y6
2Z5
11A
72A
4G
12≥1
GEN
logic diagram (positive logic)
1
7
12
9
15
2
3
6
5
10
11
14
13
4
1A
2A
3A
4A
G
G1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of inputs and outputs
EQUIVALENT OFEACH DATA (A) INPUT
EQUIVALENT OFEACH ENABLE INPUT
EQUIVALENT OFEACH OUTPUT
Output
VCC
Input
VCC
Input
VCC
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage, VI 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Off-state output voltage 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values except differential output voltage, VOD, are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGETA ≤ 25°C
POWER RATINGDERATING FACTORABOVE TA = 25°C
TA = 70°CPOWER RATING
TA = 125°CPOWER RATING
D 950 mW 7.6 mW/°C 608 mW N/A
N 1150 mW 9.2 mW/°C 736 mW N/A
recommended operating conditionsMIN NOM MAX UNIT
Supply voltage, VCC 4.75 5 5.25 V
High level input voltage, VIH 2 V
Low-level input voltage, VIL 0.8 V
High-level output current, IOH –20 mA
Low-level output current, IOL 20 mA
Operating free-air temperature, TA 0 70 °C
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unlessotherwise noted)
PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT
VIK Input clamp voltage VCC = MIN, II = –18 mA –1.5 V
VOH High-level output voltage VCC = MIN, IOH = –20 mA 2.5 V
VOL Low-level output voltage VCC = MIN, IOL = 20 mA 0.5 V
VO Output voltage VCC = MAX, IO = 0 0 6 V
|VOD1| Differential output voltage VCC = MIN, IO = 0 1.5 6 V
|VOD2| Differential output voltage RL = 100 Ω, See Figure 1 1/2 VOD1 or 2§ V
∆|VOD|Change in magnitude ofdifferential output voltage¶ RL = 100 Ω, See Figure 1 ±0.2 V
VOC Common-mode output voltage# RL = 100 Ω, See Figure 1 ±3 V
∆|VOC|Change in magnitude ofcommon-mode output voltage¶ RL = 100 Ω, See Figure 1 ±0.2 V
IO Output current with power off VCC = 0VO = 6 V 100
µAIO Output current with power off VCC = 0VO = –0.25 V –100
µA
IOZ Off state (high impedance state) output current VCC = MAXVO = 0.5 V –20
µAIOZ Off-state (high-impedance state) output current VCC = MAXVO = 2.5 V 20
µA
II Input current at maximum input voltage VCC = MAX, VI = 7 V 100 µA
IIH High-level input current VCC = MAX, VI = 2.7 V 20 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –200 µA
IOS Short-circuit output current|| VCC = MAX –30 –150 mA
ICC Supply current (all drivers) VCC = MAX, All outputs disabled 26 45 mA
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values are at VCC = 5 V and TA = 25°C.§ The minimum VOD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater.¶ |VOD| and |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level.# In ANSI Standard EIA/TIA-422-B, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage,
VOS.|| Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.
switching characteristics, V CC = 5 V, TA = 25°C (see Figure 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-Ievel output S1 and S2 open, CL = 30 pF 6 13 ns
tPHL Propagation delay time, high-to-low-level output S1 and S2 open, CL = 30 pF 9 14 ns
Output-to-output skew S1 and S2 open, CL = 30 pF 3 6 ns
tPZH Output enable time to high level S1 open and S2 closed 11 15 ns
tPZL Output enable time to low level S1 closed and S2 open 16 20 ns
tPHZ Output disable time from high level S1 open and S2 closed, CL = 10 pF 8 15 ns
tPLZ Output disable time from low level S1 and S2 closed, CL = 10 pF 18 20 ns
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50 Ω
50 ΩVOD2
VOC
Figure 1. Differential and Common-Mode Output Voltages
Input A
Output Y
Output Z
tPLH(see Note A)
tPHL
tPHL
tPLH
PROPAGATION DELAY TIMES AND SKEW
VOH
VOH
VOL
VOL
1.5 V
0 V
3 V1.3 V
Skew Skew
Enable G
Waveform 1(see Note C)
3 V
0 V
VOL
VOH
1.5 V
tPZL
ENABLE AND DISABLE TIMES
See Note BEnable G
1.5 V
tPZH
0.5 V
0.5 V
tPLZS1 ClosedS2 Closed
S1 ClosedS2 Closed
≈ 1.5 V
≈ 1.5 V≈ 0 V
S1 OpenS2 Closed
S1 ClosedS2 Open
Waveform 2(see Note C)
≈ 4.5 V1.5 V
tPHZ
1.5 V
1.3 V
1.5 V1.5 V 1.5 V
VOLTAGE WAVEFORMS
TEST CIRCUIT
VCC
From OutputUnder Test
CL(see Note D)
75 Ω
180 Ω
TestPoint
S1
S2
NOTES: A. When measuring propagation delay times and skew, switches S1 and S2 are open.B. Each enable is tested separately.C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.D. CL includes probe and jig capacitance.E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 15 ns, and tf ≤ 6 ns.
Figure 2. Test Circuit and Voltage Waveforms
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 3
Y OUTPUT VOLTAGEvs
DATA INPUT VOLTAGE
VI – Data Input Voltage – V
3.5
3
2.5
2
0 0.5 1 1.5
4
4.5
5
2 2.5 3
1.5
1
0.5
0
– Y
Out
put V
olta
ge –
VV
O
No LoadOutputs EnabledTA = 25°C
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
Figure 4
Y OUTPUT VOLTAGEvs
DATA INPUT VOLTAGE
VI – Data Input Voltage – V
3.5
3
2.5
2
0 0.5 1 1.5
4
4.5
5
2 2.5 3
1.5
1
0.5
0
VCC = 5 VOutputs EnabledNo Load
TA = 70°C
TA = 25°C
TA = 0°C
TA = –55°C
TA = 125°C
– Y
Out
put V
olta
ge –
VV O
NOTE A: The A input is connected to VCC during the testing of theY outputs and to ground during the testing of the Z outputs.
Figure 5
Y OUTPUT VOLTAGEvs
ENABLE G INPUT VOLTAGE
VI – Enable G Input Voltage – V
VI = 2 VRL = 470 Ω to GNDSee Note ATA = 25°C
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
2.5
2
1.5
00 0.5 1 1.5 2
3
3.5
4
2.5 3
1
0.5
– Y
Out
put V
olta
ge –
VV O
NOTE A: The A input is connected to VCC during the testing of theY outputs and to ground during the testing of the Z outputs.
Figure 6
Y OUTPUT VOLTAGEvs
ENABLE G INPUT VOLTAGE
VI – Enable G Input Voltage – V
3.5
3
2.5
2
0 0.5 1 1.5
4
4.5
5
2 2.5 3
1.5
1
0.5
0
VCC = 5 VVI = 2 VRL = 470 Ω to GNDSee Note A
TA = 125°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = –55°C– Y
Out
put V
olta
ge –
VV
O
† Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 7
NOTE A: The A input is connected to VCC during the testing of theY outputs and to ground during the testing of the Z outputs.
3
2
1
00 0.5 1
4
5
6
1.5 2 2.5 3
Z OUTPUT VOLTAGEvs
ENABLE G INPUT VOLTAGE
VI – Enable G Input Voltage – V
– Y
Out
put V
olta
ge –
VV O
RL = 470 Ω to VCCSee Note ATA = 25°C
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
Figure 8
NOTE B: The A input is connected to GND during the testing of theY outputs and to VCC during the testing of the Z outputs.
3
2
1
00 0.5 1
4
5
6
1.5 2 2.5 3
Z OUTPUT VOLTAGEvs
ENABLE G INPUT VOLTAGE
VI – Enable G Input Voltage – V
VCC = 5 VRL = 470 Ω to VCCSee Note B
TA = 125°C
TA = –55°C
TA = 25°C
TA = 0°C
TA = 70°C
– Y
Out
put V
olta
ge –
VV
O
† Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 9
NOTE A: The A input is connected to VCC during the testing of theY outputs and to ground during the testing of the Z outputs.
HIGH-LEVEL OUTPUT VOLTAGEvs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
– H
igh-
Leve
l Out
put V
olta
ge –
VV
OH
VCC = 5 VIOH = –20 mASee Note A
2.5
1.5
0.5
0– 75 – 50 – 25 0 25 50
3
4
5
75 100 125
1
3.5
2
4.5
Figure 10
– H
igh-
Leve
l Out
put V
olta
ge –
VV O
H
HIGH-LEVEL OUTPUT VOLTAGEvs
OUTPUT CURRENT
IOH – High-Level Output Current – mA
3.5
3
2.5
2
4
4.5
5
1.5
1
0.5
0
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
0 – 20 – 40 – 60 – 80 – 100
See Note ATA = 25°C
NOTE A: The A input is connected to VCC during the testing of theY outputs and to ground during the testing of the Z outputs.
† Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 11
NOTE A: The A input is connected to GND during the testing of theY outputs and to VCC during the testing of the Z outputs.
LOW-LEVEL OUTPUT VOLTAGEvs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
– L
ow-L
evel
Out
put V
olta
ge –
VV
OL
VCC = 5 VIOL= –20 mASee Note A
– 75 – 50 – 25 0 25 50 75 100 125
0.35
0.3
0.25
0.2
0.4
0.45
0.5
0.15
0.1
0.05
0
Figure 12
NOTE A: The A input is connected to GND during the testing of theY outputs and to VCC during the testing of the Z outputs.
– Lo
w-L
evel
Out
put V
olta
ge –
VV
OL
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT
IOL – Low-Level Output Current – mA
0.7
0.6
0.5
0.4
0.8
0.9
1
0.3
0.2
0.1
0
See Note ATA = 25°C
0 20 40 60 80 10010 30 50 70 90
VCC = 4.5 V
VCC = 5 V
VCC = 5.5 V
Figure 13
40
20
10
00 1 2 3 4 5
60
70
80
6 7 8
50
30
Inputs Grounded
Outputs EnabledNo LoadTA = 25°C
Inputs Open
SUPPLY CURRENTvs
SUPPLY VOLTAGE
VCC – Supply Voltage– V
– S
uppl
y C
urre
nt –
mA
I CC
Figure 14
20
10
5
00 1 2 3 4 5
30
35
40
6 7 8
25
15
A Inputs Open or GroundedOutputs DisabledNo LoadTA = 25°C
SUPPLY CURRENTvs
SUPPLY VOLTAGE
VCC – Supply Voltage – V
– S
uppl
y C
urre
nt –
mA
I CC
† Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
SN75ALS192QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS007D – JULY 1985 – REVISED APRIL 1998
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
10 k 100 k 1 M 10 M 100 M
VCC = 5 VInput = 0 to 3 VDuty Cycle = 50%CL = 30 pF to All Outputs
SUPPLY CURRENTvs
FREQUENCY
f – Frequency– Hz
– S
uppl
y C
urre
nt –
mA
I CC
0
30
40
50
10
20
60
Figure 15
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead finish/Ball material
(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
SN75ALS192D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS192
SN75ALS192DE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS192
SN75ALS192DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS192
SN75ALS192DRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS192
SN75ALS192N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN75ALS192N
SN75ALS192NE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN75ALS192N
SN75ALS192NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS192
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to twolines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
SN75ALS192DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
SN75ALS192NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75ALS192DR SOIC D 16 2500 340.5 336.1 32.0
SN75ALS192NSR SO NS 16 2000 853.0 449.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 2
TUBE
*All dimensions are nominal
Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
SN75ALS192D D SOIC 16 40 507 8 3940 4.32
SN75ALS192DE4 D SOIC 16 40 507 8 3940 4.32
SN75ALS192N N PDIP 16 25 506 13.97 11230 4.32
SN75ALS192NE4 N PDIP 16 25 506 13.97 11230 4.32
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 3
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PACKAGE OUTLINE
C
8.27.4 TYP
14X 1.27
16X 0.510.35
2X8.89
0.15 TYP
0 - 10
0.30.1
2.00 MAX
(1.25)
0.25GAGE PLANE
1.050.55
A
10.410.0
NOTE 3
B 5.45.2
NOTE 4
4220735/A 12/2021
SOP - 2.00 mm max heightNS0016ASOP
NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.
1 16
0.25 C A B
98
PIN 1 IDAREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL ATYPICAL
SCALE 1.500
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EXAMPLE BOARD LAYOUT
0.07 MAXALL AROUND
0.07 MINALL AROUND
14X (1.27)
(R0.05) TYP
(7)
16X (1.85)
16X (0.6)
4220735/A 12/2021
SOP - 2.00 mm max heightNS0016ASOP
NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASKOPENING
NON SOLDER MASKDEFINED
SOLDER MASK DETAILS
OPENINGSOLDER MASK METAL
SOLDER MASKDEFINED
LAND PATTERN EXAMPLESCALE:7X
SYMM
1
8 9
16
SEEDETAILS
SYMM
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EXAMPLE STENCIL DESIGN
(7)(R0.05) TYP
16X (1.85)
16X (0.6)
14X (1.27)
4220735/A 12/2021
SOP - 2.00 mm max heightNS0016ASOP
NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLEBASED ON 0.125 mm THICK STENCIL
SCALE:7X
SYMM
SYMM
1
8 9
16
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