Post on 27-May-2020
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Nonplanar Metallization
PlanarMetallization
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
“Caps” and “Plugs”
The plug material can be same as interconnect material (e.g. Cu)or different material (e.g. W)
oxide oxide
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Non-Optimized Planarization example
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Five Level Metallization for Company CW plugs for contacts and viasW for metal 1, Al/Ti metal 2,3, 4; Al metal 3CMP for all dielectrics.
Good Planarization Example
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Benefits for Lithography Processes: • Lower Depth-of-Focus requirement• Reduced optical reflection effects on resist profiles • Reduced resist thickness variation over steps
=>
Benefit for Etching Processes:• Reduced over-etch time required due to steps
Benefit for Deposition Processes:• Improved step coverage for subsequent layer deposition
topview
Surface Planarization
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
β = 1- (final step height/initial step height)
Planarization Factor β
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
• Topography managementmust start at lower layers!
Planarization: A bad example
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
1. Spin-on glass or polyimide
2. Deposit and Etchback
3. Chemical-Mechanical Polishing (CMP)
Planarization Techniques
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Spin-On Glass (SOG)
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
SOG Annealing
• Cure:• 400-500oC -> inorganic backbone polymer
– exact composition depends on SOG type• 800-1100oC -> densified glass (inorganic SOGs)• can be performed in N2, O2 or steam
– steam allows densification to occur at lower – temperatures
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Polymers:
• excellent thermal stability (up to 450oC)
• good dielectric properties (εr=3.3, ρ=1016 Ω-cm)
• superior chemical resistance
Polyimides
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
1. Deposit thick oxide layer (600 - 1000nm)
2. Spin on resist or polymer to planarize surface
3. Etch back with a process that has equal oxide andresist/polymer etch rates(e.g. CF4 + O2 dry etch)
(4. Deposit second oxide layer)
• Simple process, requiring equipment and materialsalready available in the lab
Deposit and Etchback
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Wafer is polished using a slurry containing• silica abrasives (10-90 nm particle size)• etching agents (e.g. dilute HF)
• Backing film provides elasticity between carrier and wafer
• Polishing pad made of polyure-thane, with 1 mm perforations
– rough surface to hold slurry
Chemical Mechanical Polishing (CMP)
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
CMP Configurations
Rotating waferRotating pad
Rotating WaferLinear track pad
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
CMP Process Control
For reference only
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Preston Model:
Local Removal rate R = Kp P v
where P = local applied pressure v = relative pad-wafer velocity
Kp = Preston coefficient [unit in pressure-1]function of film hardness, Young’s modulus,
slurry, pad composition and structure
CMP Rate
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
CMP of Selectivity to Si3N4
SiO2 6:1
poly-Si 280:1
W 75:1
Al 40:1
CMP Selectivity
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Pattern dependenceProblems encountered in CMP
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
• High isolated features polish fast• Increased pressure at corners of features creates rounding
*Note :Y-axis highly magnified !!!
Pattern Dependence of CMP
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
CMP Endpoint Detection - (1) PolisherMotor Current
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
CMP Endpoint Detection - (2) Optical Interference
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
RIE of Cu difficult due to low vapor pressure of by-products=> Cu lines formed by CMP
Cu has to be encapsulatedby a liner (e.g. TiN) to prevent out-diffusion into SiO2 and Si
CMP Application Example
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
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ILD = Inter-Level Dielectric
Single Damascene Process
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Cu
Dual Damascene Cu Metallization with Diffusion Barrier
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05
Dual Damascene Process Sequence
Professor N Cheung, U.C. Berkeley
Lecture 18EE143 F05