PHASE LOCKED LOOP

Prepared by : Lobna Amer

Youmna Hassan

Mariam Mohamed

HISTORY

• In 1919, W. H. Eccles and J. H. Vincent found that two electronic oscillators that had been tuned to oscillate at slightly different frequencies but that were coupled to a resonant circuit would soon oscillate at the same frequency.

• Automatic synchronization of electronic oscillators was described in 1923 by Edward Victor Appleton.

• Research started in 1932 on PLL to find an alternative to already existing receivers (why?)

• The technique was described in 1932, in a paper by Henri de Bellescize, in the French journal L'Onde Électrique

• When Signetics introduced a line of monolithic integrated circuits such as the NE565 that were complete phase-locked loop systems on a chip in 1969, applications for the technique multiplied. A few years later RCA introduced the "CD4046" CMOS Micropower Phase-Locked Loop, which became a popular integrated circuit.

CD4046

Car Race Analogy

GENERAL CONCEPT

=

Fig. 1. Phase difference between two waves

GENERAL CONCEPT

Fig. 2. Basic topology of PLL

GENERAL CONCEPT

• Input signal ( - )• Output signal ( - )• PLL locks the phases of the signals together making

equal to • Condition for locking : | - | < K

NOTE: K is the closed loop gain

of the PLL

ARCHITECTURE

• What do we need to reach?

• What can we use to produce the error signal?

• what can we use to convert the incoming Voltage to a corresponding frequency?

ARCHITECTURE

• What is the gain of the negative feedback system? A/(1+A)

• no matter how high A is, the gain will always seem to not reach a high enough value

• Using integrators: integrating the error signal, if the output of the phase detector is more than zero, signal is infinitely large, thus, output is infintely large

ARCHITECTURE

• Problems regarding using one integrator:

• If the input is a square wave, the output would match the input with no errors seen

• However, if the input signal is a ramp. The output signal will always have a constant error no matter what we do.

• Thus, I can NOT build it with only one integrator

• What about using 2 integrators? the TF contains 2 poles --> Unstable system

ARCHITECTURE

Then we need something to ensure system stability and introduce the error to the VCO in a certain way that ensures a convenient output signal

Solution:

• Use an enhanced phase detector

• Use a low pass filter

PHASE DETECTOR

Analog PD (Multiplier/Mixer)Diode Ring Double Balanced Mixer :• Operation• Inputs:

A1 cos (t –

A2 cos (t – )• Outputs after filtering:

A1 cos ( – ) Fig. 3. Basic diode ring mixer circuit

PHASE DETECTOR

Analog PD (Multiplier/Mixer)Diode Ring Double Balanced Mixer :

• Characteristics: Phase shift = ±90° IF output voltage is zero

Phase shift = 0° IF output voltage is the maximum positive value (A1)

Phase shift = 180° IF output voltage is the maximum negative value (-A1)

• Drawbacks: No memory element

PHASE DETECTORDigital PD

XOR:• Operation

• Drawbacks

Cannot differentiate

between +ve and –ve

phase difference

•

Fig. 4. XOR phase detector inputs and outputs

PHASE DETECTOR

Digital PD

• Required :

Edge Triggered Operation

Differentiates between +ve and –ve phase difference

• State chart

States to represent the phase difference

• Implementation

Number of flip flops to represent number of states

PHASE DETECTOR

Digital PD D – Flip Flops:

• Inputs Outputs

0 1 Up

1 0 Down

0 0 0

1 1 0

• Drawbacks Needs averaging

PHASE DETECTOR

Digital PD D – Flip Flops + Charge Pump

Fig. 5. D- Flip Flops PD Fig. 6. Charge Pump

PHASE DETECTOR

Digital PD D – Flip Flops + Charge Pump:

• Converts flip flop pulses to analog current pulses.

• Current pulses conditioned by Low Pass Filter.

• UP signal causes current to flow to the filter ( )

• DOWN signal causes current to flow from the filter (

• If both UP and Down are High or Low No Current flows does not change

LOW PASS FILTER

LOW PASS FILTER

LOW PASS FILTER

• needed to remove any unwanted high frequency components which might pass out of the phase detector and appear in the VCO tune line.

• High frequency if passed causes sparious signals

• Mixer Example: If a mixer is used as a phase detector, it will produce two signals: the sum and difference frequencies.

• As the two signals entering the phase detector have the same frequency the difference frequency is zero and a DC voltage is produced proportional to the phase difference as expected

• The sum frequency is also produced and this will fall at a point equal to twice the frequency of the reference. If this signal is not attenuated it will reach the control voltage input to the VCO and give rise to spurious signals.

LOW PAS FILTER

• Spurious signals

LOW PASS FILTER

• The filter also affects the ability of the loop to change frequencies quickly.

• If the filter has a very low cut-off frequency then the changes in tune voltage will only take place slowly, and the VCO will not be able to change its frequency as fast. This is because a filter with a low cut-off frequency will only let low frequencies through and these correspond to slow changes in voltage level.

• Conversely a filter with a higher cut-off frequency will enable the changes to happen faster. However when using filters with high cut-off frequencies, care must be taken to ensure that unwanted frequencies are not passed along the tune line with the result that spurious signals are generated.

LOW PASS FILTER

LPF bandwidth:

• Do I need a high bandwidth or a low one?

• What is the optimum value for the bandwidth?

LOW PASS FILTER

• It also governs the stability of the loop by varying the values of R and C

• It helps to ensure that the voltage is reasonably clean DC. Otherwise, you can imagine that an unfiltered control input could cause the PLL to become an oscillator, with the VCO always chasing the signal frequency, but constantly under-and overshooting the stable point.

VOLTAGE CONTROLLED OSCILLATOR

Main Requirements for VCO:

• Phase stability

• large frequency deviation

• high modulation sensitivity

• linearity of frequency versus control voltage

Fulfilling higher phase stability opposes achieving any of the other requirements.

VOLTAGE CONTROLLED OSCILLATOR

Four types of VCO (In order of decreasing stability):

• Voltage Controlled Crystal Oscillators

• Resonator Oscillators

• RC Multi-vibrators

• YIG-tuned Oscillators

PLL APPLICATIONS• FM Demodulation

• Frequency Synthesizer

• Motor speed control

• clock distribution

• clock generation in digital communications.

Frequency Synthesizer

• Frequency-Selective frequency multiple by inserting divider into feedback between VCO output and comparator input.

• A phase detector compares two input signals and produces an error signal which is proportional to their phase difference. The error signal is then low-pass filtered and used to drive a VCO which creates an output phase. The output is fed through a divider back to the input of the system, producing a negative feedback loop.

• If the output phase drifts, the error signal will increase, driving the VCO phase in the opposite direction so as to reduce the error.

• A programmable divider is particularly useful in radio transmitter applications.

FREQUENCY SYNTHESIZER

Demodulation

DEMODULATION

• Demodulation is the act of extracting the original information bearing signal from modulated carrier wave.

• The Indirect Demodulator is Phase Lock Loop

DEMODULATION OF FM SIGNAL1 - filter the signal in order to eliminate all noise outside

of the signal band. Broadcast FM signals are filtered by a band-pass filter prior to transmitting.

2 - Modulated FM signal is to pass it through a limiter. This will restrict the signal amplitude to the range -VL  to +VL . The output is a series of nearly rectangular pulses.

3 - low-pass filter eliminates the higher frequency components from these pulses to obtain a signal which very closely resembles the transmitted FM signal:

PLL APPLICATIONS

• FM Demodulation: PLL FM demodulators are found in many types of radio

equipment's ranging from broadcast receivers to high performance communications equipment.

High frequencies are not normally needed, for PLL FM demodulators, the circuit must be capable of operating at the intermediate frequency of the receiver, and for receivers using FM this was often 10.7 MHz. Although by today's standards, this is not high, it was necessary for the technology to reach this state before PLL FM demodulators became available.

PLL FM DEMODULATION BASICS

PLL FM demodulator works relatively straightforward. It requires no changes to the basic PLL itself, using the basic operation of the loop to provide the required output.

ADVANTAGES

• Linearity:   The linearity of the PLL FM demodulator is ruled by the voltage to frequency characteristic of the VCO within the PLL. As the frequency deviation of the incoming signal normally only swings over a small portion of the PLL bandwidth,

The characteristic of the VCO can be made relatively linear, the distortion levels from phase locked loop demodulators are normally very low. Distortion levels are typically a tenth of a percent.

ADVANTAGES

• Manufacturing costs:   Only a few external components are required, and in some instances it may not be necessary to use an inductor as part of the resonant circuit for the VCO. These facts make the PLL FM demodulator particularly attractive for modern applications.

QUESTIONS

• Q4 How to increase the phase stability of the VCO?

• Using high Q crystal and circuit

• Stabilizing temperature

• Keeping mechanical stability

QUESTIONS

• What is the Condition for locking ?• | - | < K• What do we need to reach?

• Locking input and output phases

• What can we use to produce the error signal?

• Phase detector

• what can we use to convert the incoming Voltage to a corresponding frequency?

• VCO

QUESTIONS

• What are the different types of phase detectors? What structures are used in both?

• Analog and digital

• Analogue diode ring double balanced mixer

• Digital flip flops + charge pump

• What is the function of the charge pump?

• Converts FF pulses into current pulses that are suitable for conditioning by the low pass filter

The output voltage of phase detector isa) Phase voltageb) Free running voltagec) Error voltaged) None of the mentioned

• Answer: cExplanation: The phase detector compares the input frequency with the feedback frequency and produces output dc voltage called as error voltage.

QUESTIONS

• List three distinct applications of PLLs, apart from FM demodulation, and frequency synthesis

Answer: Motor speed control, clock distribution, and clock generation in digital communications.

• What is the function of low pass filter in phase-locked loop?a) Improves low frequency noiseb) Removes high frequency noisec) Tracks the voltage changesd) Changes the input frequency

• Answer: bExplanation: The output voltage of a phase detector is a dc voltage and is often referred to as error voltage. This output is applied to the low pass filter which removes the high frequency noise and produces a dc level.

This is how FM radio communication works: by modulating the frequency of a radio-frequency (RF) signal according to the amplitude of the voltage signal produced by a microphone. Explain how a phase-locked loop circuit could be used to "demodulate" the output of an FM radio station, so as to extract the broadcaster's audio signal from the RF waveform.

QUESTION

• This diagram, simplified system for FM demodulation:

ANSWER:

• An 10nH inductor has a Q of 5 and is used to create a tank circuit with a 10pF capacitor.

Assume the capacitor is ideal.

(a.) What is the resonant frequency of this circuit?

(b.) What value of parallel negative resistance should be used to create an oscillator?

(c.) If C is changed to 20 pF, what is the new value of the parallel negative resistance?

QUESTION

SOLUTION :

Consider the PLL shown where =104 and =1 krads⁄ per V. 𝐾𝑣 𝐾𝑜QUESTION :

a) What is the order of the loop?

Answer: 1st order

b) What is the time constant of the loop? Answer:

𝜏=1/ =100 us𝐾𝑣c) What is the 3-dB bandwidth of the loop in Hz?

Answer:

𝑓3 =1/2 =1.6 kHz 𝑑𝐵 𝜋𝜏

d) Write down an expression for the transfer function ( )= ( )/ ( )𝐻 𝑠 𝜃𝑜 𝑠 𝜃𝑖 𝑠Answer:

e)If the input frequency changes with a step, what is the rise time of the VCO control voltage assuming the loop stays in lock?

Answer:

≈𝑡𝑟 2.2 =220 𝜏 𝜇𝑠

Publish date: April 2015

• Published on IEEE

• Topic: Demonstrating a radio-over-fiber multiple access time delay sensing and frequency dissemination scheme.

LATEST RESEARCH

REFRENCES

• S. C. Gupta, “Phase-locked loops,” Proc. IEEE, vol. 63, pp. 291-306, Feb. 1975.

• C. A. Sharpe, “A 3-state phase detector can improve your next PLL design,” EDN, pp. 55-59, Sept. 1976.

• J. A. Afonso, A. J. Quiterio, and D. S. &ants, “A phase-locked loop with digital frequency compare for timing

signal recovery,” in Con Rec., I979 Nut. Telecommun. Conf., paper 14.4

• Roland E. Best (2007). Phase-Locked Loops: Design, Simulation and Applications (6th ed.). McGraw Hill. ISBN 

978-0-07-149375-8.

• G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev; Kuznetsov; Yuldashev; Yuldashev (2011).

"Computation of Phase Detector Characteristics in Synchronization Systems"

• N. Kamal, Y. Zhu, S. Al-Sarawi, N. Weste, and D. Abbott, "A SiGe 6 modulus prescaler for a 60 GHz frequency synthesizer," in SPIE, vol. 6798, 2007, p. 67980E.