Post on 09-May-2018
ECE 238L © 2006μSEQPage 1
Microprogrammed Control
ECE 238L © 2006μSEQPage 2
Sample Control Unit FSM
F0 F1 F2 D
Add
Ld0 Ld1 Ld2
Jsr0 Jsr1
Ldi0 Ldi1 Ldi2 Ldi3 Ldi4
Ldr0 Ldr1 Ldr2
Not
Sti0 Sti1 Sti2 Sti3 Sti4
ECE 238L © 2006μSEQPage 3
Sample Output Forming Logic
ldPC
F1
Jmp
Jsr1
Jsrr1
TakeBr
enaALU
Add
And
Not
Ld1
Ldr1
Ldi3
One-hot encoding leads to pretty simple OFL!
ECE 238L © 2006μSEQPage 4
The Control Unit
• The LC-3 control lecture discussed a hard-wired approach to controller design– The functionality is fixed after the design
• Microprogrammed controllers allow functionality to be easily changed– Instructions can be added or changed with
only minor changes to the microcode
ECE 238L © 2006μSEQPage 5
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
Microprogrammed Control
Memory (Microstore)
An internal memory called the control store (or Microstore) contains the settings for all of the control signals for all.
Each memory location contains one complete set of control values.
ECE 238L © 2006μSEQPage 6
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
Microprogrammed ControlAn internal memory called the control store (or microstore) contains the settings for all of the control signals for all.
Each memory location contains one complete set of control values.
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1
Microinstructions
ECE 238L © 2006μSEQPage 7
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1
How do you determine which control string to use?
Microprogrammed Control
Address?
ECE 238L © 2006μSEQPage 8
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1
Microprogrammed Control
μCode AddressUse a register to select the address in memory which contains the appropriate control string.
ECE 238L © 2006μSEQPage 9
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1
Fetch 0
Microprogrammed Control
Address = 0
(0)(1)(2)
ECE 238L © 2006μSEQPage 10
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1Fetch 1
Microprogrammed Control
Address = 1
(0)(1)(2)
ECE 238L © 2006μSEQPage 11
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1Fetch 2
Microprogrammed Control
Address = 2
(0)(1)(2)
ECE 238L © 2006μSEQPage 12
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
00 00
00 00
0000
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 0 0 0 0 0 0 1 0 0 0 0 1
+1
Microprogrammed Control
μCode Address
Use incrementer to get sequential control strings.
ECE 238L © 2006μSEQPage 13
Instruction Lookup TableIR[15:12]
Address in the μStore for the current instruction
Decode
Use a lookup table to get to the appropriate control strings after an instruction has been loaded into the Instruction Register.
This occurs in the Decode stage of the instruction.
ECE 238L © 2006μSEQPage 14
Instruction Lookup TableIR[15:12]
Address in the uStore for the current instruction
Decode
+1μCode Address
MUX Decode
Use a MUX to select between the sources for the μCode Address.
ECE 238L © 2006μSEQPage 15
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
1 (F0) 0 00 00
2
3
4
5
00
6
000(F1)
(F2)
(D)
0 00 00 00 0 0 0 0 0 0 0 1 0 0 0 0 1
(Add)
1 - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - -
0 0001
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 1 1 0 0 0 0 0 0 0 0 0 0
Microprogrammed Control
μCode Address
Instruction Execution
Dec
ode
ECE 238L © 2006μSEQPage 16
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
1 (F0) 0 00 00
2
3
4
5
00
6
000(F1)
(F2)
(D)
0 00 00 00 0 0 0 0 0 0 0 1 0 0 0 0 1
(Add)
1 - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - -
0 0001
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
00 0 1 1 0 0 0 0 0 0 0 0 0 0
Microprogrammed Control
μCode Address
Dec
ode
How to return to the fetch cycle?
ECE 238L © 2006μSEQPage 17
ALU
Ctrl
selP
Cse
lEA
B2
selE
AB
1en
aALU
regW
Een
aMA
RM
selM
AR
enaP
Cld
PC
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
1 (F0) 0 0010
2 0011
0100
0101
0110
0001
3
4
5
6 (Add) 0 00 01 00 0 1 1 0 0 0 0 0 0 0 0
00 00
0 0
(F1)
(F2)
(D)
000
0 00 00 00 0 0 0 0 0 0 0 1 0 0 0 0 1
1 - - - - - - - - - - - - - - - -
0 - - - - - - - - - - - - - - - -
00
00 0 0 0 0 0 1 0 0 1 0 0 0 0
00 0 0 0 0 0 0 1 0 0 1 1 0 0
Microprogrammed Control
μCode Address
Use a special field to designate the next address which should be executed!
Dec
ode
Add
ress
ECE 238L © 2006μSEQPage 18
Instruction Lookup TableIR[15:12]
Address in the uStore for the current instruction
Jump to a New μCode Address
μCode Address
MUX Decode
Target Address from uStore
Because of the Target Address field, the incrementer is no longer needed.
ECE 238L © 2006μSEQPage 19
Selecting Operand and DestinationRegister Addresses
ECE 238L © 2006μSEQPage 20
Selecting Operand and DestinationRegister Addresses
IR[8:6]
IR[11:9]
0
1
SourceReg 1Address
SR1
IR[11:9]
‘111’
0
1
DestRegAddress
DR
Two more control signals are required in the μStore: SR1 and DR.These signals select the source for the register addresses.
ECE 238L © 2006μSEQPage 21
Selecting Operand and DestinationRegister Addresses
Addresses go tothe Register File
00: --01: decode10: branch11: JSRcond
ECE 238L © 2006μSEQPage 22
Selecting Load Program CounterSources
ldPC from uStore
Take Branch(n•N)+(z•Z)+(p•P)
0
1
ldPC going to PC register
BranchInstruction
For a Branch instruction, loading of the PC depends upon the N, Z and P register flags and the n, z and p bits in the instruction.
Another control signal is needed to select the source for the load PC control signal.
ECE 238L © 2006μSEQPage 23
(n•N)+(z•Z)+(p•P)
‘Special Code’ bit for branch instruction
Selecting Load Program CounterSources
ECE 238L © 2006μSEQPage 24
Selecting Jump SubroutineMUX control sources
JSR clock1 R7 ← PC enaPC ← 1DR ← 7regWE ← 1
clock2 PC ← EAddr selEAB1← 0selEAB2 ← 11selPC ← 01ldPC← 1
JSRR clock1 R7 ← PC enaPC← 1DR← 7regWE← 1
clock2 PC ← EAddr selEAB1← 1selEAB2 ← 00selPC ← 01ldPC← 1
The two types of JSR instructions use different control signals but share the same opcode.
ECE 238L © 2006μSEQPage 25
Selecting Jump SubroutineMUX control sources
JSR clock1 R7 ← PC enaPC ← 1DR ← 7regWE ← 1
clock2 PC ← EAddr selEAB1← 0selEAB2 ← 11selPC ← 01ldPC← 1
JSRR clock1 R7 ← PC enaPC← 1DR← 7regWE← 1
clock2 PC ← EAddr selEAB1← 1selEAB2 ← 00selPC ← 01ldPC← 1
Use IR[11] to distinguish between the two forms of JSR.
ECE 238L © 2006μSEQPage 26
Selecting Jump SubroutineMUX control sources
JSR clock2 PC ← EAddr selEAB1← 0selEAB2 ← 11
JSRR clock2 PC ← EAddr selEAB1← 1selEAB2 ← 00
Luckily, the control signals which differ are the complements of each other.
Use XOR gatesto perform theselective complementfunction.
Again, we require ‘Special Code’ to specify when a JSR instruction is being executed.
00: --01: decode10: branch11: JSRcond
ECE 238L © 2006μSEQPage 27
Selecting Jump SubroutineMUX control sources
ECE 238L © 2006μSEQPage 28
MicroStore
InstructionLookup Table
uAddress
IR[15:12]
IR[11:9]IR[8:6]
‘111’
IR[2:0]
src2
src1 dr
AL
UC
trl
srel
PC
selE
AB
1se
lEA
B2
enaA
LU
regW
Een
aMM
selM
AR
enaP
C
ldIR
ldM
AR
ldM
DR
selM
DR
mem
WE
enaM
DR
ldPC
TakeBranch
IR[11]
00: --01: decode10: branch11: JSRcond
ECE 238L © 2006μSEQPage 29
MicroStore
ECE 238L © 2006μSEQPage 30
Op-code InstructionNext Address
(decimal)Next Address
(binary)
0000 BR 7 00111
0001 ADD 5
11
20
9
6
17
26
----
19
14
23
8
----
18
----
00101
0010 LD 01011
0011 ST 10100
0100 JSR 01001
0101 AND 00110
0110 LDR 10001
0111 STR 11010
1000 RTI ---
1001 NOT 10011
1010 LDI 01110
1011 STI 10111
1100 JMP 01000
1101 ---- ----
1110 LEA 10010
1111 TRAP ----
Instruction Lookup Table