mems poster

Post on 07-Aug-2015

29 views 1 download

Tags:

Transcript of mems poster

APPLICATION OF STATISTICAL ELEMENT SELECTION TO 3D INTEGRATED ALN MEMS FILTERS FOR PERFORMANCE CORRECTION AND YIELD ENHANCEMENT

Albert Patterson1, Enes Calayir1, Gary K. Fedder1, Gianluca Piazza1, Bo Woon Soon2, and Navab Singh2

1Carnegie Mellon University, USA2Institute of Microelectronics, Agency for Science,

Technology and Research (A*STAR), Singapore

The 28th IEEE International Conference on Micro Electro Mechanical Systems (MEMS 2015), January 18-22, 2015, Estoril, Portugal

Fingerpitch,

W

Fingerlength,

L

AlNthickness,

T

# of fingerson input,

nin

# of fingerson output,

nout

4 µm 65 µm 1 µm 27 28

f0 C0 Z0 Rm Cm Lm

1.25 GHz 1.1 pF 240 Ω 30 Ω 4.4 fF 3.7 µH

100 µm

N=12, k=4Sub-filter design parameters

Fabrication Process for Encapsulation and 3D Integration of AlN MEMS Sub-Filters with CMOS

Statistical Element Selection for the Synthesis of Narrow-Band Channel-Select Filters

Experimental Demonstration of Statistical Element Selection

Responses of self-healing filter vs. standalone filterAll response performances available

from the self-healing filter

• Direct channel selection enables efficient RF spectrum utilization and significantly reduces power consumption

• Implementation is hindered by fabrication-induced variations (yields < 36 %)

• SES is applied to correct performance and enhance yield by fabricating an array of N devices and selecting a subset k out of N that combine to meet performance specifications

IME process flow for MEMS sub-filters with thin film encapsulation fabrication on 8” high resistivity SOI wafers:a) Isolation trench definition and refill with oxide.b) 150 nm Mo bottom electrode definition.c) Bottom electrode planarization and 1 µm AlN deposition. d) Patterning of vias to bottom electrode and definition of

150 nm Mo top electrode.e) AlN etching with oxide mask and deposition of a 4 µm

amorphous Si sacrificial layer to define cap height.f) 1 µm AlN capping layer deposition and patterning

followed by dry etch of sacrificial material.g) 3 µm PECVD SiO2 sealing layer deposition.h) Deposition and patterning of 100 nm Ti and 0.5 µm Au

under bump metallization.

CMOS chip was fabricated in IBM’s 65 nm process, and solder balls were fabricated by TLMI. Flip chip bonding was then performed at IME

MEMS Contour-mode resonator filters were fabricated at IME and featured thin film encapsulation to hermetically seal the filters and protect the devices during flip chip bonding.

Flip chip bonding completed the fabrication of the 3D-integrated self-healing filter, and probing of the self-healing filter was performed on the CMOS chip, using a custom mixed-signal probe purchased from Cascade Microtech.

The self-healing filter offers 495 unique frequency responses, with on average:• 1.14 GHz center frequency• 7 dB Insertion loss• 16 dB out of band rejection

A characteristic standalone filter offers on average• 1.14 GHz center frequency• 4.4 dB Insertion loss• 24 dB out of band rejection

Performance of the self-healing filter was substantially degraded by routing parasitics on the CMOS chip despite inclusion of a 4.2 nH shunt inductor for partial parasitic capacitance cancellation.

The many slightly varying frequency responses offered by the self-healing filter allows for fine tuning of the center frequency and bandwidth• 500 kHz tuning range for

both center frequency and bandwidth

• Many responses meet the desired specifications to achieve high device yield

In future implementations, improved performance may be achieved by routing on a low loss RF substrate such as the MEMS chip

-200 0 200

2.75

3

3.25

f0 (kHz)

Ban

dwid

th (

MH

z)

Fails IL and/or OBR SpecFails f

0 and/or BW Spec only

Passes all Specs

-200 0 200

2.75

3

3.25

f0 (kHz)

Ban

dwid

th (

MH

z)

Fails IL and/or OBR SpecFails f

0 and/or BW Spec only

Passes all Specs

-200 0 200

2.75

3

3.25

f0 (kHz)

Ban

dwid

th (

MH

z)

Fails IL and/or OBR SpecFails f

0 and/or BW Spec only

Passes all Specs

-200 0 200

2.75

3

3.25

f0 (kHz)

Ban

dwid

th (

MH

z)

Fails IL and/or OBR SpecFails f

0 and/or BW Spec only

Passes all Specs Specifications|Δf0| IL BW OBR

100 kHz 8 dB [2.75 3.25] MHz 15 dB

f0 IL BW OBR

Pooled Mean 1.15 GHz 4.44 dB 3.83 MHz 24.81 dBPooled STD 0.46 % 14.72 % 5.91 % 7.68 %

Intra-die STD 0.02 % 14.06 % 1.54 % 2.14 %Standalone filter performance statistics

Self–healing filter conceptual circuit

Resonator equivalent circuit model

Rm Lm Cm

C0,outC0,in

C0=C0,in+C0,out

Performance correction with SES

Spec

Sub-filter element, prior to encapsulation

Encapsulated resonator cross section

5 µm

Cap AlN Anchor

Device AlNCavity

Mo

1 mm

MEMS

CMOS

3D-Integrated self-healing filter

vout

Switch Controller

fn

Frequency Multiplier

Low Noise MEMS Reference

ω

ω

vout

Switch Controller

fn

Frequency Multiplier

Low Noise MEMS Reference

ωω

ω

Narrow Band Filter Bank

Narrow Band Filter Bank