Post on 02-Mar-2022
High-Speed Electrical I/O Links
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Desktop
CPU
DIMM
Bandwidth Drivers:
CPU Memory
CPU CPU
CPU Peripheral
CPU I/O bridge
I/O Power-Bandwidth Challenges
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~20% per year power reduction while bandwidth increasing ~2x every 3 years
CMOS Scaling not helping I/O Design
Traditional Interconnects not scaling
Opportunities: Non-Traditional Interconnects
Low-loss, low-profile connector on Top-of-package for low-loss interconnects
Improved area density
Package connector
Flex
5HDI
Opportunities: Power Optimized Link Co-design
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Modest data rates, High IO density
Simple equalization techniques
Low transmitter swing, sensitive receiver sampler
Low-power clocking techniques
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Implementation: A 32Gb/s Scalable Link Architecture [ISSCC 2014]
Bundle clocking to amortize clocking power Dual mode receiver Cooperative clock-data Recovery
ISSCC’14
Silicon-Photonics Link
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CPU w/ electrical TX
CPU w/ electrical RX
Modulator
Jumpers
Connectors
Modulator Driver
Transimpedance Amp /Limiting Amp (TIA/LA)
Photodetector(PD)
Package/module
Optical cable
Low loss Mux-friendly Thin & Light
Silicon-Photonics Links: Opportunities & Challenges
Leverage the skills and knowledge of volume Si manufacturing to reduce costs in optical links
High levels of integration
Optical channel loss is frequency independent but the aggregate loss is 100x-1000x!
Worst-case received signal can be as low as ~50uA requires extremely sensitive receiver ( power)
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Silicon-Photonics Links: Research work in progress
Improve the power efficiency of WDM
Links
Reduce tolerance to variations
[Ongoing Collaboration with Prof. Lukas Chrostowski & Shahriar Mirabbasi @ UBC]
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Typical Wireless Radio Limitation
Bidirectional systems separate the uplink & downlink channels into orthogonal signaling
dimensions (time/frequency).
M. Jain et al, “Practical, Real-time, Full Duplex Wireless”, Mobicom 2011.
Full-Duplex Radio Challenge
Very strong self-interference ~70dB for 802.11
Limited cancellation demonstrated recently
M. Jain et al, “Practical, Real-time, Full Duplex Wireless”, Mobicom 2011.
2 tap LMS : Block diagram
Opportunities: Adaptive Self-Interference & Echo-
Cancellation [Work in progress]
[Y-S. Choi, Intel]
Match self-interference power and delay to get
cancellation below noise floor
Body Sensor Networks – Applications
Management of chronic disease
Medical diagnostic
Home monitoring
Biometrics
Sports/fitness tracking
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Acknowledgment: IMEC
Typical Bio-signal Acquisition System
High volume of data: Use DSP and compress? Costs area
and power
Inefficient – collect massive amount of samples to discard nearly all of them in the
compression step afterwards!
Opportunities: Compressive Sensing (CS)
Combine both steps, sampling and compression!
the amount of samples can be reduced drastically.
• Works for signals that are sparse in nature
Compressive sensing is based on the recent understanding that
a small collection of non-adaptive linear measurements of a
compressible signal contain enough information for
reconstruction and processing.
CS Opportunities and Challenges
• Off-loads processing from data acquisition into
data reconstruction
• Develop new/improved sensors
• Can enable faster signal acquisition through
multiplexing or with fewer sensors