Post on 02-Oct-2020
물리 전자/김삼동 6-1-1
Potential Difference
Sum the energies from the Fermi level to vacuum
level:
The metal-SC work function difference, φMS, is
defined as;
• Work function difference
g' 'm i ox0 i s Fp
Ee + e + eV = e + e + - e + e
2
φ χ χ χ φ φ
gs
E - e
2φ
ox0eV
meφ
m
'eφ
ieχ eχ'eχ
seφ
gE2≈
Fpeφ
g' 'ox0 s m Fp
E V + = - - + +
2e
→ φ φ χ φ
g' 'ms m Fp
E - + +
2e
φ ≡ φ χ φ
- Metal gates
ms m s - φ ≡ φ φ
물리 전자/김삼동 6-1-2
Potential Difference
eφm’ is the energy difference between Ec (oxide)
and EF of the gate material.
→ EF of the n+ poly-Si = Ec of the n+ poly-Si .
→ Ec (oxide) – Ec = eχ’
- Poly-Si gates • n+ poly Si gate
F cE E=
g' 'ms m Fp
E - + +
2e
φ ≡ φ χ φ
g' 'ms Fp
E - + +
2e
φ = χ χ φ
gms Fp
E - +
2e
φ = φ
물리 전자/김삼동 6-1-3
Potential Difference
eφm’ is the energy difference between Ec (oxide)
and EF of the gate material.
→ EF of the p+ poly-Si = Ev of the n+ poly-Si .
→ Ec (oxide) – Ec = Eg + eχ’
• p+ poly- Si gate F vE E=
g' 'ms g Fp
E E + - + +
2e
φ = χ χ φ
gms Fp
E -
2e
φ = φ
물리 전자/김삼동 6-1-4
Potential Difference
The magnitude of the oxide charge seems, in
general, to be a strong function of the oxidizing
conditions such as oxidizing ambient and
temperature.
→ We assume that an equivalent trapped charge per
unit area, Qss’, is located in the oxide directly
adjacent to the oxide-semiconductor interface.
The presence of this charge also produces potential
difference between the gate and the SC.
• Oxide Charges - Fixed charge : Qss
: Broken or dangling bonds near the Si-SiO2 interface can create (+) fixed charges inside the insulators
'ss
ox
QV = C
∆
물리 전자/김삼동 6-1-5
Potential Difference
Work-function difference: φms
Ec
EV
EF
VG = 0
Ec
EV
EF
VG = φms < 0
Ec
EV
EF
VG = 0
VG = -Qss’/Cox
+
+ + + +
+ Ec
EV
EF
'ss
FB msox
QV 0C
= φ − <
Fixed charge : Qss’
Due to the work-function difference φms, band bends
downward at VG = 0. We need to apply VG = φms (<0)
such that there is no bend bending.
“Flat-band Voltage”
+
+ + + +
+
물리 전자/김삼동 6-1-6
Potential Difference
In NMOS, • Threshold Voltage, VT
The “threshold voltage” is defined as a gate voltage
producing the inversion condition when the surface
potential becomes In NMOS (p-type substrate)
In PMOS (n-type substrate)
Therefore, if the band was originally flat at VG = 0, we
need to apply the following gate voltage to achieve an
inversion point.
2s Fpφ = φ
2s Fnφ = φ
ox s ox FpV V + = V + 2 > 0G = φ φ
oxV > 0
s > 0φ
GV > 0
물리 전자/김삼동 6-1-7
Potential Difference
The charge neutrality is
The oxide voltage can be related to the charge on
the metal and to the oxide charge at this inversion
point.
- Oxide voltage at inversion point, VoxT
Consider charge neutrality in the MOS capacitor
At inversion point, xd → xdT (max) and the inversion
layer starts to form (not created yet)
'mTQ
'sD a dTQ (max) = eN x
dTx
'ssQ
' 'mT sD a dTQ Q = eN x=
''sD a dTmT
oxTox ox ox
Q eN xQV = = C C C
=
1/ 2
s FpdT
a
4 x
e N
ε φ ← =
s a FpoxT
ox
4 eNV =
C
ε φ
물리 전자/김삼동 6-1-8
Potential Difference
⇒ In summary - Correction for the VT is required by using the “flat-
band voltage”
In NMOS (p-type substrate);
In PMOS (n-type substrate);
's a Fp ss
TN Fp ms ox ox
4 eN QV + 2 + - C C
ε φ= φ φ
's d Fn ss
TP Fn ms ox ox
4 eN QV - 2 + - C C
ε φ= − φ φ
VG (+)
P
- - - - - - xdT
VFB
Q’sD: eXdTNa
2φFp
oxide
Metal
- - - - - - Vox
's a,d Fp,n ss
T Fp,n ms ox ox
4 eN QV 2 + - C C
ε φ= ± ± φ φ
Substrate doping: p-type (+), n-type (-)
물리 전자/김삼동 6-1-9
Potential Difference
Both electric field and electric flux are conserved in vacuum In general, electric field is not conserved at the interface between the vacuum & polarized material Electric flux is always conserved !
+ + + + + + + + + +
- - - - - - - - -
Ε
In vacuum
D = εrεo Ε
r oD ε (in SI unit)= ε E
• Electric Flux (Displacement)
+ + + + + + + + + +
- - - - - - - - -
- - - - - - -
+ + + + + +
Εin Dout = εrεo Ε (εr = 1)
Din = εrεo Ε (εr > 1) Εout
≠
oxide SC oxide SC + + + + + + +
ox sD = D 'ox ss sD + Q = D
물리 전자/김삼동 6-1-10
Potential Difference
• Electric field profile
GV =0
FmE
dx
cE
vE
FiEFsE
cE
vE
FiEFsE
FmEFBV
'ssQ
oxE
cE
vE
FiEFsE
'ssQ
FmEG TV >V
dTx
'ssIf Q 0≈
oxsD 0 D 0> → >
FmEFBV
cE
vE
FiEFsE
'ssIf Q 0=
oxsD 0 D 0= → =
'ssIf Q 0≠
oxsD 0 D 0= → <
'ox s ssD = D - Q
'ssIf Q 0≠
ox
's ssD 0 and Q D 0>
→ >
물리 전자/김삼동 6-1-11
C-V Characteristics
- Depletion • Ideal C-V characteristics
- Accumulation
' ' oxox ox r,ox o
ox
C = C = ( = )tε
ε ε ε
p-Si
-
Cox’
- +
Cox’
C’
VG
p-Si
+
- - - - - - - - - - - -
Ionized donor
- +
Cox’
C’
VG
Cox’
CD’ ' ' '
ox D
1 1 1 = + C C C
'D
d
C = x
sε←
ox
ox
ox
'' ox
'ox' dD s
CC = = C1 + t + xC
εε
ε
물리 전자/김삼동 6-1-12
C-V Characteristics
“Flat band capacitance”
: Capacitance in the flat-band condition which
occurs between the accumulation and
depletion conditions.
Note that flat-band capacitance is a function
of tox and Na.
- Inversion
Cox’
CdT’
Inversion layer
xdT p-Si
+
- - - - - - - - - - - - - - - - - - - - - - - -
+
- +
Cox
C’
VG
Cmin’
ox
ox
ox
'min
dTs
C = t + x
εε
ε
ox
ox
ox
'FB
s a
C = kTt + e eN
s
ε
ε ε ε
물리 전자/김삼동 6-1-13
C-V Characteristics
• C-V curves
'oxC
'C
'CFB
'minC
High Frequency
'oxC
Low Frequency
Simplifiedlow frequency model
Accumulation Depletion InversionFBV TV GV
dTx
물리 전자/김삼동 6-1-14
C-V Characteristics
• Frequency Effects
Charge change can occurs - QI: e-’s generates/recombine (thermal)
e- diffuses in & out inversion layer
(long-range diffusion) ⇒ Slow ! Effective !
- QD: depletion width change (xd ↑↓)
(short-range diffusion) ⇒ Fast ! Less effective !
Accumulation
Inversion
High Frequency> 1 MHz
Low Frequency< 100 Hz
0 GV
'C
G
dQC = dV
O S M
QD’
QG’
At LF
dQ’
dQ’
O S M
QD
QG At HF
dQ
dQ
Measurement follows 1/Cox +1/Cd
QI
QI
dxd
Not detected by measurement ~ 1/Cox
물리 전자/김삼동 6-1-15
C-V Characteristics
The flat-band voltage is affected by the fixed
charge.
The VFB shifts to more negative voltages for
a positive fixed charge. Therefore, VT is also
affected by the magnitude and polarity of
fixed charge.
⇒ The C-V characteristics can be used to
determine the Qss’ by measuring the amount
of shift in VT.
• Fixed charge effects
'ss
FBox
QV - Cms= φ
물리 전자/김삼동 6-1-16
C-V Characteristics
- Depletion
- Inversion
• Interface states
: Periodic nature of the SC is abruptly terminated at the
interface (Si-SiO2); many allowed interface states can
exist within the forbidden gap. In general, acceptor levels exist in the upper half and
donor states exist in the lower half. - Accumulation mode
Neutralacceptors
PositivedonorsNeutraldonors
Neutralacceptors
Neutraldonors
Neutralacceptors
Neutraldonors
Negativeacceptor
물리 전자/김삼동 6-1-17
C-V Characteristics
- High frequency C-V curve showing the effects
interface states
⇒ C-V curves become “smeared-out”
“Positive charge effects”
“Negative charge effects”