Post on 03-Jun-2018
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Experiment No. 01
Clippers
Aim:
1. To design and conduct an experiment on clipping circuits for the given transfercharacteristics.2. To Design a Positive clipper using Diode.3. To Design a Negative clipper using Diode.4. To Design a Combinational clipper using Diode.. To Design a !ndependent level clipper using Diode.". #ire Clipper circuit $ Test %or&ing.'. (ecord (eading $ compare %ith design values give conclusion.
Components Required:1. Diode )*+ 12' , !N4--' /1 No.
2. (esistor )Carbon0 1,4#0 1- Nos.
Equipments Required1. pring *oard 1 No.2. unction 5enerator /2 678 /1 No.3. Dual Po%er uppl9 )-/3-:0 2;0 (everse resistance 1-6?0 (f > or%ard resistance 1-?0R=RrRf $ 10!%
@et the voltage to clip sa9 2 :olts i.e.0 :=)max > 2:*9 appl9ing A:@/:o B :ref B:r > -
@et :r )diode drop voltage > -." volts:ref > :o :r:ref > 2 -."&re' $ 1. olts.
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or*in# Procedure:1. 6a&e the connection as sho%n in the circuit.2. et the input signal from the signal generator as per design3. et :ref :oltage from the po%er suppl9 as designed.4. =bserve the output %aveform on the C(= and record 9our observation.
. =bserve the transfer characteristics on C(= b9 selecting /+ mode.
(+) Typical Ne#atie Clipper C!T
"esi#n Procedure:@et the voltage to clip sa9 2 :olts i.e. :o )min > / 2:*9 appl9ing A:@/:o :ref :r > -@et :r )diode drop voltage > -." volts:ref > /:o / :r:ref > 2 -."&re' $ 1. olts
or*in# Procedure: Sae as Positive !lipper
(C) Typical Com+inational Clippin# C!T
"esi#n Procedure:@et :ref1 >:ref2> :ref >4:@et the voltage to clip sa9 4 :olts i.e. :o )max > 4: :o)min > /4:
,y applyin# !&- &o / &re' / &r $ 0
@et :r )diode drop voltage > -." volts:ref > :o :r:ref > 4 -.":ref > 3.4 volts.
or*in# Procedure: Sae as Positive !lipper
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(d) Typical ndependent leel clippin# C!T
Fig. (5) Circuit Diagram Input output Waveforms Transfer Characteristic
"esi#n Procedure:To clipping the signal belo% 2 :olt and above 4 :olt levels
@et :(1 :(2
1E :o max> 4 : ;ppl9 A:@ >/:o max B :(1B :r> -
:(1> :o max :r > 4 -."
2E :o min> 2 :;ppl9 A:@ >/:o minB :(2 :r> -
:(2> :o minB :r
> 2 B -."
&R $ .2 &
or*in# Procedure: 3ame as Positie Clipper
Type o' Clippertested
"esi#ned &alue Practical 4easured alue Remar*s
Positive Clipper
Negative Clipper
CombinationalClipper!ndependent Clipper
Conclusion:
Experiment No. 0
&R1$ 5. &
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Clampin# Circuits
Aim:1. Design and conduct an experiment on Positive, Negative Clamping circuit for a given
reference voltage.2. To Design a positive clamping using Diode.
3. To Design a Negative clamping using Diode.4. #ire Clamping CAT $ test %or&ing.. (ecord (eading $ compare %ith designed values give conclusion.
Components Required:1. Diode )*+ 12' , !N4--' 1 No.2. Capacitor )Ceramic Dis& 1 Nos.
Equipments Required:1. pring *oard 1 No.
2. unction 5enerator /2 678 /1 No.3. Dual Po%er uppl9 )-/3-:02;0
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or :i > /:m :o > /2:m
"esi#n Procedure:
(C T0 (C 2- ms )sa9
([2-ms-.1Ff] ( G
2--K
i.e. ( > 2--K
3elect C $ -.1Ff 7 R $ 2--K
or*in# Procedure:1. 6a&e the connection as sho%n in the circuit.2. et the input signal from the signal generator as per design.3. et :ref:oltage from the po%er suppl9 as per design.
4. =bserve the output %aveform on the C(= and record 9our observation.
Conclusion:
Experiment No 05
3eries and Parallel Resonance Circuits
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A4:1. To obtain the freHuenc9 response of (@C series and parallel circuit and hence to
Determine.2. To Design a (esonance freHuenc9 f-.3. To Design a *and %idth0 upper and lo%er half po%er freHuencies.4. I factor.
Components Required:1. (esistor )Carbon0 1,4#0 1- 1 Nos.2. Capacitor )Ceramic Dis& 1 Nos.
Equipments Required1. pring *oard 1 No.2. unction 5enerator )2 678 /1 No.3. Dual Channel C(= )2-678/1 No.4. Connecting #ires /1-Nos.. Probes 3 Nos.
(a)Typical Circuit dia#ram: 3eries resonance
"esi#n Procedure:
Theoretical resonance freHuenc9
f= 1
2J LCeq 88888.. (1)
3elect '$ 1!9 and C $ - .1Ffo from eHuation )1 %e get -$0.;59 3elect R $ 1--
Tabular ColumnK elect :in> 1-:P/Pine #ave
reHuenc9 )78 :oltage )v Current)m;! > :,(
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1--2--...
.2A78
reHuenc9 (esponse
*and #idth > f2/f1
I actor > fo , *and #idth
f2 f1 > RRRRR.78.
'. The I factor > fo , )f2 f1
RE3>-T:fo > RRRRR.780 f1> RRR780 f2> RRR780 *#> RRR78 and I >
(+) Typical Parallel Resonance Circuit
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"esi#n Procedure: 3ame as series resonance Circuit
Tabular ColumnK elect :in> 1-:P/Pine #ave
reHuenc9)78 :oltage)v Current)m;! > :,(1--2--...2A78
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&eri'ication o' net?or* t@eorems 'or "C Circuits
A4::erification of Thevinins $ 6aximum Po%er Transfer theorems for DC circuits.
Components Required:1. (esistor )Carbon0 1,4#0 1- 3 Nos.
Equipments Required1. pring *oard 1 No.2. Dual Po%er uppl9 )-/3-:0 2;0 12:/1 No.3. ;mmeter )-/2-m; /analog /1 No.4. :oltmeter )-/2-: analog 1 No.. D(* )1? / 1--A? 1 No.". Connecting #ires /1-Nos.'. Probes 3 Nos.
Typical Circuit dia#ram:
To 'ind Current 1
To 'ind T@eenins &olta#e B&t@
To 'ind T@einins Equialent Resistance Rt@
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To 'ind Current t@
or*in# Procedure:1. Connect the circuit as sho%n in the circuit diagram.. ind out current !1rom the ammeter as sho%n in fig.5. ind :th)Thevinins voltage b9 removing load at Point ; $ *.
. ind Thevinins resistor (th b9 shorting source as sho%n in fig.;. ind out current !2b9 connecting po%er suppl9 )i.e. : th as sho%n in Circuit.2. &eri'y 1 $t@ (T@eorem is eri'ied).
RE3>-T:1 Thevinins :oltage > RRRR :.2 Thevinins (esistance > RRRR.. =hm.
3 Thevinins Current > RRRRRRR m;.
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(+) 4aximum Po?er Trans'er T@eorem: The maximum po%er %ill transfer to the load%hen the load resistor value is eHual to the source resistor value
@en R-$ R3t@en ?e ?ill #et maximum Po?er
Ta+ular Column:
3elect R3$ 1! o@ms.
:volts !m; P > :S! )#atts (@1--2--R.
..2A78
Nature of Graph
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Experiment No 0;
R C Coupled Ampli'ier
Aim:
1. To design and conduct the experiment on (C Coupled amplifier using *ipolar unctionTransistor )*T and hence02. Plot the freHuenc9 response.
3. Determine its band%idth.4. ind input and output impedance.
Components Required:1. Transistor )@1--/1 No.2. (esistor )Carbon0 1,4#0 1- Nos.3. Capacitor )Ceramic Dis& 2 Nos.4. Capacitor )Ulectrol9tic 1 Nos.
. D(* )1? / 1--A? /1 No.
Equipments Required1. pring *oard 1 No.2. unction 5enerator /2 678 /1 No3. Dual Po%er uppl9 )-/3-:0 2;0
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*iasing Circuit
"esi#n Procedure:
@et :CC> 12 :0 !C > 4. m;0 V > 1--)for @ 1-- Choose :U> :CC ,1- > 12,1- > 1.2 : :U> !U(U> 1.2 : (U> 1.2,!c> 1.2,4.m; > -.2"' AW )!UX !C
RC:Choose :CU> :CC ,2 12,2 > ":;ppl9 A:@ in CU loopK
:CC !C(C :CU :(U> - 12 4.(c " 1.2 > - (C> 1.o' AW
elect
R1and R::*> :*UB :U> -.' B 1.2 > 1.Y :
#e &no% VB=VccR2
R1+R2
1.Y=12R
2
R1+R2
R2
R1+R2=
1.Y
12 =-.1Z
(2> -.1Z(1B -.1Z(2 -.Z41"(2> -.1Z(2
-et us assume R$ .D! (1> 2 AW
C@oose R1$ D!
,y pass capacitor CE:
-et XCE=RE
1-
RE$ D0
RC$ 1!
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At ' $ 100 9FG1
2J fce=RE
1-
C E=1-
2J1--2'-=Y F
C@oose CE$ D HI (electrolytic)
Cc1 and CC: Assume CC1$ CC$0.1 HI (ceramic)
R1 $ D!%7 R $ .D!%7 RE $ D0%7 RC $ 1 !%
CE $ DHI (Electrolytic)7 CC $ 0.1HI (Ceramic)
Irequency Response cure
TA,>-AR C4N:
:in > - m:
@N=
(UI[UNC+in 78
:o)p/pin :olts
;v>:o,:i :oltage 5;!N in d* > 2- log):o,:i
or*in# Procedure:
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1. Connect the circuit as sho%n in the circuit diagram.2. et the input -mv sine %ave signal from the signal generator.3. :ar9 the freHuenc9 from 1--78 to 1678 and note do%n : )p/p on the C(=.4. Tabulate the reading\ dra% the freHuenc9 v,s gain b9 using semi log graph.. ind the band %idth f2 f1 as sho%n in the freHuenc9 response curve.
T< 4EA3>RE i:
or*in#Procedure:
1. Connect the circuit as sho%n in the circuit diagram.
2. et the D(* to the minimum value.3. et the signal generator )voltage to -m: pea& to pea& and freHuenc9 to 1- A78.4. !ncrease the D(* till :o becomes half of the :o.. Corresponding D(* value %ill give the input impedance.
T< 4EA3>RE o:
or*in#Procedure:
1. Connect the circuit as sho%n in the circuit diagram.2. et the D(* to the maximum value.3. et the signal generator )voltage to -m: pea& to pea& and freHuenc9 to 1- A78.4. Decrease the D(* value till :o becomes half of the :o.. Corresponding D(* value %ill give output impedance.
Result:
1. *and %idth>RRRRRRR2. !nput impedance>RRRRR3. =utput impedance>RRRRR.
4. I Point (c7 &CE > RRRRR
Experiment No 02
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Typical Circuit dia#ram:
"esi#n Procedure:
Ior +iasin# circuit: 3ame as RC Coupled Ampli'ier
R1 $ D!%7 R $ .D!%7 RE $ D0%7 RC $ 1 !%
CE $ DHI (Electrolytic)7 CC $ 0.1HI (Ceramic)
Ior Tan* circuit:
-et ' $ 100!9 and C $ 1000pIL=
1
4_2f2C
$ .;5m9 @ere -$ -1 / - 3elect -1 K -
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C
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f= 1
2J LCeq
#here C=C
1C
2
C1+C2
Assume C1$ 1000 pIand C $ 00 pI
C=1---22--1-
24
1---22-- 1-12
C=1---22--1-
12
1---22-- ="Z'.pF
L= 1
4J2 f
2C
- $ 5.2m9
or*in# Procedure:
1. Connect the circuit as sho%n in ig.2. %itch on the D.C. po%er suppl9.3. :ar9 Pot connected in series %ith (Uto get clear sine %ave.4. =bserve the output %aveform on C(= screen.. 6easure the freHuenc9 of the output %aveform.". Compare the measured freHuenc9 %ith theoretical value.
Result: 9artley L colpitts
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Experiment No 0D
RC P@ase 3@i't
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"esi#n Procedure:
Ior +iasin# circuit: 3ame as RC Coupled Ampli'ier
R1 $ D!%7 R $ .D!%7 RE $ D0%7 RC $ 1 !%
CE $ DHI (Electrolytic)7 CC $ 0.1HI (Ceramic)
P@ase s@i'tin# net?or* desi#n:
The freHuenc9 of oscillations is determined b9 phase shifting net%or&.The oscillatingfreHuenc9 for the above circuit is given b9
f= 1
2JRC" ------ (1)
-et '$ ; !9 and c@oose C$ 0.01HI
So from equation (1) e i!! get R=1.2!%
or*in# Procedure:1. Connect the circuit as sho%n in ig.2. %itch on the D.C. po%er suppl9.3. =bserve the o,p :o on C(=.The1-A pot is adLusted to get a stable output on the C(=.4. 6easure the freHuenc9 of the output %ave.. Compare the measured freHuenc9 %ith theoretical value.
Result: Irequency o'
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Crystal oscillator
A4:1. To design and test the performance of a cr9stal =scillator
Components Required:1. Transistor )@1--/1 No.2. Cr9stal /1 No.3. (esistor )Carbon0 1,4#0 1- 4 Nos.4. Capacitor )Ceramic Dis& 2 Nos.. Capacitor )Ulectrol9tic 1 Nos.". Potentiometer )-/1A?/1 No.
Equipments Required1. pring *oard 1 No.
2. unction 5enerator /2 678 /1 No.3. Dual Po%er uppl9 )-/3-:0 2;0
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"esi#n Procedure: 3ame as RC Coupled Ampli'ier
R1 $ D!%7 R $ .D!%7 RE $ D0%7 RC $ 1 !%
CE $ DHI (Electrolytic)7 CC $ 0.1HI (Ceramic)
or*in# Procedure:
1. Connect the circuit as sho%n in ig.2. %itch on the D.C. po%er suppl9.3. =bserve the o,p :o on C(=.The1-A pot is adLusted to get a stable output on the C(=.4. 6easure the freHuenc9 of the output %ave.. Compare the measured freHuenc9 %ith theoretical value.
Result:
Irequency o'
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EOPER4ENT N
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C c 1
C E
R c 1
R 2 R 4
C c 2
R F
V o
R E 2
R E
R c 2
R E 1
V i =
5 0 m V
Q 1 Q 2
C c 3
R 1 R 3
V C C = 1 2 V
Ii#: it@ 'eed+ac*
"esi#n Procedure: 3ame as RC Coupled ampli'ier
R1 $ D!%7 R $ .D!%7 RE $ D0%7 RC $ 1 !%
CE $ DHI (Electrolytic)7 CC $ 0.1HI (Ceramic)
or ! stage split (Uinto t%o parts. RE$ 100 % / 1D0 %
Design of second stage is same as that of first stage.>se RE $D0%
The feedbac& factor = R
1E
R f+R1E
R1E=33- %
The feedbac& resistor (f should be much greater than (C. hould be bet%een -.-1 to -.1.
@et R' $10!% then =33-
33-1- ,---
=-.-32
7ence is %ithin the usual chosen values -.-1 to -.10 so choose R' $10!%
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TA,>-AR C4N:
:in> - m:)p/p
reH..in 78
:o)p/p
in :olts%ithout
feedbac&
:o)p/p
in :olts%ith
feedbac&
;v>:o,:i
;v fb>:o,:i 5d*
>2- log):o,:i 5fb d*
>2- log):o,:i
To measure i and o: Procedure is similar to RC coupled ampli'ier.
RE3>-T:
*and%idth %ithout eedbac& K ````````````````````````*and%idth %ith eedbac& K ````````````````````````!nput !mpedance %ithout eedbac& K ````````````````````````
!nput !mpedance %ith eedbac& K ````````````````````````=utput !mpedance %ithout eedbac&K ```````````````` `````=utput !mpedance %ith eedbac& K ````````````````` ```````
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EOPER4ENT N rms value of input )secondar9 of the transformer:o )dc > ;verage value of dc output:o)ac > rms value of ac component of the output voltage
(ipple factor >rms value of ac component , value of dc component > :o )ac,:o )dc
Ufficienc9>output po%er , input po%er > :o)dc,:in)acE2x 1--
(egulation> :o)dcN@ / :o)dc@E , :o)dc @ x 1--"esi#n Procedure: 9R it@out 'ilter
@et :o)dc >": or 7#( :m> :o)dc x >1Z.Z: :in)ac >:m, Q2>13.3: ) Note K [se 12K-K12 or 1K-K1 Transformer
@et !dc>1-m;0 (@>:o)dc , !dc>": , 1-m;>"--?
9R it@ Iilter :
or 7#( ripple factor is given b9 > 1 , )2Q3xCxfx(@
#here f > -78 (@> "--?!f > 2 or -.-2 then C > 4'-^!f > 1 or -.-1 then C > 1---^
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Typical Circuit dia#ram: 9R (Connect suita+le C 'or ?it@ 'ilter circuit)
Ta+ular Column : 9R ?it@out 'ilter
:in )ac > RRRRR :o)dc N@> RRR. :o)dc @ > RRRR.. ( > RRRR
(@ :o)dc :o)ac >:o)dc,:in)acE2x 1-- >:o)ac , :o)dcE x 1--
"--?1-A?
9R ?it@ 'ilter
:in)ac >RRRR C>RRR..
(@ :o)dc :o)ac > :o)ac , :o)dcE x 1--"--?
(+) Iull ?ae Recti'ier: it@out 'ilter
@et :o)dc >12:
:m>:o)dcx )J , 2>1Z.Z:in)ac>:m , Q2 > 13.3 )elect 12K-K12 or 1K-K1 Transformer@et !dc >1-m;0 (@>:o)dc ,!dc >12: , 1-m;>1.2&?
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it@ 'ilter :
>1 , )4Q3xfxCx(@
!f >1 or -.-1 elect C>2--^!f >-. or -.-- then select C>4'- ^
Typical circuit dia#ram: Center tap IR
igK Center tap #( )Connect suitable C for %ith filter circuit
Ta+ular Column: Center tap IR it@out 'ilter
:in)ac > RRR
(@ :o)dc :o)ac 1.2&?
1- &?
Center tap IR it@ Iilter
:in)ac>RRR.. C>RRR..
(@ :o)dc :o)ac (ipple actor1.2&?
1- &?
(c) ,rid#e recti'ier: "esi#n is similar to Center tap IR.
Typical circuit dia#ram:
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igK ull %ave *ridge rectifier circuit )connect suitable C for %ith filter circuit
Ta+ular column: ,rid#e recti'ier (it@out Iilter)
:in )ac > RRRR
(@ :o)dc :o)ac 1.2&?
1- &?
#ith ilterK :in )ac > RRR.. C > RRR.
(@ :o)dc :o)ac 1.2&?
#aveforms for #( K
(esult K
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Experiment No 11
Components Required:1. Transistor )@1--/2 No.2. (esistor )Carbon0 1,4#0 1- Y Nos.3. Capacitor )Ceramic Dis& 3 Nos.4. Capacitor )Ulectrol9tic 1 Nos.
Equipments Required
1. pring *oard 1 No.2. unction 5enerator )2 678 /1 No.3. Dual Po%er uppl9 )-/3-:0 2;0
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Assume &cc$ 1&7 C Q C $ ;mA7 $ 100 (3-100)
rom biasing circuit to find (U0 (1and (2
:*1 > 2:*UB :(U :(U> :cc,2 > ":> 2S-.' B " !U2x (U> ": )!U2X !c2> '.4: (U> " , m; > 1.2AW
To find !*20 !*1!*2 > !c2, V !*1 > !c1, V
> m; , 1-- > -.-m; > !*2, V > -.-m; , 1--> -.---m;
;ssuming 1- !*1flo%s through (1(1 > ):cc :*1 , 1-!*1 (2> :*1, Y!*1> 1."6W X 1.6W
> )12 '.4 , 1-S-.---m;
> -.Y26W X 16W
Choose the coupling capacitors Cc1> Cc2> -.1^
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Tabular ColumnK
TRE i:
:in> 1: )p/p@N=
reHuenc9
in 78:o)p/p
in :olts;v>:o,:i
:oltage gainin d*> 2-log1- ;v
123.....
1--......
1678
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or*in# ProcedureK1. Connect the circuit as sho%n in the circuit diagram.2. et the D(* to the minimum value.3. et the signal generator )voltage to 1: pea& to pea& and freHuenc9 to 1- Ah].4. !ncrease the D(* value till :obecomes half of the :o.. Corresponding D(* value %ill give the input impedance.
T< 4EA3>RE o:
Procedure:
1. Connect the circuit as sho%n in the circuit diagram.2. et the D(* to the maximum value.3. et the signal generator )voltage to 1: pea& to pea& and freHuenc9 to 1- A7].4. Decrease the D(* value till :o becomes half of the :o.. Corresponding D(* value %ill give the output impedance.
Result:
1. *and %idth ////////////////////////////
2. !nput impedance //////////////////////3. =utput impedance/////////////////////4. I Point /////////////////////////////////
&ia &oice
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Component Testin#
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