Post on 05-May-2018
A faster route to better overlay
Product lifecycle management: added-value across the industry
Focus on a new star
ASML’s customer magazine | 2014
images | Colofon
Editorial Board
Lucas van Grinsven, Peter Jenkins
Managing Editor
Michael Pullen
Contributing Editor
Saskia Boeije
Contributing Writers
Paul Tuffy, Jan-Willem van der Horst,
Thomas van Wezel, Jules Tops,
Janneke van Heteren, Remi Pieternella,
Stuart Young
Circulation
Karen Lo, Michael Pullen, Saskia Boeije
For more information, please see:
www.asml.com/images
© 2014, ASML Holding BV
ASML, ASM Lithography, TWINSCAN, PAS 5500,
PAS 5000, SA 5200, ATHENA, QUASAR, IRIS, ILIAS,
FOCAL, Micralign, Micrascan, 3DAlign, 2DStitching,
3DMetrology, Brion Technologies, LithoServer,
LithoGuide, Scattering Bars, LithoCruiser, Tachyon
2.0, Tachyon RDI, Tachyon LMC, Tachyon OPC+,
LithoCool, AGILE, ImageTuner, EFESE, Feature Scan,
T-ReCS and the ASML logo are trademarks of ASML
Holding N.V. or of affiliate companies. The trademarks
may be used either alone or in combination with
a further product designation. Starlith, AERIAL,
and AERIAL II are trademarks of Carl Zeiss. TEL is
a trademark of Tokyo Electron Limited. Sun, Sun
Microsystems, the Sun Logo, iForce, Solaris, and the
Java logo are trademarks or registered trademarks of
Sun Microsystems, Inc. in the United States and other
countries. Bayon is a trademark of Kureha Chemical
Industry Co. Ltd. Nothing in this publication is intended
to make representations with regard to whether any
trademark is registered or to suggest that any sign
other than those mentioned should not be considered
to be a trademark of ASML or of any third party.
ASML lithography systems are Class 1 laser products.
6 10 164 A faster route to better overlay
6 EUV shows consistent performance
in the field
10 Product lifecycle management:
added-value across the industry
12 New nodes with your installed
TWINSCAN NXTs
16 Focus on a new star
2
As 2014 comes to a close and we look
back on our 30 year history of providing
lithography solutions for the ever growing
and changing semiconductor industry,
it is amazing to see the challenges
that we have overcome, and the
accomplishments that we have made,
together as an industry. As we look to
coming years, there are obvious hurdles
and roadblocks that we must overcome
to continue down the path set forth by
Moore’s Law.
In this issue of Images Magazine,
we will take a look at how we, at ASML,
are preparing to clear those hurdles and
continue down the path for another
30 plus years.
Going back nearly to our start in 1984,
the PAS 2500/5000 is still in use today
at several customers. While its End
of Service is approaching, the Mature
Products Service team is redefining
the life cycle of all ASML products and
mapping out four major lifecycle stages
that will increase transparency with
customers and help them improve their
own business planning in the future.
You will hear how ASML’s new Design
for Control (D4C) Overlay software
is tackling the current industry
requirements for overlay, focus control
and critical dimension uniformity (CDU)
and will meet the future demands by
allowing customers to design and
optimize metrology targets that can be
used to deliver significant improvements
to overlay performance.
Another hurdle you will read about is
the cost ineffectiveness of transitioning
from node to node and how ASML’s
System Node Extension Packages
(SNEPs) are breaking through this by
converting any TWINSCAN NXT system
to a newer model in the field, effectively
extending its capabilities another one or
two production nodes.
As you may have read recently, our EUV
tools are meeting and exceeding the 500
wafer per day barrier, with one machine
at IBM exposing 637 EUV wafers in a
single day! Additional advancements
and improvements are being made to
source power, availability and particle
contamination.
Last, but not least, you will read about
the latest YieldStar system, the 250D.
It is the first metrology system capable
of measuring overlay, focus and CD
in a production environment, helping
customers maximize their yields of good
wafers-per-day.
I hope you find this issue informative
and of value. Please feel free to
provide direct feedback to me at
michael.pullen@asml.com so that we
can continue to improve the magazine
and your experience.
Happy reading!
Mike
30 years down, 30 plus to go By Michael Pullen, Senior Communications Specialist
3
ASML Images, 2014
Editor’s note
A faster route to better overlayBy Paul Tuffy, Product Manager BRION Wafer Fab Applications
Abstract | ASML’s new Design for Control
Overlay software identifies the best
metrology target design for any given layer
combination and process in the shortest
time. It allows customers to design and
optimize metrology targets that deliver
the ideal balance of printability, detectability,
accuracy and device matching. These targets
can be used in an automated feedback
loop to deliver significant improvements to
on-product overlay performance.
Fast, precise and accurate, ASML’s
YieldStar diffraction-based metrology tool
has made it possible to continually monitor
on-product overlay performance and
provide faster feedback to the scanner.
This is done through a feedback loop
where overlay data from an in-track
YieldStar module is converted into
smart exposure corrections by system
enhancement packages like Litho Insight.
These corrections are fed back to the
scanner for subsequent wafers, resulting in
improved on-product overlay performance.
These overlay measurements are based
on grating targets included in the reticle
designs for the many overlay-sensitive
layer combinations in a product. The design
of these targets needs to fulfill certain
performance requirements. It must print
well across the process window, and
deliver an easily detectable diffraction
signal to ensure precision and short
measurement times. It also needs to
help ensure the measurements are
accurate and not affected by variability
in processing steps such as etching and
chemical mechanical planarization (CMP).
As design features shrink, more and more
overlay targets are needed to capture
the overlay fingerprint at the required
level of detail. At the same time, placing
targets within the actual device becomes
advantageous as it allows more accurate
and higher-order corrections. This in-die
placement is only feasible with very small
targets, making it important to optimize
the target design for a strong diffraction
signal. Moreover, the increased use of
opaque materials in the latest technology
process stacks – such as the sacrificial
layers used in spacer processes – make
target optimization for signal strength
doubly important.
Design for Control
ASML’s new Design for Control Overlay
(D4C Overlay) software package helps
semiconductor manufacturers identify
the best metrology target designs in the
shortest time. It does this by simulating
the lithography process and resulting
YieldStar measurements of candidate
targets including the full layer stack,
allowing the design parameters of the
target for a given layer to be optimized.
D4C Overlay transforms target
optimization from a lengthy trial-and-
error process to a quick and reliable
computational one. It avoids the need
to carry out repeated wafer experiments
on different test designs – significantly
speeding up process development.
And it allows users to try out thousands
more targets and fully explore the design
space – enabling the development of
Identify the best
target designs in the
shortest time
4
Design for Control Overlay optimizes YieldStar overlaytargets for best on-product overlay performance
• Target selection for robust and accurate overlay with lowest sensitivity to process induced asymmetry
D4C
Detectability
Accuracy: Process robustnessAccuracy: Device matchingdevice target
Printability
• Improved overlay due to improved aberration sensitivity matching (target to device)
• Mask optimization• Litho process window• Design rule compatibility
• Target selection to meet TMU/ MAM requirements• Including process variations for detectability robustness
∆SWA
D4C Overlay Target Design Flow
Input
Select targets basedon weighed KPIs
Target selection Filter out targets
with poor detectabilityand printability
YieldStar detectability
Simulatedetectability KPIs
@ nominal
Detectability robustness
Aberration matching
Overlay robustness
Simulate detectabilityrobustness KPIs
Simulate overlayrobustness KPIs
Simulate aberrationsensitivity KPIs
Simulateprintability KPIs
Litho Printability
Optional
(process flow)
Designinput
(Tachyon FEM+)
Lithomodel
(YS & target patterns)
Simultationsettings
target printability and detectability.
The full version including overlay
accuracy was launched in Q3 2014.
It is designed for use with ASML’s
TWINSCAN NXT immersion ArF and
NXE extreme ultraviolet scanners in
conjunction with YieldStar YS 200C or
YS 250D metrology tools and Litho Insight
overlay optimization software.
the final target design in a single reticle
tape out cycle.
By identifying targets that balance
precision and accuracy, D4C Overlay
helps deliver significantly better on-
product overlay performance. What’s
more, it can match the aberration
sensitivity of the target to that of the
critical device features being printed in
the specified layer, enabling further
overlay gains. (See Fig. 1)
Tailor-made targets
Design for Control Overlay is a complete
target optimization software package.
Its easy-to-use graphical user interface
guides the user through the target design
process step by step. This includes a
flexible interface for defining the process
stack in the same way as it is built in the
fab: adding etch, deposition, CMP and
patterning steps to build each layer.
This approach allows almost any stack
design to be simulated. (See Fig. 2)
Once the user has specified the process
design rules and constraints, the software
runs an initial simulation to identify target
candidates that meet the printability
and detectability specifications.
The detectability, overlay accuracy
and lens aberration performance of
these candidates are then tested in a
further round of simulations.
An extensive set of built-in analysis features
including 2D heat maps and 3D amplitudes
simplifies the selection of optimal targets.
Once the user has chosen a number of best
candidates for experimental validation,
the D4C Overlay software outputs the
complete reticle pattern for that layer in
the GDS format. (See Fig. 3)
In-house design and optimization
D4C Overlay runs on any fab server
cluster using the Tachyon Flex platform.
We offer extensive training and detailed
user manuals on how to get the best
from the package. This allows companies
to keep target design and optimization
completely in house.
D4C Overlay was initially released in
late 2013 in a version that focused on
Together these systems deliver a
holistic solution to the current industry
requirements for 5 nm overlay,
60 nm focus control and 1.6 nm CDU
(after etch). Planned enhancements to
all these products will support roadmaps
towards 2017 that demand 2.5 nm overlay,
50 nm focus control and 1.1 nm CDU
(after etch).
Fig. 2
Fig. 1
Fig. 3
5
ASML Images, 2014
EUV shows consistent performance in the fieldBy Jan-Willem van der Horst, Product Manager EUV
EUV lithography is making continued
progress towards maturity and production
insertion. Systems at customer sites are
delivering consistent performance fit for
development of 10 nm logic and sub-20 nm
DRAM products. Productivity levels are
up – leading to a record number of EUV
wafer exposures in a day.
The TWINSCAN NXE:3300B is our
third-generation EUV lithography system,
with a resolution specification of 22 nm.
Six of these systems have been qualified at
our facility in Veldhoven, the Netherlands
and shipped to customer sites. A further
five are currently going through the
qualification process.
Abstract | ASML has qualified and shipped
six TWINSCAN NXE:3300B extreme
ultraviolet (EUV) lithography scanners.
With multiple systems exposing wafers
at customer sites, the NXE:3300B
is demonstrating consistently good
performance. Meanwhile, enhancements
to source power and availability are driving
productivity gains. In addition, a joint
research program with customers and
materials suppliers is exploring a pellicle
concept to protect EUV masks from
particle contamination, and hence reduce
printed defect levels.
Excellence as standard
These installed systems demonstrate
that the NXE:3300B’s excellent imaging
performance is repeated across multiple
systems. In fact, the systems in the field
often achieve performance levels in excess
of specifications – for example printing
16 nm dense lines with large process
windows. Full wafer focus uniformity
better than 12 nm is common, as is critical
dimension uniformity (CDU) below 1.5 nm.
Excellent imaging
performance is repeated
across multiple systems
6
corrected using standard scanner model
Wafer – after std modelling
10
1.5
3
4.5
6
2 3 4 5 6 7 8
Mat
ched
mac
hine
ove
rlay
[nm
]
X - axisY - axis
Lot (3.2,3.0)
Logic 10nm Metal 1 layer: Wide Depth of Focus at 20 mJ/cm2
NXE:3300B, 10 nm logicMetal 1 layer, 45 nm pitch.
Clips courtesy of STMicroelectronics
Quasar illumination¬Dose ~20 mJ/cm2¬NXE OPC+
-80nm-60nm-40nm-20nm
0nm20nm40nm60nm80nmFO
CU
S:
DoF
120
nmFO
CU
S:
DoF
120
nm
Overlay performance too is consistently
excellent. The six installed systems exhibit
matched machine overlay (MMO) with
our immersion scanners of around 5 nm
or better. And full-wafer dedicated chuck
overlay (DCO) below 1.4 nm has been
achieved. (See Fig. 1)
Customers had already shown that the
NXE:3300B is capable of printing real
devices structures for the 10-nm logic
node with an extended depth of focus
(DoF). Now by combining the scanner’s
off-axis illumination (OAI) capabilities
with ASML-Brion’s advanced optical
proximity correction (OPC), they have
reproduced those results at much lower
doses. For example, customers have
printed 10-nm logic metal 1 layers with a
120 nm DoF at a dose of around 20 mJ/cm2
– both fi gures are within requirements for
high-volume production. (See Fig. 2)
Pushing up productivity
The six installed NXE:3300B systems
feature the new master oscillator
power amplifi er pre-pulse (MOPA-PP)
Systems feature the
new MOPA-PP source
confi guration running
at 40 W
Fig. 1: MMO performance for various machines
Fig. 2: 10-nm logic metal 1 layer
7
ASML Images, 2014
Start End
Start EndSubstrate radius, mm
Reflectivity Al-05 (unpolarized)
50 100 150 200 250 300 35005
10152025303540455055
Ref
lect
ivity
,%
After cleaningBrand new
Field collector cleaned in NXE:3300 source vessel test rig
Off-line cleaning using NXE:3300B source vessel with product configuration hardware
Reflectivity restored within 0.8% of original Cleaning in off-line MOPA Prepulse development vessel
In-situ collector cleaning¬Effectiveness of product configuration confirmed
MaskAbsorber pattern
Full-size EUV pellicle prototype manufactured
Pellicle transmission requirement: 90%
Current status: ~86%
Pellicle
µm-size particles do not aff ect imaging
Fig. 3
Fig. 4
8
source confi guration running at 40 W.
Complementing this increased source
power, we have developed a number of
features to improve source availability.
Among these is a system for cleaning the
collector mirror in-situ. The system can
restore the collector’s refl ectivity to almost
brand new, eliminating the need to take
the system off line to replace the collector.
We’ve also shown that the source can be
run in a fully automated mode with good
dose control. This increases availability
while maintaining a 99.9% die yield.
(See Fig. 3)
As a result, productivity from our
EUV scanners has been steadily rising –
resulting in the recent announcement by
IBM of a new 1-day EUV wafer exposure
world record. In a test of the source,
they exposed 637 EUV wafers in a single
day. This test to verify the source’s power
output and reliability was carried out with
the scanner linked to a track, and using
an exposure dose of 20 mJ/cm2 and
conventional illumination.
“The test was designed to check if the
newly installed source was working
correctly. Exposing so many wafers was
an unexpected bonus – due to the source
operating so well,” Dan Corliss, IBM’s EUV
development program manager.
In the meantime, several customers have
cleared the 500 wafers per day barrier.
These achievements show we are on track
to meet our previously stated end-of-year
goal of 500 wafers per day as an average
and our 2016 goal of 1500 wafers per day
to support volume production.
Addressing the mask defect challenge
With EUV lithography scanners becoming
more mature, ASML is also active in
addressing ancillary issues related to
EUV lithography wafer fabrication.
One example is mask front-side
defectivity. In parallel to improving the
system’s overall cleanliness, we are
working with customers and materials
suppliers in an ongoing joint research
program to explore pellicles for protecting
EUV masks from particle contamination.
Together these efforts aim to improve
printed defect levels. (See Fig. 4)
EUV lithography requires refl ective rather
than transmission masks. Hence pellicle
materials for EUV have higher single-pass
transmission requirements than for DUV
lithography, as the EUV light must pass
through the pellicle twice. The year-long
research collaboration has developed a
new higher-transmission pellicle. Tests on
half-size pellicles mounted on the reticle
have shown the new pellicle concept
has little or no impact on CD or line
roughness. The pellicles have also shown
good robustness, surviving multiple
exposures and extensive mechanical
testing – including unusually rough
handling – intact.
The fi rst full-size, free-standing pellicle
prototypes for EUV masks have been
manufactured. Exposure tests using these
prototypes are planned for later this year.
Enabling future shrink
Single-exposure EUV lithography enables
aggressive feature shrink to drive the
semiconductor industry forward over the
coming years. The imaging performance
reported from our NXE:3300B systems
already exceeds requirements for the
10-nm 2D logic node. And ASML’s
technology roadmap extends the NXE
platform to beyond the 7 nm node. As the
next step on that roadmap, integration
and qualifi cation of our fourth-generation
system – the TWINSCAN NXE:3350B –
has already begun.
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First full-size, free-standing
pellicle prototype for EUV
masks
9
ASML Images, 2014
Product lifecycle management: added-value across the industryBy Thomas van Wezel, MPS Product Manager Product Life Cycle
Abstract | ASML is introducing a more
formalized approach to product lifestyle
management. This involves mapping our
systems to four major lifecycle stages
defined by the level of support ASML offers.
Timelines for when each system type
transitions between stages are defined well
in advance, and reviewed annually based on
market demands and customer feedback.
By communicating this information in a
timely fashion, we will increase transparency
for customers and suppliers – helping them
improve their own business planning.
ASML is 30 years old this year.
In celebrating this anniversary, it is
remarkable to note that one of the very
first machine types we developed is still
in service today. Almost 30 years old
itself, the PAS 2500/5000 is still being
used in production at several customers.
Of course its role has changed: from the
cutting edge of semiconductor production
to More-than-Moore applications.
However, all good things come to an end.
And the PAS 2500/5000 will soon become
the first ASML scanner to officially come
to its End of Service (EoS), with ASML
no longer providing support. With this
milestone approaching, ASML is also
launching a more formalized approach
to product lifecycle management.
This involves clearly defining the various
stages of a product’s lifestyle and how
ASML supports machines in each of
these stages. Then by communicating
this information along with the relevant
timelines, including target dates for stage
transitions, we hope to create greater
transparency for both our customers and
our suppliers on exactly what they can
expect from ASML. This will in turn help
simplify business planning.
Defining the lifecycle
To start this process, we have divided
the product lifecycle into four stages
based on the level of service we offer.
We call these stages Regular Service,
Extended Service, Limited Service and
End of Service.
10
New
Refurbishment
Regular Service
7 yearsEconomic lifetime
extension for ASML and customer
ControlledExit (typically
3 years)
PossibleTransfer to3rd party
Extended Service
time
LimitedService
End ofService
In the Regular Service stage we provide
our highest level of support for new
and recently refurbished machines to
maximize system availability and enhance
performance. We offer full availability
of parts and a range of service level
options to suit different semiconductor
manufacturers’ needs.
Around seven years after we finish
manufacturing a machine type, it will
transition to the Extended Service stage.
Here again, we offer full parts availability
and a range of service level options.
But now the focus is more on extending
the economic lifetime of systems.
At some point after that, the system type
moves into the Limited Service stage
where we start to ramp down the support
we offer. Spare part availability isn’t
guaranteed and service is supplied on
a best effort basis.
Finally, the system type moves to End
of Service, where ASML stops providing
support altogether. However, systems
may continue to provide an economically
viable production facility – typically in
niche applications – and we will endeavor
to help customers find alternative service
solutions where possible. (See Fig. 1)
Communicating timelines
The timeline for when a system type
moves from stage to stage is not the same
for all types. Although the transition to
Extended Service is always seven years
after manufacturing stops, some system
types may be manufactured for longer
than others. This could depend on the
system’s popularity and intended role.
For example, a pre-production system like
the TWINSCAN NXE:3100 would come out
of manufacturing earlier than a production
workhorse like the TWINSCAN XT:1900i.
Similarly, customer demand for and usage
of refurbished systems plays a role in
deciding when a system type transitions
to Limited Service or EoS.
Hence, a key part of our product lifecycle
approach is deciding well in advance when
each system type will transition between
stages and communicating that in a timely
fashion to both customers and suppliers.
Of course, these timelines aren’t
something that we dictate and set in
stone. Transition dates are reviewed
based on feedback from customers and
suppliers. For example, we have already
decided to prolong the PAS 5500’s
Extended Service period by four years
to 2022. We will continue to review and
update our product lifecycle timelines
based on business potential and customer
feedback on a yearly basis.
Benefits throughout the chain
Product lifecycle management is
something we have always done within
ASML. But by formalizing it in this way,
we believe we can bring benefits for
everyone. For example, by considering
the lifecycle stages and end of life issues
more rigorously in our design process,
we can help extend the productive life
of new systems.
Meanwhile, by communicating the
transitions between lifecycle stages,
we make it easier for customers and
suppliers to plan their business and
investment in equipment. Our aim is to
share these timelines as early as possible
– particularly for the transition from
Extended to Limited service and from
Limited service to End of Service – and
at least one year ahead of the transition.
This will give everyone time to factor the
information into their business decisions.
Hence customers will be aware just how
long ASML will be supporting the systems
installed at their facility, and can decide
the best time to migrate to new tools
based on the service available, resale
potential, etc. If they are considering
buying a remarketed ASML system,
they will be able to confirm how long the
system will be supported before they
finalize the deal.
Suppliers will be better able to predict
the demand for their products as they
will know ahead of time when we will
be manufacturing, refurbishing
and supplying spare parts for each
system type. This allows them to plan
capacity, staffing levels and equipment
requirements with more confidence.
Given the long lifetimes of our systems,
this long-term planning of the entire
lifecycle will bring value for all parties
involved in the semiconductor industry
and associated businesses.
Details of product lifecycle stages and
transition timelines are available via
ASML’s Account Managers.
Fig. 1: Product lifestyle stages
Easier for customers and suppliers to plan their business
Extend the productive life
of new systems
11
ASML Images, 2014
New nodes with your installed TWINSCAN NXTsBy Jules Tops, SNEP Project Cluster Manager DUV, and Janneke van Heteren, SNEP Product Marketing Manager
Abstract | ASML’s System Node Extension
Packages (SNEPs) allow any TWINSCAN
NXT system to be converted into a newer
model in the fi eld. For example, the
SNEP:A2C and SNEP:B2C respectively
transform NXT:1950i and NXT:1960Bi
systems into an NXT:1970Ci. SNEPs allow
semiconductor manufacturers to extend
their installed NXT systems for volume
production at new nodes. This helps them
transition from node to node in a cost
effective manner, always having the latest
lithography system while managing their
capital expenditure.
12
New nodes with your installed TWINSCAN NXTsBy Jules Tops, SNEP Project Cluster Manager DUV, and Janneke van Heteren, SNEP Product Marketing Manager
Everyone likes getting value for their
money. And at ASML, we want to make
sure we deliver the maximum value for
our customers. That’s why our TWINSCAN
scanners have always been built using
a highly modular architecture that allows
systems to be upgraded in the fi eld with
new options to improve productivity and
performance. This allows semiconductor
manufacturers to buy new systems
in confi gurations tailored to their needs
at that time, safe in the knowledge
that the tool can be adapted as their
needs change.
Now with the TWINSCAN NXT platform,
we are taking that approach a step
further. Through System Node Extension
Packages (SNEPs), any installed NXT
system can effectively be converted to
a newer model in the fi eld – extending
its capabilities by one or two production
nodes. The transformed system meets the
full ATP specifi cation for the new model,
and comes complete with a standard
ASML warranty running from the date
of the upgrade. In effect, manufacturers
gain all the benefi ts of buying a brand
new system, without the hassle of
de-commissioning an installed tool.
Our SNEP strategy gives semiconductor
manufacturers the maximum fl exibility in
planning their investment in lithography
equipment. You can buy an NXT system
for high-volume manufacturing at one
node and then upgrade it when you are
ready to transition to the next node.
This avoids the need to invest in brand
new systems each time you move to a
new production node.
Any installed NXT system can be converted to a
newer model in the fi eld
13
ASML Images, 2014
NXT:1950i 1950/1951 lens
NXT:1970Ci
Node N Node N+1 Node N+2
NXT:1960Bi 1951 lens
NXT:1960Bi 1952 lens
NXT:1950i + PEP 1950/1951 lens
Per
form
ance
B2C path
SNEP: A2C (+ 2 nodes)
A2C path
Snep = System Node Extension Package
SNEP:B2C (+1 node)
NXT configurations in the field and transformation paths
Fig. 1: SNEP is a System Node Extension Package: New hardware and software installed during a field
transformation will bring the NXT:1950i or NXT:1960Bi to the newest node. (NXT:1970Ci specs)
Following this learning period, the first SNEP
upgrade projects at customer sites were
carried out earlier this year. These systems
are now operating in production and in spec,
allowing the customers to move into volume
production at a new node.
An ongoing roadmap for value
The SNEP:A2C and SNEP:B2C are just
the first steps in our roadmap for node
extension. As each new TWINSCAN NXT
system is released, we will also be making
available packages for transforming installed
NXT systems into the very latest model.
In this way, we aim to give semiconductor
manufacturers the ability to transition from
node to node in the most cost-effective way
possible – ensuring they always have the
capabilities needed for profitable volume
manufacturing of advanced products as
well as the freedom to control their capital
expenditure and investment in new equipment.
TWINSCAN NXT:1970Ci specifications
Full-wafer dedicated chuck overlay
2.0 nm
Full-wafer matched machine overlay
3.5 nm
Full-wafer focus uniformity
20 nm
Full-wafer CDU (isolated features)
1.3 nm
Full-field throughput (96 shots)
250 wph
Defects < 7 per wafer
A completely new system
Two SNEPs are available: the SNEP:A2C
and SNEP:B2C. These transform
NXT:1950i and NXT:1960Bi systems
respectively into our latest scanner,
the NXT:1970Ci. This represents a
one-node extension for the NXT:1960Bi and
a two-node extension for the NXT:1950i.
(See Fig. 1)
Upgrades are carried out by a dedicated
SNEP team, in cooperation with our
local customer support personnel.
Each upgrade is tailored to a specific
tool via the tool number. The exact
sub-systems to be upgraded are
determined based on the system’s
current configuration. But typically the
upgrade includes replacing the wafer
handler, stage and table, and installing
the new ultra-violet level sensor (UV-LS),
parallel ILIAS (PARIS) sensor and CO2
Extending its
capabilities by one or two
production nodes
Transform NXT:1950i and
NXT:1960Bi systems into
an NXT:1970Ci
immersion hood. Where necessary,
the projection lens may also be replaced
with a newer model.
Once all the necessary hardware and
software is upgraded, the team qualifies
all the modules and then the system
as whole before carrying out the ATP
specification. The final system has all
the features and performance of a
straight-from-the-factory NXT:1970Ci
(see box), backed up by our standard
12-month new system warranty.
A flexible process
Our dedicated SNEP team has already
carried out a number of system upgrades
at ASML facilities around the world.
This has allowed us to optimize the
upgrade procedure to maximize flexibility
and minimize downtime. For example,
by performing jobs in parallel wherever
possible, we reduce the time taken for
the upgrade. This also affords us some
freedom in the order in which tasks are
carried out to reduce the impact of any
unexpected delays. Moreover, the team
is able to adjust the upgrade process
according to the space available around the
system, reducing risk.
14
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 360,0
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Latest data on the progression of the NXT:1970Ci’s availability and reliability performance
Ove
rlay
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rman
ce [n
m]
Systems
Latest data on the NXT:1970Ci’s focus, overlay and defectivity performance, showing consistently within spec
0
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Systems
Matched Machine OverlaySingle Machine Overlay
The TWINSCAN NXT:1970Ci By Remi Pieternella, Senior Product Manager
The latest model in our TWINSCAN NXT
high-throughput, high-precision ArF
immersion lithography platform,
the NXT:1970Ci targets profi table
volume production at the 1x nodes.
Compared to previous systems,
the NXT:1970Ci includes a new
multifunction parallel ILIAS (PARIS)
sensor for measuring the effects of
lens and reticle heating. Together with
a multi-sector wafer table heater,
this enables better overlay performance.
In addition, a brand-new ultraviolet level
sensor (UV-LS) improves focus control
and reduces process dependency during
leveling. A new high bandwidth wafer
stage enables faster wafer exchange for
higher throughput, and features enhanced
thermal control to improve overlay and
imaging performance. Meanwhile, a new
immersion hood with a carbon dioxide
“gas knife” reduces defect levels and
allows scan speeds up to 800 mm/s.
Around fi fty NXT:1970Ci systems have
been shipped to customers and are
operating within specifi cations. A number
of these systems are being used in
high-volume production, where they
are exposing over 4000 wafers per day
(averaged over a week). The average
availability for these systems is around
95%, and mean time between failures
continues to rise thanks to continuous
software improvements.
15
ASML Images, 2014
Focuson a new starBy Stuart Young, Product Manager YieldStar
16
ASML has launched the latest member
of its YieldStar diffraction-based
metrology family. The YieldStar 250D
is a next-generation metrology tool,
targeting production at the 10-nm logic
and 1X-nm memory nodes. It offers even
better accuracy and precision than its
predecessors, and reduces the time taken
for an individual measurement by around
30%. This allows customers to measure
overlay, focus and CD on product wafers
– while maintaining the same high wafer
throughput as their TWINSCAN scanner.
Building on a solid platform
The new system builds on the success
of previous YieldStar family members.
YieldStar was the first metrology system
to deliver small-target diffraction-based
overlay (µDBO) measurements.
Together with ASML’s Design for Control
(D4C) metrology targets (see page 4),
this enabled a significant step forward
in accuracy, precision and speed for
FEOL, MOL and BEOL layers compared
to traditional image-based overlay (IBO)
metrology systems. (See Fig. 1)
YieldStar systems are available in
two configurations that are identical
in design: a traditional standalone tool
and system integrated into the wafer
track. The integrated systems use
less fab space and reduce lithography
cluster cycle time as the metrology can
be carried out in the lithography cluster
without overhead. They also allow real-
time metrology feedback to the scanner.
Hence for scanners with the right options
installed, data from each lot can be
Abstract | ASML has shipped several
of its new YieldStar 250D systems.
This next-generation metrology tool targets
the 10-nm logic and 1X-nm memory nodes.
It is the first metrology system capable
of performing simultaneous on-product
overlay, focus and CD measurements
at a speed and quality that allows
real-time feedback for scanner control.
This helps semiconductor manufacturers
maximize their yields of good wafers-
per-day. A roadmap of software-only
system enhancement packages will deliver
continued in-the-field enhancements to the
new system’s performance and capabilities.
X-overlay
Yiel
dsta
r µD
BO
mea
sure
men
t AD
I
Device overlay measured by CD-SEM after etch
y = 0.9178x - 0.8156R2 = 0.9393
Y-overlay
Yiel
dsta
r µD
BO
mea
sure
men
t AD
I
Device overlay measured by CD-SEM after etch
y = 0.9452x - 0.1708R2 = 0.969
Fig. 1: Yieldstar DBO overlay measurements show excellent correlation to real device overlay
First metrology system capable of measuring overlay,
focus and CD in a production environment
17
ASML Images, 2014
used to control the scanner and
optimize exposure for subsequent lots.
This improves both individual scanner
performance and machine matching.
These unique capabilities have seen
YieldStar become the metrology tool
of choice in high-volume manufacturing
(HVM) fabs around the world.
Following on from a very successful
year in 2013, we expect the number
of installed systems to double in 2014.
Over that time, shipments of integrated
systems have grown rapidly as more
manufacturers have seen the value of
real-time, data-based scanner control,
and have now become around half of the
total number of YieldStar shipments.
The installed YieldStar systems have
proven to be excellent performers
in fabs. They have, for example,
helped semiconductor manufacturers
successfully match on-product
overlay across their installed base of
scanners. YieldStar systems have also
demonstrated impressive reliability,
with availability above 99% and 13-week
mean time between interrupt (MTBI)
fi gures of over 1000 hours. (See Fig. 2)
Shedding more light on metrology
The YieldStar 250D is based on the
same fundamental platform as its
successful predecessor the YieldStar
200C. But it takes the YieldStar benefi ts
to the next level by dramatically
increasing the amount of light reaching
the wafer. It does this in two ways.
First, the xenon arc lamp used in the
YieldStar 200C has been replaced with
a new source that delivers substantially
more light and improved illumination
characteristics. Secondly, the optical path
from source to wafer has been improved
to increase transmission and extend the
range of transmitted wavelengths.
The more powerful source and improved
transmission increase the total amount of
light at the wafer level by up to 50 times.
As a result, the specifi ed move-acquire-
measure (MAM) time is just 0.35 seconds
(compared to 0.5 seconds for the
YieldStar 200C). Hence the YieldStar 250D
is capable of 1200-1600 measurements
per lot at the full production throughput of
ASML’s latest TWINSCAN NXT scanners.
Tests on product wafers from logic and
memory customers have shown that
the YieldStar 250D is consistently over
30% faster than the YieldStar 200C.
Improvements are even more pronounced
for more challenging layers – with gains
above 80% in some cases. (See Fig. 3)
Supporting advanced chip structures
Meanwhile, the extended wavelength
range allows the new system to support
3D chip features such as FINFETs and
3D-NAND structures. These structures
require thicker process stacks leading
to lower light transmission which makes
metrology more challenging. The YieldStar
250D uses sensing wavelengths up to
780 nm to increase transmission through
the stack. Hence, it can deliver fast,
accurate metrology on FINFET devices
at the 10 nm logic node as well as
3D-NAND structures.
More focus on focus
Prior to the YieldStar 250D, scanner control
based on metrology feedback focused
on optimizing on-product overlay
performance. Of course, overlay isn’t
the only performance metric that affects
wafer yield. The increased speed of
the YieldStar 250D means users can
now also measure on-product imaging
performance – specifi cally focus and CD.
This makes the YieldStar 250D the fi rst
metrology system capable of measuring
overlay, focus and CD in a production
environment.
YieldStar’s unique diffraction based-
focus (DBF) measurement directly and
accurately measures on-product focus
across the entire process window. Just as
for overlay, YieldStar focus measurements
can be used as the basis for calculating
and applying real-time corrections via
ASML’s Imaging Optimizer scanner option.
For focus critical features, these exposure
corrections have demonstrated on-product
CDU improvements of around 15%.
(See Fig. 4)
The YieldStar 250D also supports CD
measurements as an option.
CD measurement capabilities have
been extended, with a particular emphasis
on reducing the time required to create
recipes. This allows semiconductor
manufacturers to measure overlay,
focus and CD simultaneously with
no loss of productivity.
Facing the future
The YieldStar 250D is part of ASML’s
ongoing holistic lithography roadmap,
with future systems planned to keep
metrology performance on pace with
scanner capabilities. Just like our
scanner platforms, this roadmap is built
on a philosophy of continuous system
enhancement. All installed YieldStar 200C
systems can be fully upgraded to the new
YieldStar 250D in the fi eld. Several fi eld
upgrades have already been successfully
performed, and customer demand for
such upgrades remains strong. When the
time comes the YieldStar 250D will be
fi eld-upgradeable to subsequent models.
On-product CDU
improvements of
around 15%
18
Median Reliability
MTBI of Yieldstar machines
2013
1420
1316
2013
1820
1320
2013
2220
1324
2013
2620
1328
2013
3020
1332
2013
3420
1336
2013
3820
1340
2013
4220
1344
2013
4620
1348
2013
5020
1352
2014
0220
1404
2014
0620
1408
2014
1020
1412
2014
1420
1416
2014
1820
1420
2014
2220
1424
2014
2620
1428
2014
3020
1432
0
200
400
600
800
1000
1200
1400
MTB
I [ho
urs]
200C MAM250D MAM
MAM time data
Node
14nm
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14nm
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]
Slot #
Uncorrected focus uniformitySimulated improvement with 1) focus offset correction 2) focus offset and tilt correction
20
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4 6 7 8 9 10 Ave
Focu
s 3σ
(nm
)
Interfield Focus 3σ (nm)Simulated Z per field correction potential 3σ (nm)Interfield Focus 3σ (nm)
26.3
25.1
22.0
19.2
26.2
21.8
19.5
24.1
20.2
18.0
26.9
23.3
21.0
25.6
23.2
20.7
25.7
22.2
20.2
25.7
22.0
19.821
.419
.6
Slot #1
0
5
10
15
20
25
30
2 3 4 5 6 8 97 Ave
Focu
s 3σ
(nm
)
Measured focus uniformity with focus offset & tilt corrections applied shows 20% improvements
Focus Uniformity (interfield) 3σ (nm)
20.2
20.2
20.4
20.8
21.2
20.9
21.221
21.5
21.2
Fig. 4: Yieldstar on product focus measurement together with Imaging Optimizer delivers 20% on-product focus uniformity improvement
Fig. 2
Fig. 3: The 250D delivers more than 30% increase in sampling
Improvements aren’t limited to just
developing new systems. Our YieldStar
roadmap also includes regular,
software-only system enhancement
packages to extend the capabilities and
economic lifetime of installed systems.
These packages allow us to make
signifi cant usability improvements for
both R&D engineers and HVM users,
and to introduce new functionality.
Furthermore, these enhancement
packages are used to deliver increased
sampling, accuracy and precision
performance. In this way, we help
ensure that all customers have the latest
metrology capabilities available in a
timely and robust fashion.
19
ASML Images, 2014
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Phone +852 2295 1168
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