Post on 02-Mar-2018
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Ingrid De Wolf
With input from REMO group
Packaging Reliability
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OUTLINE
Introduction Package levels
Function of a package
What can go wrong
Reliability Definition
Early failures
Standard tests
FMEA
What can go wrong
Crack growth (Si, ) Delamination
Corrosion
Diffusion processes (thermal
diffusion, electromigration,
thermo-migration)
Solder issues: whisker
growth, material degradation
(creep, fatigue, )
Conclusions
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INTRODUCTION: Package levels
Source: B. C. Johnson, Overview of c hip-level packaging, in ASM International Handbook Committee: Electronic
materials handbook, volume 1 Packaging. ASM INTERNATIONAL, Materials Park, Ohio, USA, 1989, pp. 398-407.
Si
PCB
chip
Level 0
MEMS-cap
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Humidity, gasses, pressure, light,chemicals, particles,
Input:electrical,pressure,acceleration, drugs
ThermalPower
ICMEMS
keep bad things out:
particles, humidity,
keep good things in:pressure, getters,
throw excess things out: heath,
allow easy in-output:
electrical,optical signals
give mechanical support,
without adding stress
gives the IC a standarized footprint
be reliable
It functions as Gate keeper
Output:electrical,optical,
A package should provide an electrical connection to the outside world,
give mechanical support and protect the device from mechanical,chemical and physical loads
INTRODUCTION: Package function
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MEMS substrate
capping chip
resonator
-level package
The IC can fail: not scope of this lecture
The package can cause the IC to fail
The package can fail: loss of contact to board, shortsbetween feet, cracks, delamination,
e-
EXAMPLE:
Electromigration failure in Cu BEOL
EXAMPLE:
Si stress resonator, measuring stress induced from packaging
INTRODUCTION: What can go wrong?
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RELIABILITY: Definition
Classical definition of Reliability:
Reliability = theprobabilitythat an item will perform a requiredfunction understated conditions for a stated period of time
Alternative definition of Reliability Testing:Predict the effect of design, processing,packaging and use indifferent environments and conditions on the functioning and the
lifetime of devices and define corrective actions
Specified lifetime
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RELIABILITY: When?
During its life the IC and the package are subjected to
various loads due to:
Manufacturing
temperature (0-level package T, cooling down from solderingreflow), vibrations (ex. ultrasonic cleaning), bending (on assemblymachines), mechanical shock
Distributionvibration and shock during transport, handling, storage
Customer use (in the field)environmental loads: cyclic temperature, thermal shock,mechanical shock, vibration (ex. mobile phone), humidity, dust,chemical, operational loads,
Early failures
Normal life and wear-out
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RELIABILITY: Early failures
Any product can have failures due to small variations in manufacturing :
- Can be high for new technologies- To be removed before making the final product
time
Failure
rate
The batht ub curve
Early failures =Infant mortality
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Why to be removed?Innovative package designs and multi-chip-modules (MCM) are expensive.When testing after packaging youll have to throw away good packages andchips (MCM).
How?Wafer-level probing or
Burn-in tests
- Place the chip in aburn-in socket- Place the socket in a burn-in chamber- Stress the chip at certain T and V for a certain time (product dependent)- Throw away the failing ones, package the known-good die
Demands for socket:should keep contact, should not damage the device
(chip, solder bumps,), it should not stick to thecontact.
RELIABILITY: Early failures
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One cannot test during 5 or 10 years with these real-life loads
and see whether it still works therefore:speed-up testing time
Normal life and Wear-out Accelerated tests
StandardTests
Failuredriventesting
RELIABILITY: Normal life and wear-out
time
Failure
rate
The batht ub curve
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STANDARD TESTS
Test at higher stress (thermal, electrical, mechanical, environmental)than in normal life
The test procedure and conditions are described in the standards
Examples of committeesMIL (Military) standards
JEDEC (Joined Electron Devices Engineering Council)
IPC (originally Institute for Printed Circuits but has broader scope)
IEC (International Electro-technical Commission) standards
Telcordia
RELIABILITY: Normal life and wear-out
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+ Easy, well defined and used all over the world
- Not all tests are useful for all kinds of packages
- The tests are time consuming, expensive
- Wrong failure modes might be tested and others are not tested:
The product should exhibit the same failure mechanism and mode in the testunder high stress conditions during a short time as it would exhibit undernormal life stress conditions during a longer time
Lifetime
Stress
Measurements done at high stress
Projection
A
O
H
P
P = the predicted lifetime
is only valid if:- The algorithm is correct
- The field stress indicated asH is the true field stress
- There is no other
(competing) degradationmechanism in the systemwhich will make the device in
field fail much earlier
RELIABILITY: Normal life and wear-out
STANDARD TESTS
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EXAMPLE: Temperature CyclingMILSTD 1010.8
Exposure of an assembly
to cyclic T changes with
parameters:
Tmin and Tmax
ramp rate
dwell time
Accelerated testing: STANDARD TESTS
TESTING and CHARACTERIZATION QUALIFICATION
Test type: THERMAL CYCLINGExample: the low air pressure test: 20h at15kPacorresponds to an altitude of about14 km which simulates (worst case) for anairplane. No use to test this on applicationsfor car or GSM or devices that are inside theplane...
Specific test conditions:Temperature range will be different forautomotive and consumer applications
Test results:Pass/no-pass criteria should be linked
with a required lifetime for specificproduct
e TR
Q
TMTTF
TMTTFAF
1exp
Acceleration factor
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Recognize the expected failure mechanisms that can occur in asystem for a certain application in a certain environment
Define tests that accelerate these failure mechanisms
Questions to answer:
Q1: what is the application?
Ex. for a mobile phone, for a car, for an airplane,Q2: where?Ex. a mobile phone for Singapore, or Siberia or Belgium, for a carunder the hoot or on the mirror or in the wheel or inside the cabin,for an airplane inside the cabin or in the wings,
Q3: what does the system see (environment)?
low pressure, vibrations, heath, cold, dirt,Q4: what can go wrong due to this environment?
Failure Mode Effect Analysis
RELIABILITY: Normal life and wear-out
FAILURE DRIVEN TESTING
Different concept of testing is valuable for new products and applications
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RPN
Accelerated testing: FMEA TESTS
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RPN = risk priority factor= severity x occurrence x detect-ability
Accelerated testing: FMEA TESTS
What is first measured indicating a failure: failure mode
What is observed, the signature of the failure mode: failure defect What is the physics, chemistry causing the failure: failure mechanism
What is the cause of the failure mechanism: failure cause
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Accelerated testing: FMEA TESTS
Find and explain one example of a FMEA of a specific application
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WHAT CAN GO WRONG?
Ingrid De Wolf
And how to test and inspect them?
C it t k DT
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Cracking: Si die fracture
Cause: the thermal-mechanical induced stress is higher than
the strength of silicon Influenced by the quality of the die: roughness, way of cutting,IC design and lay-out (3D-Cu-plugs through thin die can act as crackinitiators)
Wider (thicker) or asymmetrical fillets result in larger stresses
at the chip edges, which may induce die cracking
Sipackage
Composite stack DT
Source: Takahashi et al., ASET;ECTC Proceedings, 2004, p 601
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Cracking: Si die cratering
Is the fracture of silicon under the bond/bump during the bonding
process, flip chip assembly or field service More critical for advanced low-K materials
Source: C. Wang and A. S. HolmesIEEE TRANSACTIONS ON ELECTRONICSPACKAGING MANUFACTURING, VOL. 24,NO. 2, APRIL 2001
Wire bond damage Shear force on solder bump
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Delamination: underfill/die-attach/resin ...
Cause: the shear force at the interface is higher than the
adhesion forces Depends on many factors: materials, surface chemistry
It is an indirect failure mode (the device may still work) butit will lead to device failure at the end (redistribution ofmechanical and thermal stress)
DIE
Molding Resin
leadframe
leadframe
Si-pass
Organic solder mask
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Popcorn effect
One of the main causes of mold/resin delamination and
cracking Cause: moisture absorption
Test: T shock (popcorn test)
by diffusionthrough voids,delamination Steam: increase in
pressure: delamination,cracks, shear on balland wire bonds
moisture vaporizes resulting in steam
Moisture absorption
Solder reflow: high T (~ 230 oC)
1
2
3
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Corrosion
Destructive interaction between material and environment
An electrochemical process which may occur if there are:
- a conductive anode and cathode- an electrolyte bridging anode to cathode (moisture)
- an electrical potential between them
Corrosion of metal pads at the anode occurs by dissolution ofthe metal until an electrical open terminates the process.Dendrite growth (the precipitation of the dissolved metal ion atthe cathode) causes shorts.
Au Cu
Preferential attack of
Less noble CuPreferential attack inside Cu structure: PITTING
due to micro-structural differencesDendritic growth
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Solder joint reliability
The package reliability is mainly determined by the
robustness of the solder joints
Solder failure
dominateswear-out region
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Solder joint reliability
The package reliability is mainly determined by the
robustness of the solder joints
The robustness of the solder joints is defined by
- Intrinsic material properties: Creep and Fatigue behavior
- Metal finish interactions: Intermetallic compound formation
Solder joints are connecting
two different material worlds:Si versus laminate technology,
with highly differing CTE values
(Coefficient of Thermal Expansion)
Difference in deformation is mainly
taken up by the solder joints
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Fatigue occurs when a material is subjected to cyclic loading and the
material goes from the elastic region to the plastic region (at the pointswith highest stress) and back
The plastic deformation initiates micro-cracks, which propagate duringsubsequent cycles and can cause sudden failures
Fatigue is the dominant failure mode for flip chip devices
The crack growth is a function of the applied stress (s) andtemperature T, the material properties, the load rate, the history of thematerial
Fatigue life is the number of cycles required to initiate a micro crackand to propagate it to a critical length
Solder issues: Fatigue
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Solder issues: Fatigue
High-cycle fatigue: stresses remain in the elastic region.
Expected lifetime > 10000 cycles.
Low-cycle fatigue: the yield point is exceeded in each cycle
Expected lifetime < 10000 cyclesIs the most typical failure mode for solder joints (solders
have a low yield stress)
% failures
Number of T cycles
Weibull/Lognormal plot
0.1
100
500 1000
N50%
Determine N50% to
characterize thereliability of a
package assemble.
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Solder joint reliability: Fatigue
(Au,Ni)3Sn4
Ni3Sn4
(Au,Ni)Sn4
Sn
Pb
Brittle fracture
Brittle fracture
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Define acceleration factor for solder joint fatigue
Law Coffin-Manson
Solder joint reliability: Fatigue
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Solder issues: Creep
Creep is a time dependent visco-plastic deformation: change of
strain in time due to an applied load (mechanical stress) s Creep is a function of the applied load (s) and temperature (T)
Creep produces dislocation migration, grain-boundary sliding, reductionof residual stress, void formation,...
Creep in metals can occur at stress levels below the yield point
and at temperatures > 0.5 TM (TM = melting T in K)
Example: solder SnPb (60/40) melts at ~458K (= 183 oC)0.5 TM = 229 K (RT=298K) and has potential for creep even at room T
Example: ceramic substrates melt above 2000oC, no problem expected
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y = 5E-18x10.16
R2= 0.9133
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1 10 100Stress (MPa)
StrainRate(1/s)
Solder issues: Creep
Testing procedure:
Constant strain (displacement) rate (measure load) Constant load (measure displacement)
Aim:
Determine steady state strain rate as a function of stress andtemperature, to be implemented in FE models
0. 00
0. 10
0. 20
0. 30
0. 40
0. 50
0. 60
0. 70
0. 80
0. 90
1. 00
0.E +00 1.E +05 2.E +05 3 .E +05 4 .E +05 5 .E +0
Time (sec)
Strain
(absolute)
PrimaryCreep
Secondary /
Steady StateCreep
TertiaryCreep
0. 00
0. 10
0. 20
0. 30
0. 40
0. 50
0. 60
0. 70
0. 80
0. 90
1. 00
0.E +00 1.E +05 2.E +05 3 .E +05 4 .E +05 5 .E +0
Time (sec)
Strain
(absolute)
PrimaryCreep
Secondary /
Steady StateCreep
TertiaryCreep
Strain rate is defined by slope
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Solder issues: Creep
Is there a difference in creep behavior between eutectic Sn-Pb
versus Pb-free solder alloys?
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Diffusion processes
emassjq*Z
kT
DCCDJ
Driving forces for diffusion
1. Chemical gradient
2. Electric field (ions move in opposite direction of electric field,along the direction of the electrons, by momentum exchange)
3. Stress gradient (atom movement occurs from compressed to
tensile stressed regions)More. Thermal gradient
Not yet considered for solder bumps,
known in conductor lines (Cu, Al) asBlechs length
s
q*ZjL cecc
321
Electromigration can enhance or reduce the
intermetallic and void formation
ELECTROMIGRATION
BACK STRESS
Riet Labie imec restricted 2010
Reliabilit cha acte isation
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Intermetallic growth occurs by interdiffusion M S
Based on diffusion model of ideal solid solutions
Based on following assumptions:
- flux is identical in both directions (M in S and vice versa)
- one IMC is formed (constant concentration gradient)
Reliability characterisationSolid state ageing
tDx .~2
).
(exp.0~~
TR
QDD
with x = intermetallic thickness~
Interdiffusion coefficient is defined by Maxwell-Boltzmann equation
Reliability characterisation
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Intermetallic growth occurs by interdiffusion M S
Based on diffusion model of ideal solid solutions
Based on following assumptions:
- flux is identical in both directions (M in S and vice versa)
- one IMC is formed (constant concentration gradient)
Ficks first law: concentration gradient is driving force
Ficks second law: conservation of mass
jM S
jS M
x
CDJ
.
t
C
x
J
x
CD
xt
C
.
Reliability characterisationSolid state ageing
jx
jx+Dx
Reliability characterisation
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Intermetallic growth occurs by interdiffusion M S
x
CD
xt
C
.
2
2
.x
CD
t
C
tDx .~2
).
(exp.0~~
TR
QDD
Reliability characterisationSolid state ageing
~
Dt
xtxC exp~),(
with x = intermetallic thickness~
~
Interdiffusion coefficient is defined by Maxwell-Boltzmann equation
Intermetallic growth in solid state
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Intermetallic growth in solid state
Cu Sn experimental measurements
Cu6Sn5
Cu3Sn initial 100h
1000h
Ageing temperature of 175 oC
Dominant h-phase,
non-continous e
Sn
Cu3Sn
Cu6Sn5
Pronounced scalloping after reflowseems to decrease
500h
Kirkendall voids trapped at Ti barrier
Cu
Transformation from e to h
Reduction of Kirkendall voids
Intermetallic growth in solid state
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Ni
Ni3Sn4
Sn
initial
500h 1000h
100h
Ageing temperature of 175 oC
Ni3Sn4
Rather uniform IMC thickness,
needle-shaped or dendritic interface
Ni3Sn4
Ni3Sn4
More scalloping effect of interface
Crack formation inside IMC layer
Intermetallic growth in solid state
Ni Sn experimental measurements
Intermetallic growth in solid state
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39-16.0
-15.0
-14.0
-13.0
-12.0
-11.0
-10.0
0.0002 0.00025 0.0003 0.00035 0.0004
1/RT
ln
D~
Ni - Sn
Cu - Sn
150 100 oC
1/RT
Intermetallic growth in solid state
experimental measurements
Cu-Sn
Ni-Sn
Ageing at 150oC
0.0
2.0
4.0
6.0
8.0
10.0
0 500 1000 1500 2000
time [sec]1/2
IMCthickness[um]
Cu-Sn
D~max = 6,3.10-6mm2/secD~average = 2,9.10
-6mm2/se
D~min = 2,3.10-6mm2/se
Ni-Sn
D~max = 2,3.10-6mm2/se
D
~
average = 1,7.10
-6
mm
2
/seD~min = 8,1.10-7mm2/se
Intermetallic growth in solid state
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Cu-Sn: 100-150oC: Q=64kJ/mol, Do=226mm2/sec
150-175o
C: Q=138kJ/mol, Do=4.105
mm2
/sec 2-phase formation Cu3Sn (e) and Cu6Sn5 (h),
sum e+h follows interdiffusion laws
D > literature values
Validation experiment: blind experiment with unknown T
based on measured IMC thickness, estimated temperature of 166oCcompared to 163oC actual, compared to estimated value of 148oC
for literature data
Intermetallic growth in solid state
experimental measurements
~
~
Diffusion processes
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y = 0.126x + 1.5125
y = 1.0013x + 6.3231
0
2
4
6
8
10
12
14
16
0 2 4 6 8 10
t1/2, days1/2
IMCthickness,m
Ni/AuHASLLinear (Ni/Au)Linear (HASL)
2 days 60 days
0 days 60 days
HASL
Ni/Au
SOLDER: SAC (SnAgCu) on HASL vs. Ni/Au finish
Diffusion processesChemical gradient Thermal diffusion
Diffusion processes
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Ernest Kirkendall
WIRE BOND: Au wire on Al bond pad
- Formation of IMC: AuAl2 (purple plague has purple colour)
- When diffusion flux in one direction is larger than diffusion fluxin opposite direction this results in material shortage (voids)and excess material (hillocks)
Voids are created at the side ofthe fastest diffusing species:
KIRKENDALL VOIDS
Au
Al
Diffusion processesChemical gradient Thermal diffusion
Diffusion processes
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Diffusion can completely absorb one metal into the other. Example:
The complete dissolution of the UBM may result in solder/UBMdelamination
Intermetallics often cause weak bonds because embrittlement.Example: excessive Sn-Au, Sn-Cu and Sn-Ni intermetallics may causesolder joint embrittlement
SnSn
Cu
Cu3Sn
Cu6Sn5 Cu3Sn
Cu6Sn5
SiO2SiO2
Diffusion processesSolder intermetallic related failures
Diffusion processes
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Fracture of brittle intermetallics when high stresses and/or
deformations are appliedExamples:
-Bending of assemblies during
shipping and handling with insufficient mechanical support
in-circuit test, rework
insertion and removal of boards in chassis,
attachment or removal of press-fit connectors and fasteners
- Fast temperature changes
- Mechanical shock, vibration
- Volume change (VIMC
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Solder issues: Brittle fracture in solder
Metals lose ductility below a certain temperature :
Ductile to Brittle Transition Temperature (DBTT) Shock loads can cause premature failure due to brittle
fracture normally not associated with ductile failures
Increasing %Ag -> increase T at which brittlefracture occurs
Mini-Charpy system
Cooling block
0
10
20
30
40
50
60
70
-200 -180 -160 -140 -120 -100 -80 -60 -40 -20 0 20 40 60 80 100
Temperature, oC
Fracturetoughness,
J/cm
2
Sn-5%Ag
Sn-4%Ag-0.5%Cu
Sn-3%Ag-0.5%Cu
Sn-37%Pb
Sn-0.7%Cu(Ni)
99.99%Sn
Sn-0.7%Cu
brittle
ductile
Ag:
0%
3%
4% 5%
0
10
20
30
40
50
60
70
-200 -180 -160 -140 -120 -100 -80 -60 -40 -20 0 20 40 60 80 100
Temperature, oC
Fracturetoughness,
J/cm
2
Sn-5%Ag
Sn-4%Ag-0.5%Cu
Sn-3%Ag-0.5%Cu
Sn-37%Pb
Sn-0.7%Cu(Ni)
99.99%Sn
Sn-0.7%Cu
brittle
ductile
Ag:
0%
3%
4% 5%
IMEC: Presented at IMAPS Europe & IPC
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Brittle fracture in solder: Role of Ag
Sn-3%Ag-0.5%Cu Sn-4%Ag-0.5%Cu Sn-5%Ag
The increase of the Ag content leads to increase of theintermetallics volume fraction:Possibly the reason for the transformation shift?
Ag3SnAg3Sn and Cu6Sn5Ag3Sn and Cu6Sn5
Find and discuss an example of IMC related solder joint failures
Diffusion processes
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Driving force for diffusion is an electrical current: metal migrates in
the direction of the electron flow A reliability concern for the future high density microelectronic
packaging and power electronic packaging. The interconnecting solderjoints are getting smaller in size and, thus, carry higher currentdensity
Current crowdingat turning point for current
Current distribution inside bump by FE simulations
Diffusion processesElectro-migration
Diffusion processes
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Lifetime of diffusion driven mechanisms can be described by Arrhenius
law:
What will be the impact of scaling flip chip interconnections andincreased user current ?
RT
QjAMTTFv
EMnexp..~
1
Diffusion processesElectro-migration
Diffusion processes
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Electro-migration is metal migration in the direction of the electron flow
It acts as an additional driving force for diffusion It has an impact on IMC formation and UBM consumption
Diffusion processesElectro-migration related failures
Initial state
Cu3SnCu
6Sn
5
Sn
Cu3SnCu6Sn5
Sn
Cu
Cu
Cu6Sn5
Sn
500h at 150oC
electrons
Void propagation
Atom pile-up
No Cu left after 30h at 150oC and 1A
Diffusion processes
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T-gradient induced migration of solder bump material
with time which can result in an open bump
Current: joule heatingMetal lines on chiphave a smaller X-section: becomehotter(can be > Tm solder)
ColderT-gradient from chip side(warm) to substrate side (cold):material transport
Diffusion processesThermo-migration
Discuss an example of failure by thermo-migration.
Which gradients are needed to induce thermo-migration ?
Solder issues: Tin whiskers
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Solder issues: Tin whiskers
Crystalline extrusion structures of tin (mm lengths, electrically
conductive) They grow from surfaces where thin tin (especially
electroplated tin) is used as a final finish
They can bridge closely-spaced circuit elements maintained at
different electrical potentials.
Ban of lead: PbSn plating: trend to use pure Sn instead of SnPb,seems an easy and cheap alternative
http://nepp.nasa.gov/whisker/background/index.htm
the precise mechanism
for whisker formationremains unknown
Avoid the use of PURE TIN plated components
Solder issues: Tin whiskers pictures
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Solder issues: Tin whiskers pictures
Solder issues: Voids
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Solder issues: Voids
Voids in solder: in general not a problem, but mightgive problems if they become too big: seen typically inPb containing solder ball on Pb-free solder paste.
X-ray imagesof SnPb BGA
X-sectionimages
Solder issues: BGA voiding problem
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Solder issues: BGA voiding problem
Pb-free paste and
Sn-Pb BGA ballSn-Pb
BGA
PCB
SAC Melting T= 217oC
Melting T= 183oC
Pb-free solder paste:Contains solvents and activators that become active andvolatilize at T > 183 oC (melting point of Sn63):
So the solder paste is still wetting and volatizing withinthe ball when the solder ball joint is in the process of
forming.
Solder issues: Solder extrusion
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Solder issues: Solder extrusion
Wang et al.http://www.advanpack.com/techlib/Reliability%20studies%20flipchip_package%20with%20Reflowable%20Underfill.pdf
Previti et al.http://www.cooksonsemi.com/tech_art/pdfs/NUF%20Reliability%20is%20Here.pdf
Solder flows into a void inside theunderfill or along delaminated parts(can occur after reflow or T-tests)
Conclusions
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Conclusions
Moores law is also affecting the package: front end, backend, package and board cannot be looked at separatelyanymore
Pb-free: causes new reliability problems (Tin whiskers,
brittle fracture,)
Packaging reliability: Standard testing towards failuredriven reliability testing
Accelerated testing required, but be careful whenextrapolating to real life
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